NR PDCCH development warning clean up

parent 70e0bba3
......@@ -233,6 +233,7 @@ typedef struct {
uint8_t bandwidth_part_ind;
uint16_t number_rbs;
uint16_t start_rb;
uint8_t frame_offset;
uint16_t number_symbols;
uint16_t start_symbol;
pusch_freq_hopping_t pusch_freq_hopping;
......@@ -302,6 +303,7 @@ typedef struct {
uint8_t bandwidth_part_ind;
uint16_t number_rbs;
uint16_t start_rb;
uint8_t frame_offset;
uint16_t number_symbols;
uint16_t start_symbol;
uint8_t prb_bundling_size_ind;
......
......@@ -115,7 +115,8 @@ int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue,
unsigned short nb_rb_pdsch)
{
int32_t qpsk[4],nqpsk[4],*qpsk_p, n;
int w,mprime,ind,l,ind_dword,ind_qpsk_symb,kp,lp, config_type, k;
//int w,mprime,ind,l,ind_dword,ind_qpsk_symb,kp,lp, config_type, k;
int w,ind,ind_dword,ind_qpsk_symb,kp,lp, config_type, k=0;
short pamp;
typedef int array_of_w[2];
......@@ -196,7 +197,7 @@ int nr_pdcch_dmrs_rx(PHY_VARS_NR_UE *ue,
{
uint8_t idx=0;
uint8_t pdcch_rb_offset =0;
//uint8_t pdcch_rb_offset =0;
//nr_gold_pdcch += ((int)floor(ue->frame_parms.ssb_start_subcarrier/12)+pdcch_rb_offset)*3/32;
if (p==2000) {
......
This diff is collapsed.
......@@ -7027,12 +7027,12 @@ int nr_generate_ue_ul_dlsch_params_from_dci(PHY_VARS_NR_UE *ue,
* Note only format0_0 and format1_0 are implemented
*/
uint8_t harq_pid=0;
//uint8_t harq_pid=0;
uint8_t frame_type=frame_parms->frame_type;
uint8_t tpmi=0;
NR_UE_DLSCH_t *dlsch0=NULL,*dlsch1=NULL;
NR_DL_UE_HARQ_t *dlsch0_harq=NULL,*dlsch1_harq=NULL;
NR_UE_ULSCH_t *ulsch0=NULL,*ulsch1=NULL;
//uint8_t tpmi=0;
NR_UE_DLSCH_t *dlsch0=NULL;//*dlsch1=NULL;
NR_DL_UE_HARQ_t *dlsch0_harq=NULL;//*dlsch1_harq=NULL;
NR_UE_ULSCH_t *ulsch0=NULL;//*ulsch1=NULL;
NR_DCI_INFO_EXTRACTED_t *ptr_nr_dci_info_extracted = nr_dci_info_extracted;
......@@ -7046,8 +7046,8 @@ int nr_generate_ue_ul_dlsch_params_from_dci(PHY_VARS_NR_UE *ue,
uint8_t dci_fields_sizes_format[NBR_NR_DCI_FIELDS] ={0};
for (int m=0; m<NBR_NR_DCI_FIELDS; m++) dci_fields_sizes_format[m]=dci_fields_sizes[m][dci_format];
// uint8_t dci_fields_sizes_format[NBR_NR_DCI_FIELDS] ={0};
// for (int m=0; m<NBR_NR_DCI_FIELDS; m++) dci_fields_sizes_format[m]=dci_fields_sizes[m][dci_format];
/*
dlsch0 = dlsch[0];
dlsch0->active = 0;
......
......@@ -144,7 +144,7 @@ char prefix_string[2][9] = {"NORMAL","EXTENDED"};
int nr_initial_sync(PHY_VARS_NR_UE *ue, runmode_t mode)
{
int32_t sync_pos, sync_pos2, k_ssb, N_ssb_crb, sync_pos_slot;
int32_t sync_pos, sync_pos2, sync_pos_slot; // k_ssb, N_ssb_crb,
int32_t metric_fdd_ncp=0;
uint8_t phase_fdd_ncp;
......
......@@ -648,7 +648,7 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
for (i=0; i<16; i++){
printf("unscrambling demod_pbch_e[%d] r = %2.3f i = %2.3f\n", i<<1 , demod_pbch_e[i<<1], demod_pbch_e[(i<<1)+1]);}
//#endif
uint32_t pbch_out;
// uint32_t pbch_out;
//polar decoding de-rate matching
t_nrPolar_paramsPtr nrPolar_params = NULL, currentPtr = NULL;
nr_polar_init(&nrPolar_params,
......@@ -673,7 +673,8 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
nr_pbch_unscrambling(nr_ue_pbch_vars,frame_parms->Nid_cell,nushift,M,NR_POLAR_PBCH_PAYLOAD_BITS,1);
//payload deinterleaving
uint32_t in=0, out=0;
//uint32_t in=0;
uint32_t out=0;
for (int i=0; i<32; i++) {
out |= ((nr_ue_pbch_vars->pbch_a_interleaved>>i)&1)<<(pbch_deinterleaving_pattern[i]);
......
......@@ -89,7 +89,51 @@ fifo_dump_emos_UE emos_dump_UE;
extern double cpuf;
int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
uint32_t frame,
uint8_t nr_tti_rx,
uint8_t eNB_id,
MIMO_mode_t mimo_mode,
uint32_t high_speed_flag,
uint8_t is_secondary_ue,
int nb_coreset_active,
uint16_t symbol_mon,
NR_SEARCHSPACE_TYPE_t searchSpaceType);
uint8_t nr_dci_decoding_procedure(int s,
int p,
PHY_VARS_NR_UE *ue,
NR_DCI_ALLOC_t *dci_alloc,
NR_SEARCHSPACE_TYPE_t searchSpacetype,
int16_t eNB_id,
uint8_t nr_tti_rx,
uint8_t dci_fields_sizes_cnt[MAX_NR_DCI_DECODED_SLOT][NBR_NR_DCI_FIELDS][NBR_NR_FORMATS],
uint16_t n_RB_ULBWP,
uint16_t n_RB_DLBWP,
crc_scrambled_t *crc_scrambled,
format_found_t *format_found,
uint16_t crc_scrambled_values[TOTAL_NBR_SCRAMBLED_VALUES]);
int nr_generate_ue_ul_dlsch_params_from_dci(PHY_VARS_NR_UE *ue,
uint8_t eNB_id,
int frame,
uint8_t nr_tti_rx,
uint32_t dci_pdu[4],
uint16_t rnti,
uint8_t dci_length,
NR_DCI_format_t dci_format,
NR_UE_PDCCH *pdcch_vars,
NR_UE_PDSCH *pdsch_vars,
NR_UE_DLSCH_t **dlsch,
NR_UE_ULSCH_t *ulsch,
NR_DL_FRAME_PARMS *frame_parms,
PDSCH_CONFIG_DEDICATED *pdsch_config_dedicated,
uint8_t beamforming_mode,
uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS][NBR_NR_FORMATS],
uint16_t n_RB_ULBWP,
uint16_t n_RB_DLBWP,
uint16_t crc_scrambled_values[TOTAL_NBR_SCRAMBLED_VALUES],
NR_DCI_INFO_EXTRACTED_t *nr_dci_info_extracted);
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR) || defined(OAI_ADRV9371_ZC706)
extern uint32_t downlink_frequency[MAX_NUM_CCs][4];
......@@ -3155,7 +3199,7 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
nr_tti_rx,nb_searchspace_total);
#endif
// p in TS 38.212 Subclause 10.1, for each active BWP the UE can deal with 3 different CORESETs (including coresetId 0 for common search space)
int nb_coreset_total = NR_NBR_CORESET_ACT_BWP;
//int nb_coreset_total = NR_NBR_CORESET_ACT_BWP;
uint8_t dci_cnt=0;
// this table contains 56 (NBR_NR_DCI_FIELDS) elements for each dci field and format described in TS 38.212. Each element represents the size in bits for each dci field
//uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS][NBR_NR_FORMATS] = {0};
......@@ -3191,7 +3235,7 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
* To be implemented LATER !!!
*/
//int _offset,_index,_M;
int searchSpace_id = pdcch_vars2->searchSpace[nb_searchspace_active].searchSpaceId;
//int searchSpace_id = pdcch_vars2->searchSpace[nb_searchspace_active].searchSpaceId;
/*
* The following code has been removed as it is handled by higher layers (fapi)
if (searchSpace_id == 0){ // Implementing TS 38.213 subclause 13, UE procedure for monitoring Type0-PDCCH common search space
......@@ -3221,16 +3265,16 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
// the searchSpace indicates that we need to monitor PDCCH in current nr_tti_rx
// get the parameters describing the current SEARCHSPACE
// the CORESET id applicable to the current SearchSpace
int searchSpace_coreset_id = pdcch_vars2->searchSpace[nb_searchspace_active].controlResourceSetId;
//int searchSpace_coreset_id = pdcch_vars2->searchSpace[nb_searchspace_active].controlResourceSetId;
// FIXME this variable is a bit string (14 bits) identifying every OFDM symbol in a slot.
// at the moment we will not take into consideration this variable and we will consider that the OFDM symbol offset is always the first OFDM in a symbol
uint16_t symbol_within_slot_mon = pdcch_vars2->searchSpace[nb_searchspace_active].monitoringSymbolWithinSlot;
// get the remaining parameters describing the current SEARCHSPACE: // FIXME! To be defined where we get this information from
NR_UE_SEARCHSPACE_nbrCAND_t num_cand_L1 = pdcch_vars2->searchSpace[nb_searchspace_active].nrofCandidates_aggrlevel1;
NR_UE_SEARCHSPACE_nbrCAND_t num_cand_L2 = pdcch_vars2->searchSpace[nb_searchspace_active].nrofCandidates_aggrlevel2;
NR_UE_SEARCHSPACE_nbrCAND_t num_cand_L4 = pdcch_vars2->searchSpace[nb_searchspace_active].nrofCandidates_aggrlevel4;
NR_UE_SEARCHSPACE_nbrCAND_t num_cand_L8 = pdcch_vars2->searchSpace[nb_searchspace_active].nrofCandidates_aggrlevel8;
NR_UE_SEARCHSPACE_nbrCAND_t num_cand_L16 = pdcch_vars2->searchSpace[nb_searchspace_active].nrofCandidates_aggrlevel16;
//NR_UE_SEARCHSPACE_nbrCAND_t num_cand_L1 = pdcch_vars2->searchSpace[nb_searchspace_active].nrofCandidates_aggrlevel1;
//NR_UE_SEARCHSPACE_nbrCAND_t num_cand_L2 = pdcch_vars2->searchSpace[nb_searchspace_active].nrofCandidates_aggrlevel2;
//NR_UE_SEARCHSPACE_nbrCAND_t num_cand_L4 = pdcch_vars2->searchSpace[nb_searchspace_active].nrofCandidates_aggrlevel4;
//NR_UE_SEARCHSPACE_nbrCAND_t num_cand_L8 = pdcch_vars2->searchSpace[nb_searchspace_active].nrofCandidates_aggrlevel8;
//NR_UE_SEARCHSPACE_nbrCAND_t num_cand_L16 = pdcch_vars2->searchSpace[nb_searchspace_active].nrofCandidates_aggrlevel16;
// FIXME! A table of five enum elements
// searchSpaceType indicates whether this is a common search space or a UE-specific search space
//int searchSpaceType = pdcch_vars2->searchSpace[nb_searchspace_active].searchSpaceType.type;
......@@ -3531,8 +3575,6 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
//printf(">>> example mcs=%d\n",nr_dci_info_extracted.mcs);
//printf(">>> calling MAC with dl_indication DCI_IND\n");
// TODO: check where should we send up this message.
ue->dl_indication.dci_ind=&ue->dci_ind;
ue->if_inst->dl_indication(&ue->dl_indication);
......@@ -3764,7 +3806,7 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
#ifdef DEBUG_PHY_PROC
LOG_D(PHY,"[UE %d][PUSCH] Frame %d nr_tti_rx %d: Found cba rnti %x, format 0, dci_cnt %d\n",
ue->Mod_id,frame_rx,nr_tti_rx,dci_alloc_rx[i].rnti,i);
/*
if (((frame_rx%100) == 0) || (frame_rx < 20))
dump_dci(&ue->frame_parms, &dci_alloc_rx[i]);
......@@ -4022,6 +4064,7 @@ void copy_harq_proc_struct(NR_DL_UE_HARQ_t *harq_processes_dest, NR_DL_UE_HARQ_t
memcpy(harq_ack_dest, current_harq_ack, sizeof(nr_harq_status_t));
}*/
#if 0
void ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_id, PDSCH_t pdsch, NR_UE_DLSCH_t *dlsch0, NR_UE_DLSCH_t *dlsch1, int s0, int s1, int abstraction_flag) {
int nr_tti_rx = proc->nr_tti_rx;
......@@ -4110,6 +4153,8 @@ void ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_id
} // CRNTI active
}
}
#endif
#if 0
void process_rar(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_id, runmode_t mode, int abstraction_flag) {
......@@ -5441,16 +5486,16 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
uint8_t abstraction_flag,uint8_t do_pdcch_flag,runmode_t mode,
relaying_type_t r_type) {
int l,l2;
int pilot1;
int pmch_flag=0;
//int l,l2;
//int pilot1;
//int pmch_flag=0;
int frame_rx = proc->frame_rx;
int nr_tti_rx = proc->nr_tti_rx;
proc->decoder_switch = 0;
//int counter_decoder = 0;
uint8_t next1_thread_id = ue->current_thread_id[nr_tti_rx]== (RX_NB_TH-1) ? 0:(ue->current_thread_id[nr_tti_rx]+1);
uint8_t next2_thread_id = next1_thread_id== (RX_NB_TH-1) ? 0:(next1_thread_id+1);
//uint8_t next1_thread_id = ue->current_thread_id[nr_tti_rx]== (RX_NB_TH-1) ? 0:(ue->current_thread_id[nr_tti_rx]+1);
//uint8_t next2_thread_id = next1_thread_id== (RX_NB_TH-1) ? 0:(next1_thread_id+1);
#if 0
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_RX, VCD_FUNCTION_IN);
......
......@@ -48,6 +48,60 @@
#endif
int8_t nr_ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP, uint8_t eNB_id, uint16_t rnti, sub_frame_t subframe);
uint8_t is_cqi_TXOp(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t gNB_id);
uint8_t is_ri_TXOp(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t gNB_id);
/*
void nr_generate_pucch0(int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
int16_t amp,
int nr_tti_tx,
uint8_t mcs,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint16_t startingPRB);
void nr_generate_pucch1(int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
int nr_tti_tx,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint16_t startingPRB,
uint16_t startingPRB_intraSlotHopping,
uint8_t timeDomainOCC,
uint8_t nr_bit);
void nr_generate_pucch2(int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
int nr_tti_tx,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint8_t nrofPRB,
uint16_t startingPRB,
uint8_t nr_bit);
void nr_generate_pucch3_4(int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms,
pucch_format_nr_t fmt,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
int nr_tti_tx,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint8_t nrofPRB,
uint16_t startingPRB,
uint8_t nr_bit,
uint8_t occ_length_format4,
uint8_t occ_index_format4);
*/
/**************** variables **************************************/
......
......@@ -977,9 +977,9 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(
uint8_t time_domain_ind,
long dmrs_typeA_pos
){
uint8_t k_offset;
uint8_t sliv_S;
uint8_t sliv_L;
uint8_t k_offset=0;
uint8_t sliv_S=0;
uint8_t sliv_L=0;
uint8_t table_5_1_2_1_1_2_time_dom_res_alloc_A[16][3]={ // for PDSCH from TS 38.214 subclause 5.1.2.1.1
{0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?12:11}, // row index 1
{0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?10:9}, // row index 2
......@@ -1108,6 +1108,7 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(
// k_offset = table_5_1_2_1_1_5_time_dom_res_alloc_C[nr_pdci_info_extracted->time_dom_resource_assignment][0];
// sliv_S = table_5_1_2_1_1_5_time_dom_res_alloc_C[nr_pdci_info_extracted->time_dom_resource_assignment][1];
// sliv_L = table_5_1_2_1_1_5_time_dom_res_alloc_C[nr_pdci_info_extracted->time_dom_resource_assignment][2];
dlsch_config_pdu->frame_offset = k_offset;
dlsch_config_pdu->number_symbols = sliv_L;
dlsch_config_pdu->start_symbol = sliv_S;
} /*
......@@ -1120,6 +1121,7 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(
// k_offset = table_6_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][0];
// sliv_S = table_6_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][1];
// sliv_L = table_6_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][2];
ulsch_config_pdu->frame_offset = k_offset;
ulsch_config_pdu->number_symbols = sliv_L;
ulsch_config_pdu->start_symbol = sliv_S;
}
......
......@@ -123,7 +123,7 @@ uint32_t downlink_frequency[MAX_NUM_CCs][4];
int32_t uplink_frequency_offset[MAX_NUM_CCs][4];
static char *conf_config_file_name = NULL;
//static char *conf_config_file_name = NULL;
#if defined(ENABLE_ITTI)
static char *itti_dump_file = NULL;
#endif
......@@ -171,7 +171,7 @@ int codingw = 0;
int fepw = 0;
int rx_input_level_dBm;
static int online_log_messages=0;
//static int online_log_messages=0;
#ifdef XFORMS
extern int otg_enabled;
static char do_forms=0;
......@@ -410,7 +410,7 @@ void exit_fun(const char* s) {
void reset_stats(FL_OBJECT *button, long arg) {
int i,j,k;
//int i,j,k;
/*PHY_VARS_eNB *phy_vars_eNB = PHY_vars_eNB_g[0][0];
for (i=0; i<NUMBER_OF_UE_MAX; i++) {
......@@ -444,10 +444,10 @@ static void *scope_thread(void *arg) {
# ifdef ENABLE_XFORMS_WRITE_STATS
FILE *UE_stats, *eNB_stats;
# endif
int len = 0;
//int len = 0;
struct sched_param sched_param;
int UE_id, CC_id;
int ue_cnt=0;
//int UE_id, CC_id;
//int ue_cnt=0;
sched_param.sched_priority = sched_get_priority_min(SCHED_FIFO)+1;
sched_setscheduler(0, SCHED_FIFO,&sched_param);
......@@ -846,14 +846,14 @@ void init_openair0() {
}
int main( int argc, char **argv ) {
int i,j,k,aa,re;
int i;//j,k,aa,re;
#if defined (XFORMS)
void *status;
#endif
int CC_id;
uint8_t abstraction_flag=0;
uint8_t beta_ACK=0,beta_RI=0,beta_CQI=2;
//uint8_t beta_ACK=0,beta_RI=0,beta_CQI=2;
#if defined (XFORMS)
int ret;
......
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