Commit 4573c0b9 authored by Elena Lukashova's avatar Elena Lukashova

Changes for SIC-receiver:

1. in dlsim.c: now we check for the receiver type and, if SIC,  proceed through encoding, modulation, LLR compuattion and decoding
of the decoded TB0.
2. Implementing routines for vector-vector multiplication and vector-vector subtraction
3. Adding some printouts for debuging purposes.
4. New functions: modulation_SIC, dlsch_qpsk_llr_SIC
5. In phy_scope.c: changing llr plotting: now for the length of coded_bits_per_cw.
parent c7828888
......@@ -123,7 +123,7 @@ endmacro(add_list_string_option)
####################################################
# compilation flags
#############################################
#set (CMAKE_BUILD_TYPE "Debug")
set (CMAKE_BUILD_TYPE "Debug")
if (CMAKE_BUILD_TYPE STREQUAL "")
set(CMAKE_BUILD_TYPE "RelWithDebInfo")
endif()
......@@ -934,6 +934,7 @@ set(PHY_SRC
${OPENAIR1_DIR}/PHY/INIT/lte_parms.c
${OPENAIR1_DIR}/PHY/INIT/lte_param_init.c
${OPENAIR1_DIR}/PHY/TOOLS/file_output.c
${OPENAIR1_DIR}/PHY/TOOLS/cadd_vv.c
${OPENAIR1_DIR}/PHY/TOOLS/lte_dfts.c
${OPENAIR1_DIR}/PHY/TOOLS/log2_approx.c
${OPENAIR1_DIR}/PHY/TOOLS/cmult_sv.c
......
......@@ -742,6 +742,7 @@ typedef enum {
rx_standard=0,
rx_IC_single_stream,
rx_IC_dual_stream,
rx_SIC_dual_stream
} RX_type_t;
typedef enum {
......
......@@ -220,7 +220,7 @@ int rx_pdsch(PHY_VARS_UE *phy_vars_ue,
printf("\n");*/
//#endif
if (rx_type==rx_IC_single_stream) {
if (rx_type >= rx_IC_single_stream) {
if (eNB_id_i<phy_vars_ue->n_connected_eNB) // we are in TM5
nb_rb = dlsch_extract_rbs_dual(lte_ue_common_vars->rxdataF,
lte_ue_common_vars->dl_ch_estimates[eNB_id_i],
......@@ -348,10 +348,10 @@ int rx_pdsch(PHY_VARS_UE *phy_vars_ue,
nb_rb,
lte_ue_pdsch_vars[eNB_id]->log2_maxh,
phy_measurements); // log2_maxh+I0_shift
/*
if (symbol == 5) {
write_output("rxF_comp_d.m","rxF_c_d",&lte_ue_pdsch_vars[eNB_id]->rxdataF_comp0[0][symbol*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,1);
} */
}
if ((rx_type==rx_IC_single_stream) &&
(eNB_id_i<phy_vars_ue->n_connected_eNB)) {
......@@ -452,8 +452,8 @@ int rx_pdsch(PHY_VARS_UE *phy_vars_ue,
nb_rb,
lte_ue_pdsch_vars[eNB_id]->log2_maxh0,
lte_ue_pdsch_vars[eNB_id]->log2_maxh1);
/*
if (symbol == 5) {
if (symbol == 5) {
write_output("rxF_comp_d00.m","rxF_c_d00",&lte_ue_pdsch_vars[eNB_id]->rxdataF_comp0[0][symbol*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,1);// should be QAM
write_output("rxF_comp_d01.m","rxF_c_d01",&lte_ue_pdsch_vars[eNB_id]->rxdataF_comp0[1][symbol*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,1);//should be almost 0
......@@ -461,7 +461,8 @@ int rx_pdsch(PHY_VARS_UE *phy_vars_ue,
write_output("rxF_comp_d11.m","rxF_c_d11",&lte_ue_pdsch_vars[eNB_id]->rxdataF_comp1[harq_pid][round][1][symbol*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,1);//should be QAM
}*/
}
// compute correlation between signal and interference channels (rho12 and rho21)
dlsch_dual_stream_correlation(frame_parms,// this is doing h0'h1, needed for llr[1]
......@@ -485,6 +486,16 @@ int rx_pdsch(PHY_VARS_UE *phy_vars_ue,
lte_ue_pdsch_vars[eNB_id]->log2_maxh1);
// printf("rho stream2 =%d\n",&lte_ue_pdsch_vars[eNB_id]->dl_ch_rho2_ext );
//printf("TM3 log2_maxh : %d\n",lte_ue_pdsch_vars[eNB_id]->log2_maxh);
if (symbol == 5) {
write_output("rho0_0.m","rho0_0",&lte_ue_pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round][0][symbol*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,1);// should be QAM
write_output("rho2_0.m","rho2_0",&lte_ue_pdsch_vars[eNB_id]->dl_ch_rho2_ext[0][symbol*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,1);//should be almost 0
write_output("rho0_1.m.m","rho0_1",&lte_ue_pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round][1][symbol*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,1);//should be almost 0
write_output("rho2_1.m","rho2_1",&lte_ue_pdsch_vars[eNB_id]->dl_ch_rho2_ext[1][symbol*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,1);//should be QAM
}
}
else {
......@@ -664,6 +675,15 @@ int rx_pdsch(PHY_VARS_UE *phy_vars_ue,
symbol,
nb_rb,
1);
if (symbol == 5) {
write_output("rho0_mrc.m","rho0_0",&lte_ue_pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round][0][symbol*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,1);// should be QAM
write_output("rho2_mrc.m","rho2_0",&lte_ue_pdsch_vars[eNB_id]->dl_ch_rho2_ext[0][symbol*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,1);//should be almost 0
}
}
} else {
......@@ -728,7 +748,7 @@ int rx_pdsch(PHY_VARS_UE *phy_vars_ue,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,subframe,symbol),
lte_ue_pdsch_vars[eNB_id]->llr128);
}
else if ((rx_type==rx_IC_single_stream) || (rx_type==rx_IC_dual_stream)) {
else if (rx_type >= rx_IC_single_stream) {
if (dlsch1_harq->Qm == 2) {
dlsch_qpsk_qpsk_llr(frame_parms,
lte_ue_pdsch_vars[eNB_id]->rxdataF_comp0,
......@@ -4705,8 +4725,13 @@ void dump_dlsch2(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint16_t coded_bits_per
*/
sprintf(fname,"dlsch%d_r%d_rho.m",eNB_id,round);
sprintf(vname,"dl_rho_r%d_%d",eNB_id,round);
write_output(fname,vname,phy_vars_ue->lte_ue_pdsch_vars[eNB_id]->dl_ch_rho_ext[0][0][0],12*N_RB_DL*nsymb,1,1);
write_output(fname,vname,phy_vars_ue->lte_ue_pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round][0],12*N_RB_DL*nsymb,1,1);
sprintf(fname,"dlsch%d_r%d_rho2.m",eNB_id,round);
sprintf(vname,"dl_rho2_r%d_%d",eNB_id,round);
write_output(fname,vname,phy_vars_ue->lte_ue_pdsch_vars[eNB_id]->dl_ch_rho2_ext[0],12*N_RB_DL*nsymb,1,1);
sprintf(fname,"dlsch%d_rxF_r%d_comp0.m",eNB_id,round);
sprintf(vname,"dl%d_rxF_r%d_comp0",eNB_id,round);
write_output(fname,vname,phy_vars_ue->lte_ue_pdsch_vars[eNB_id]->rxdataF_comp0[0],12*N_RB_DL*nsymb,1,1);
......
......@@ -1092,6 +1092,8 @@ int allocate_REs_in_RB(LTE_DL_FRAME_PARMS *frame_parms,
return(0);
}
int allocate_REs_in_RB_MCH(mod_sym_t **txdataF,
uint32_t *jj,
uint16_t re_offset,
......@@ -1373,7 +1375,7 @@ int dlsch_modulation(mod_sym_t **txdataF,
mod_order0,
mod_order1,
rb_alloc[0],
l);
len);
#endif
if (frame_parms->Ncp==0) { // normal prefix
......@@ -1559,7 +1561,8 @@ int dlsch_modulation(mod_sym_t **txdataF,
if (rb_alloc_ind > 0) {
// printf("Allocated rb %d/symbol %d, skip_half %d, subframe_offset %d, symbol_offset %d, re_offset %d, jj %d\n",rb,l,skip_half,subframe_offset,symbol_offset,re_offset,jj);
allocate_REs_in_RB(frame_parms,
allocate_REs_in_RB(frame_parms,
txdataF,
&jj,
&jj2,
......@@ -1603,6 +1606,159 @@ int dlsch_modulation(mod_sym_t **txdataF,
return (re_allocated);
}
int dlsch_modulation_SIC(mod_sym_t **sic_buffer,
int16_t amp,
uint32_t subframe_offset,
LTE_DL_FRAME_PARMS *frame_parms,
uint8_t num_pdcch_symbols,
LTE_eNB_DLSCH_t *dlsch0,
LTE_eNB_DLSCH_t *dlsch1,
int G)
{
uint8_t nsymb;
uint8_t harq_pid = dlsch0->current_harq_pid;
LTE_DL_eNB_HARQ_t *dlsch0_harq = dlsch0->harq_processes[harq_pid];
LTE_DL_eNB_HARQ_t *dlsch1_harq; //= dlsch1->harq_processes[harq_pid];
uint32_t i,jj,re_allocated;
uint16_t l,rb,re_offset;
uint32_t *rb_alloc = dlsch0_harq->rb_alloc;
uint8_t mod_order0 = get_Qm(dlsch0_harq->mcs);
uint8_t *x0 = dlsch0_harq->e;
uint8_t qam64_table_offset_re = 0;
uint8_t qam64_table_offset_im = 0;
uint8_t qam16_table_offset_re = 0;
uint8_t qam16_table_offset_im = 0;
int16_t gain_lin_QPSK;
#ifdef DEBUG_DLSCH_MODULATION
uint8_t Nl0 = dlsch0_harq->Nl;
uint8_t Nl1;
#endif
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_MODULATION, VCD_FUNCTION_IN);
amp=1; //we do full scale here for SIC
gain_lin_QPSK = (int16_t)((amp*ONE_OVER_SQRT2_Q15));
jj = 0;
i = 0;
while (jj <= G-1) {
re_allocated = re_allocated + 1;
switch (mod_order0) {
case 2: //QPSK
/* TODO: handle more than 1 antenna */
// printf("%d(%d) : %d,%d => ",tti_offset,*jj,((int16_t*)&txdataF[0][tti_offset])[0],((int16_t*)&txdataF[0][tti_offset])[1]);
((int16_t*)&sic_buffer[0][i])[0] += (x0[jj]==1) ? (-gain_lin_QPSK) : gain_lin_QPSK; //I //b_i
jj = jj + 1;
((int16_t*)&sic_buffer[0][i])[1] += (x0[jj]==1) ? (-gain_lin_QPSK) : gain_lin_QPSK; //Q //b_{i+1}
jj = jj + 1;
// printf("%d,%d\n",((int16_t*)&sic_buffer[0][i])[0],((int16_t*)&sic_buffer[0][i])[1]);
i++;
break;
case 4: //16QAM
qam16_table_offset_re = 0;
qam16_table_offset_im = 0;
if (x0[jj] == 1)
qam16_table_offset_re+=2;
jj=jj+1;
if (x0[jj] == 1)
qam16_table_offset_im+=2;
jj=jj+1;
if (x0[jj] == 1)
qam16_table_offset_re+=1;
jj=jj+1;
if (x0[jj] == 1)
qam16_table_offset_im+=1;
jj=jj+1;
((int16_t *)&sic_buffer[0][i])[0]+=qam16_table[qam16_table_offset_re];
((int16_t *)&sic_buffer[0][i])[0]+=qam16_table[qam16_table_offset_im];
i++;
break;
case 6: //64QAM
qam64_table_offset_re = 0;
qam64_table_offset_im = 0;
if (x0[jj] == 1)
qam64_table_offset_re+=4;
jj=jj+1;
if (x0[jj] == 1)
qam64_table_offset_im+=4;
jj=jj+1;
if (x0[jj] == 1)
qam64_table_offset_re+=2;
jj=jj+1;
if (x0[jj] == 1)
qam64_table_offset_im+=2;
jj=jj+1;
if (x0[jj] == 1)
qam64_table_offset_re+=1;
jj=jj+1;
if (x0[jj] == 1)
qam64_table_offset_im+=1;
jj=jj+1;
((int16_t *)&sic_buffer[0][i])[0]+=qam64_table[qam64_table_offset_re];//(int16_t)(((int32_t)amp*qam64_table[qam64_table_offset_re])>>15);
((int16_t *)&sic_buffer[0][i])[0]+=qam64_table[qam64_table_offset_im];//(int16_t)(((int32_t)amp*qam64_table[qam64_table_offset_im])>>15);
i++;
break;
}
}
#ifdef DEBUG_DLSCH_MODULATION
msg("generate_dlsch : jj = %d,re_allocated = %d (G %d)\n",jj,re_allocated,get_G(frame_parms,dlsch0_harq->nb_rb,dlsch0_harq->rb_alloc,mod_order0,Nl0,2,0,subframe_offset));
#endif
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_MODULATION, VCD_FUNCTION_OUT);
return (re_allocated);
}
int mch_modulation(mod_sym_t **txdataF,
int16_t amp,
uint32_t subframe_offset,
......@@ -1647,7 +1803,7 @@ int mch_modulation(mod_sym_t **txdataF,
if ((frame_parms->N_RB_DL&1) == 1) { // ODD N_RB_DL
if (rb==(frame_parms->N_RB_DL>>1))
if (rb==(frame_parms->N_RB_DL>>1))
skip_dc = 1;
else
skip_dc = 0;
......
......@@ -29,8 +29,7 @@
#include "PHY/defs.h"
#include "PHY/impl_defs_lte.h"
//#define DEBUG_PC
#define DEBUG_PC 0
/*
double ratioPB[2][4]={{ 1.0,4.0/5.0,3.0/5.0,2.0/5.0},
{ 5.0/4.0,1.0,3.0/4.0,1.0/2.0}};
......
......@@ -185,7 +185,6 @@ int32_t allocate_REs_in_RB(LTE_DL_FRAME_PARMS *frame_parms,
uint8_t skip_dc,
uint8_t skip_half);
/** \fn int32_t dlsch_modulation(mod_sym_t **txdataF,
int16_t amp,
uint32_t sub_frame_offset,
......@@ -210,6 +209,15 @@ int32_t dlsch_modulation(mod_sym_t **txdataF,
uint8_t num_pdcch_symbols,
LTE_eNB_DLSCH_t *dlsch0,
LTE_eNB_DLSCH_t *dlsch1);
int32_t dlsch_modulation_SIC(mod_sym_t **sic_buffer,
int16_t amp,
uint32_t sub_frame_offset,
LTE_DL_FRAME_PARMS *frame_parms,
uint8_t num_pdcch_symbols,
LTE_eNB_DLSCH_t *dlsch0,
LTE_eNB_DLSCH_t *dlsch1,
int G);
/*
\brief This function is the top-level routine for generation of the sub-frame signal (frequency-domain) for MCH.
@param txdataF Table of pointers for frequency-domain TX signals
......@@ -710,6 +718,16 @@ int32_t dlsch_qpsk_llr(LTE_DL_FRAME_PARMS *frame_parms,
@param llr128p pointer to pointer to symbol in dlsch_llr
*/
int32_t dlsch_qpsk_llr_SIC(LTE_DL_FRAME_PARMS *frame_parms,
int **rxdataF_comp,
mod_sym_t **sic_buffer,
int **rho_i,
short *dlsch_llr,
uint8_t num_pdcch_symbols,
uint16_t nb_rb,
uint16_t pbch_pss_sss_adjust,
LTE_UE_DLSCH_t *dlsch0);
void dlsch_16qam_llr(LTE_DL_FRAME_PARMS *frame_parms,
int32_t **rxdataF_comp,
int16_t *dlsch_llr,
......@@ -719,7 +737,6 @@ void dlsch_16qam_llr(LTE_DL_FRAME_PARMS *frame_parms,
uint16_t nb_rb,
uint16_t pbch_pss_sss_adjust,
int16_t **llr128p);
/**
\brief This function generates log-likelihood ratios (decoder input) for single-stream 16QAM received waveforms
@param frame_parms Frame descriptor structure
......@@ -732,6 +749,17 @@ void dlsch_16qam_llr(LTE_DL_FRAME_PARMS *frame_parms,
@param nb_rb number of RBs for this allocation
@param pbch_pss_sss_adjust PBCH/PSS/SSS RE adjustment (in REs)
*/
void dlsch_16qam_llr_SIC(LTE_DL_FRAME_PARMS *frame_parms,
int32_t **rxdataF_comp,
int16_t *dlsch_llr,
int32_t **dl_ch_mag,
uint8_t symbol,
uint8_t first_symbol_flag,
uint16_t nb_rb,
uint16_t pbch_pss_sss_adjust,
int16_t **llr128p);
void dlsch_64qam_llr(LTE_DL_FRAME_PARMS *frame_parms,
int32_t **rxdataF_comp,
int16_t *dlsch_llr,
......@@ -743,6 +771,17 @@ void dlsch_64qam_llr(LTE_DL_FRAME_PARMS *frame_parms,
uint16_t pbch_pss_sss_adjust,
short **llr_save);
void dlsch_64qam_llr_SIC(LTE_DL_FRAME_PARMS *frame_parms,
int32_t **rxdataF_comp,
int16_t *dlsch_llr,
int32_t **dl_ch_mag,
int32_t **dl_ch_magb,
uint8_t symbol,
uint8_t first_symbol_flag,
uint16_t nb_rb,
uint16_t pbch_pss_sss_adjust,
short **llr_save);
/** \fn dlsch_siso(LTE_DL_FRAME_PARMS *frame_parms,
int32_t **rxdataF_comp,
int32_t **rxdataF_comp_i,
......
......@@ -65,7 +65,7 @@ int add_cpx_vector(short *x,
int add_vector32_scalar(short *x,
int alpha,
short *y,
unsigned int N)
unsigned int
{
unsigned int i; // loop counter
......
......@@ -9,7 +9,7 @@
OpenAirInterface is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
but WITTOOLHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
......@@ -176,6 +176,37 @@ int add_cpx_vector32(short *x,
return(0);
}
int32_t sub_cpx_vector16(int16_t *x,
int16_t *y,
int16_t *z,
uint32_t N)
{
unsigned int i; // loop counter
__m128i *x_128;
__m128i *y_128;
__m128i *z_128;
x_128 = (__m128i *)&x[0];
y_128 = (__m128i *)&y[0];
z_128 = (__m128i *)&z[0];
for(i=0; i<(N>>3); i++) {
z_128[0] = _mm_subs_epi16(x_128[0],y_128[0]);
x_128++;
y_128++;
z_128++;
}
_mm_empty();
_m_empty();
return(0);
}
int add_real_vector64(short *x,
short* y,
short *z,
......
......@@ -66,18 +66,23 @@ void multadd_complex_vector_real_scalar(int16_t *x,
if (zero_flag == 1)
for (n=0; n<N>>2; n++) {
//print_shorts("x_128[n]=", &x_128[n]);
//print_shorts("alpha_128", &alpha_128);
y_128[n] = mulhi_int16(x_128[n],alpha_128);
//print_shorts("y_128[n]=", &y_128[n]); //Q2.13
}
else
for (n=0; n<N>>2; n++) {
y_128[n] = adds_int16(y_128[n],mulhi_int16(x_128[n],alpha_128));
}
_mm_empty();
_m_empty();
}
void multadd_real_vector_complex_scalar(int16_t *x,
int16_t *alpha,
int16_t *y,
......@@ -387,7 +392,8 @@ int rotate_cpx_vector(int16_t *x,
m3 = _mm_sra_epi32(m3,shift); // shift right by shift in order to compensate for the input amplitude
y_128[0] = _mm_packs_epi32(m2,m3); // pack in 16bit integers with saturation [re im re im re im re im]
#elif defined(__arm__)
print_ints("y_128[0]=", &y_128[0]);
#elif defined(__arm__)
ab_re0 = vmull_s16(((int16x4_t*)xd)[0],((int16x4_t*)&bconj)[0]);
ab_re1 = vmull_s16(((int16x4_t*)xd)[1],((int16x4_t*)&bconj)[1]);
......
......@@ -34,8 +34,12 @@
#if defined(__x86_64__) || defined(__i386__)
int16_t conjug[8]__attribute__((aligned(16))) = {-1,1,-1,1,-1,1,-1,1} ;
int16_t conjug2[8]__attribute__((aligned(16))) = {1,-1,1,-1,1,-1,1,-1} ;
#define simd_q15_t __m128i
#define simdshort_q15_t __m64
#define set1_int16(a) _mm_set1_epi16(a)
#define setr_int16(a0, a1, a2, a3, a4, a5, a6, a7) _mm_setr_epi16(a0, a1, a2, a3, a4, a5, a6, a7 )
#elif defined(__arm__)
int16_t conjug[4]__attribute__((aligned(16))) = {-1,1,-1,1} ;
#define simd_q15_t int16x8_t
......@@ -71,6 +75,7 @@ int mult_cpx_conj_vector(int16_t *x1,
#if defined(__x86_64__) || defined(__i386__)
simd_q15_t tmp_re,tmp_im;
simd_q15_t tmpy0,tmpy1;
#elif defined(__arm__)
int32x4_t tmp_re,tmp_im;
int32x4_t tmp_re1,tmp_im1;
......@@ -82,7 +87,7 @@ int mult_cpx_conj_vector(int16_t *x1,
x2_128 = (simd_q15_t *)&x2[0];
y_128 = (simd_q15_t *)&y[0];
// we compute 4 cpx multiply for each loop
for(i=0; i<(N>>2); i++) {
#if defined(__x86_64__) || defined(__i386__)
......@@ -131,3 +136,74 @@ int mult_cpx_conj_vector(int16_t *x1,
return(0);
}
int mult_cpx_vector(int16_t *x1,
int16_t *x2,
int16_t *y,
uint32_t N,
int output_shift)
{
// Multiply elementwise x1 with x2.
// x1 - input 1 in the format |Re0 Im0 Re1 Im1|,......,|Re(N-2) Im(N-2) Re(N-1) Im(N-1)|
// We assume x1 with a dinamic of 15 bit maximum
//
// x2 - input 2 in the format |Re0 Im0 Re1 Im1|,......,|Re(N-2) Im(N-2) Re(N-1) Im(N-1)|
// We assume x2 with a dinamic of 14 bit maximum
///
// y - output in the format |Re0 Im0 Re1 Im1|,......,|Re(N-2) Im(N-2) Re(N-1) Im(N-1)|
//
// N - the size f the vectors (this function does N cpx mpy. WARNING: N>=4;
//
// output_shift - shift to be applied to generate output
uint32_t i; // loop counter
simd_q15_t *x1_128;
simd_q15_t *x2_128;
simd_q15_t *y_128;
simd_q15_t tmp_re,tmp_im;
simd_q15_t tmpy0,tmpy1;
x1_128 = (simd_q15_t *)&x1[0];
x2_128 = (simd_q15_t *)&x2[0];
y_128 = (simd_q15_t *)&y[0];
//print_shorts("x1_128:",&x1_128[0]);
//print_shorts("x2_128:",&x2_128[0]);
//right shift by 13 while p_a * x0 and 15 while
// we compute 4 cpx multiply for each loop
for(i=0; i<(N>>2); i++) {
tmp_re = _mm_sign_epi16(*x1_128,*(__m128i*)&conjug2[0]);
//print_shorts("tmp_re1:",&tmp_re[i]);
tmp_re = _mm_madd_epi16(tmp_re,*x2_128);
//print_ints("tmp_re2:",&tmp_re[i]);
tmp_im = _mm_shufflelo_epi16(*x1_128,_MM_SHUFFLE(2,3,0,1));
//print_shorts("tmp_im1:",&tmp_im[i]);
tmp_im = _mm_shufflehi_epi16(tmp_im,_MM_SHUFFLE(2,3,0,1));
//print_shorts("tmp_im2:",&tmp_im[i]);
tmp_im = _mm_madd_epi16(tmp_im, *x2_128);
//print_ints("tmp_im3:",&tmp_im[i]);
tmp_re = _mm_srai_epi32(tmp_re,output_shift);
//print_ints("tmp_re shifted:",&tmp_re[i]);
tmp_im = _mm_srai_epi32(tmp_im,output_shift);
//print_ints("tmp_im shifted:",&tmp_im[i]);
tmpy0 = _mm_unpacklo_epi32(tmp_re,tmp_im);
//print_ints("unpack lo :",&tmpy0[i]);
tmpy1 = _mm_unpackhi_epi32(tmp_re,tmp_im);
//print_ints("mrc rho0:",&tmpy1[i]);
*y_128 = _mm_packs_epi32(tmpy0,tmpy1);
//print_shorts("*y_128:",&y_128[i]);
x1_128++;
x2_128++;
y_128++;
}
_mm_empty();
_m_empty();
return(0);
}
......@@ -131,6 +131,12 @@ int mult_cpx_conj_vector(int16_t *x1,
uint32_t N,
int output_shift);
int mult_cpx_vector(int16_t *x1,
int16_t *x2,
int16_t *y,
uint32_t N,
int output_shift);
// lte_dfts.c
void init_fft(uint16_t size,
uint8_t logsize,
......@@ -214,6 +220,11 @@ int32_t add_cpx_vector(int16_t *x,
int16_t *y,
uint32_t N);
int32_t sub_cpx_vector16(int16_t *x,
int16_t *y,
int16_t *z,
uint32_t N);
int32_t add_cpx_vector32(int16_t *x,
int16_t *y,
int16_t *z,
......
......@@ -768,13 +768,13 @@ void phy_scope_UE(FD_lte_phy_scope_ue *form,
// PDSCH LLRs CW0
if (pdsch_llr != NULL) {
for (i=0; i<coded_bits_per_codeword0/mod0; i++) {
llr[i] = (float) pdsch_llr[mod0*i];
for (i=0; i<coded_bits_per_codeword0; i++) {
llr[i] = (float) pdsch_llr[i];
bit[i] = (float) i;
}
fl_set_xyplot_xbounds(form->pdsch_llr,0,coded_bits_per_codeword0/mod0);
fl_set_xyplot_data(form->pdsch_llr,bit,llr,coded_bits_per_codeword0/mod0,"","","");
fl_set_xyplot_xbounds(form->pdsch_llr,0,coded_bits_per_codeword0);
fl_set_xyplot_data(form->pdsch_llr,bit,llr,coded_bits_per_codeword0,"","","");
}
// PDSCH I/Q of MF Output
......@@ -836,13 +836,13 @@ void phy_scope_UE(FD_lte_phy_scope_ue *form,
// PDSCH LLRs CW1
if (pdsch_llr1 != NULL) {
for (i=0; i<coded_bits_per_codeword1/mod1; i++) {
llr[i] = (float) pdsch_llr1[mod1*i];
for (i=0; i<coded_bits_per_codeword1; i++) {
llr[i] = (float) pdsch_llr1[i];
bit[i] = (float) i;
}
fl_set_xyplot_xbounds(form->pdsch_llr1,0,coded_bits_per_codeword1/mod1);
fl_set_xyplot_data(form->pdsch_llr1,bit,llr,coded_bits_per_codeword1/mod1,"","","");
fl_set_xyplot_xbounds(form->pdsch_llr1,0,coded_bits_per_codeword1);
fl_set_xyplot_data(form->pdsch_llr1,bit,llr,coded_bits_per_codeword1,"","","");
}
// PDSCH I/Q of MF Output
......
......@@ -3873,4 +3873,3 @@ void phy_procedures_eNB_lte(unsigned char subframe,PHY_VARS_eNB **phy_vars_eNB,u
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_LTE,0);
stop_meas(&phy_vars_eNB[0]->phy_proc);
}
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