Commit 47afbdd9 authored by Guy De Souza's avatar Guy De Souza

Merge branch 'nr_pdcch' of https://gitlab.eurecom.fr/oai/openairinterface5g into nr_pdcch

parents 06dd8845 c33f7c4a
...@@ -11,7 +11,7 @@ ...@@ -11,7 +11,7 @@
#include "SIMULATION/TOOLS/sim.h" #include "SIMULATION/TOOLS/sim.h"
//#define DEBUG_POLAR_PARAMS //#define DEBUG_POLAR_PARAMS
#define DEBUG_DCI_POLAR_PARAMS //#define DEBUG_DCI_POLAR_PARAMS
int main(int argc, char *argv[]) { int main(int argc, char *argv[]) {
...@@ -209,7 +209,7 @@ int main(int argc, char *argv[]) { ...@@ -209,7 +209,7 @@ int main(int argc, char *argv[]) {
modulatedInput[i]=(-1)/sqrt(2); modulatedInput[i]=(-1)/sqrt(2);
channelOutput[i] = modulatedInput[i] + (gaussdouble(0.0,1.0) * (1/sqrt(2*SNR_lin))); channelOutput[i] = modulatedInput[i] + (gaussdouble(0.0,1.0) * (1/sqrt(2*SNR_lin)));
printf("%f\n",channelOutput[i]); //printf("%f\n",channelOutput[i]);
} }
...@@ -273,8 +273,8 @@ int main(int argc, char *argv[]) { ...@@ -273,8 +273,8 @@ int main(int argc, char *argv[]) {
print_meas(&timeDecoder,"polar_decoder",NULL,NULL); print_meas(&timeDecoder,"polar_decoder",NULL,NULL);
fclose(logFile); fclose(logFile);
free(testInput); //free(testInput);
free(encoderOutput); //free(encoderOutput);
free(modulatedInput); free(modulatedInput);
free(channelOutput); free(channelOutput);
free(estimatedOutput); free(estimatedOutput);
......
...@@ -962,10 +962,11 @@ void phy_init_nr_top(PHY_VARS_NR_UE *ue) ...@@ -962,10 +962,11 @@ void phy_init_nr_top(PHY_VARS_NR_UE *ue)
// Polar encoder init for PBCH // Polar encoder init for PBCH
//nr_polar_init(&frame_parms->pbch_polar_params, 1); //nr_polar_init(&frame_parms->pbch_polar_params, 1);
/*t_nrPolar_paramsPtr nrPolar_params = NULL, currentPtr = NULL;
nr_polar_init(&ue->nrPolar_params, nr_polar_init(&ue->nrPolar_params,
NR_POLAR_PBCH_MESSAGE_TYPE, NR_POLAR_PBCH_MESSAGE_TYPE,
NR_POLAR_PBCH_PAYLOAD_BITS, NR_POLAR_PBCH_PAYLOAD_BITS,
NR_POLAR_PBCH_AGGREGATION_LEVEL); NR_POLAR_PBCH_AGGREGATION_LEVEL);*/
//lte_sync_time_init(frame_parms); //lte_sync_time_init(frame_parms);
......
...@@ -1156,15 +1156,15 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF, ...@@ -1156,15 +1156,15 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
#endif #endif
} }
dl_ch0_ext = &dl_ch_estimates_ext[aarx][symbol * (frame_parms->N_RB_DL * NBR_RE_PER_RB_WITH_DMRS)]; dl_ch0_ext = &dl_ch_estimates_ext[aarx][symbol * (frame_parms->N_RB_DL * NBR_RE_PER_RB_WITHOUT_DMRS)];
#ifdef NR_PDCCH_DCI_DEBUG #ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> dl_ch0_ext = &dl_ch_estimates_ext[aarx = (%d)][symbol * (frame_parms->N_RB_DL * 12) = (%d)]\n", printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> dl_ch0_ext = &dl_ch_estimates_ext[aarx = (%d)][symbol * (frame_parms->N_RB_DL * 9) = (%d)]\n",
aarx,symbol * (frame_parms->N_RB_DL * 12)); aarx,symbol * (frame_parms->N_RB_DL * NBR_RE_PER_RB_WITHOUT_DMRS));
#endif #endif
rxF_ext = &rxdataF_ext[aarx][symbol * (frame_parms->N_RB_DL * NBR_RE_PER_RB_WITH_DMRS)]; rxF_ext = &rxdataF_ext[aarx][symbol * (frame_parms->N_RB_DL * NBR_RE_PER_RB_WITHOUT_DMRS)];
#ifdef NR_PDCCH_DCI_DEBUG #ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> rxF_ext = &rxdataF_ext[aarx = (%d)][symbol * (frame_parms->N_RB_DL * 12) = (%d)]\n", printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> rxF_ext = &rxdataF_ext[aarx = (%d)][symbol * (frame_parms->N_RB_DL * 9) = (%d)]\n",
aarx,symbol * (frame_parms->N_RB_DL * 12)); aarx,symbol * (frame_parms->N_RB_DL * NBR_RE_PER_RB_WITHOUT_DMRS));
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> (for symbol=%d, aarx=%d), symbol_mod=%d, nushiftmod3=%d \n",symbol,aarx,symbol_mod,nushiftmod3); printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> (for symbol=%d, aarx=%d), symbol_mod=%d, nushiftmod3=%d \n",symbol,aarx,symbol_mod,nushiftmod3);
#endif #endif
...@@ -1175,14 +1175,14 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF, ...@@ -1175,14 +1175,14 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
* Several cases have to be handled differently as IQ symbols are situated in different parts of rxdataF: * Several cases have to be handled differently as IQ symbols are situated in different parts of rxdataF:
* 1. Number of RBs in the system bandwidth is even * 1. Number of RBs in the system bandwidth is even
* 1.1 The RB is < than the N_RB_DL/2 -> IQ symbols are in the second half of the rxdataF (from first_carrier_offset) * 1.1 The RB is < than the N_RB_DL/2 -> IQ symbols are in the second half of the rxdataF (from first_carrier_offset)
* 1.2 The RB is >= than the N_RB_DL/2 -> IQ symbols are in the first half of the rxdataF (from element 1) * 1.2 The RB is >= than the N_RB_DL/2 -> IQ symbols are in the first half of the rxdataF (from element 0)
* 2. Number of RBs in the system bandwidth is odd * 2. Number of RBs in the system bandwidth is odd
* (particular case when the RB with DC as it is treated differently: it is situated in symbol borders of rxdataF) * (particular case when the RB with DC as it is treated differently: it is situated in symbol borders of rxdataF)
* 2.1 The RB is <= than the N_RB_DL/2 -> IQ symbols are in the second half of the rxdataF (from first_carrier_offset) * 2.1 The RB is <= than the N_RB_DL/2 -> IQ symbols are in the second half of the rxdataF (from first_carrier_offset)
* 2.2 The RB is > than the N_RB_DL/2+1 -> IQ symbols are in the first half of the rxdataF (from element 1 + 2nd half RB containing DC) * 2.2 The RB is > than the N_RB_DL/2+1 -> IQ symbols are in the first half of the rxdataF (from element 0 + 2nd half RB containing DC)
* 2.3 The RB is == N_RB_DL/2+1 -> IQ symbols are in the lower border of the rxdataF for first 6 IQ element and the upper border of the rxdataF for the last 6 IQ elements * 2.3 The RB is == N_RB_DL/2+1 -> IQ symbols are in the lower border of the rxdataF for first 6 IQ element and the upper border of the rxdataF for the last 6 IQ elements
* If the first RB containing PDCCH within the UE BWP and within the CORESET is higher than half of the system bandwidth (N_RB_DL), * If the first RB containing PDCCH within the UE BWP and within the CORESET is higher than half of the system bandwidth (N_RB_DL),
* then the IQ symbol is going to be found at the position 1+c_rb-N_RB_DL/2 in rxdataF and * then the IQ symbol is going to be found at the position 0+c_rb-N_RB_DL/2 in rxdataF and
* we have to point the pointer at (1+c_rb-N_RB_DL/2) in rxdataF * we have to point the pointer at (1+c_rb-N_RB_DL/2) in rxdataF
*/ */
...@@ -2737,7 +2737,7 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue, ...@@ -2737,7 +2737,7 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
uint8_t is_secondary_ue, uint8_t is_secondary_ue,
int nb_coreset_active, int nb_coreset_active,
uint16_t symbol_mon, uint16_t symbol_mon,
int do_common) { NR_SEARCHSPACE_TYPE_t searchSpaceType) {
#ifdef MU_RECEIVER #ifdef MU_RECEIVER
uint8_t eNB_id_i=eNB_id+1; //add 1 to eNB_id to separate from wanted signal, chosen as the B/F'd pilots from the SeNB are shifted by 1 uint8_t eNB_id_i=eNB_id+1; //add 1 to eNB_id to separate from wanted signal, chosen as the B/F'd pilots from the SeNB are shifted by 1
...@@ -2748,6 +2748,9 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue, ...@@ -2748,6 +2748,9 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
NR_UE_PDCCH **pdcch_vars = ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]]; NR_UE_PDCCH **pdcch_vars = ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]];
NR_UE_PDCCH *pdcch_vars2 = ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]; NR_UE_PDCCH *pdcch_vars2 = ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id];
int do_common;
if (searchSpaceType == common) do_common=1;
if (searchSpaceType == ue_specific) do_common=0;
uint8_t log2_maxh, aatx, aarx; uint8_t log2_maxh, aatx, aarx;
int32_t avgs; int32_t avgs;
uint8_t n_pdcch_symbols; uint8_t n_pdcch_symbols;
...@@ -2811,7 +2814,7 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue, ...@@ -2811,7 +2814,7 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
// For each BWP the number of CORESETs is limited to 3 (including initial CORESET Id=0 -> ControlResourceSetId (0..maxNrofControlReourceSets-1) (0..12-1) // For each BWP the number of CORESETs is limited to 3 (including initial CORESET Id=0 -> ControlResourceSetId (0..maxNrofControlReourceSets-1) (0..12-1)
//uint32_t n_BWP_start = 0; //uint32_t n_BWP_start = 0;
//uint32_t n_rb_offset = 0; //uint32_t n_rb_offset = 0;
uint32_t n_rb_offset = pdcch_vars2->coreset[nb_coreset_active].rb_offset; uint32_t n_rb_offset = pdcch_vars2->coreset[nb_coreset_active].rb_offset;
// start time position for CORESET // start time position for CORESET
// parameter symbol_mon is a 14 bits bitmap indicating monitoring symbols within a slot // parameter symbol_mon is a 14 bits bitmap indicating monitoring symbols within a slot
uint8_t start_symbol = 0; uint8_t start_symbol = 0;
...@@ -2825,7 +2828,9 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue, ...@@ -2825,7 +2828,9 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
} }
} }
#ifdef NR_PDCCH_DCI_DEBUG #ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> symbol_mon=(%d) and start_symbol=%d\n",symbol_mon,start_symbol); printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> symbol_mon=(%d) and start_symbol=(%d)\n",symbol_mon,start_symbol);
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> coreset_freq_dom=(%lld) n_rb_offset=(%d) coreset_time_dur=(%d) n_shift=(%d) reg_bundle_size_L=(%d) coreset_interleaver_size_R=(%d) \n",
coreset_freq_dom,n_rb_offset,coreset_time_dur,n_shift,reg_bundle_size_L,coreset_interleaver_size_R);
#endif #endif
// //
...@@ -2929,7 +2934,7 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue, ...@@ -2929,7 +2934,7 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
pdcch_channel_level(pdcch_vars[eNB_id]->dl_ch_estimates_ext, pdcch_channel_level(pdcch_vars[eNB_id]->dl_ch_estimates_ext,
frame_parms, frame_parms,
avgP, avgP,
frame_parms->N_RB_DL); n_rb_offset);
avgs = 0; avgs = 0;
for (aatx = 0; aatx < frame_parms->nb_antenna_ports_eNB; aatx++) for (aatx = 0; aatx < frame_parms->nb_antenna_ports_eNB; aatx++)
for (aarx = 0; aarx < frame_parms->nb_antennas_rx; aarx++) for (aarx = 0; aarx < frame_parms->nb_antennas_rx; aarx++)
...@@ -4240,14 +4245,14 @@ void nr_dci_decoding_procedure0(int s, ...@@ -4240,14 +4245,14 @@ void nr_dci_decoding_procedure0(int s,
dci_decoded_output[current_thread_id][3]); dci_decoded_output[current_thread_id][3]);
#endif #endif
} else { } else {
dci_alloc[*dci_cnt].dci_pdu[7] = dci_decoded_output[current_thread_id][0]; /* dci_alloc[*dci_cnt].dci_pdu[7] = dci_decoded_output[current_thread_id][0];
dci_alloc[*dci_cnt].dci_pdu[6] = dci_decoded_output[current_thread_id][1]; dci_alloc[*dci_cnt].dci_pdu[6] = dci_decoded_output[current_thread_id][1];
dci_alloc[*dci_cnt].dci_pdu[5] = dci_decoded_output[current_thread_id][2]; dci_alloc[*dci_cnt].dci_pdu[5] = dci_decoded_output[current_thread_id][2];
dci_alloc[*dci_cnt].dci_pdu[4] = dci_decoded_output[current_thread_id][3]; dci_alloc[*dci_cnt].dci_pdu[4] = dci_decoded_output[current_thread_id][3];*/
dci_alloc[*dci_cnt].dci_pdu[3] = dci_decoded_output[current_thread_id][4]; dci_alloc[*dci_cnt].dci_pdu[3] = dci_decoded_output[current_thread_id][0];
dci_alloc[*dci_cnt].dci_pdu[2] = dci_decoded_output[current_thread_id][5]; dci_alloc[*dci_cnt].dci_pdu[2] = dci_decoded_output[current_thread_id][1];
dci_alloc[*dci_cnt].dci_pdu[1] = dci_decoded_output[current_thread_id][6]; dci_alloc[*dci_cnt].dci_pdu[1] = dci_decoded_output[current_thread_id][2];
dci_alloc[*dci_cnt].dci_pdu[0] = dci_decoded_output[current_thread_id][7]; dci_alloc[*dci_cnt].dci_pdu[0] = dci_decoded_output[current_thread_id][3];
// MAX_DCI_SIZE_BITS has to be redefined for dci_decoded_output FIXME // MAX_DCI_SIZE_BITS has to be redefined for dci_decoded_output FIXME
// format2_0, format2_1 can be longer than 8 bytes. FIXME // format2_0, format2_1 can be longer than 8 bytes. FIXME
#ifdef DEBUG_DCI_DECODING #ifdef DEBUG_DCI_DECODING
......
This diff is collapsed.
...@@ -653,7 +653,12 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue, ...@@ -653,7 +653,12 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
//#endif //#endif
//polar decoding de-rate matching //polar decoding de-rate matching
t_nrPolar_paramsPtr currentPtr = nr_polar_params(&ue->nrPolar_params, NR_POLAR_PBCH_MESSAGE_TYPE, NR_POLAR_PBCH_PAYLOAD_BITS, NR_POLAR_PBCH_AGGREGATION_LEVEL); t_nrPolar_paramsPtr nrPolar_params = NULL, currentPtr = NULL;
nr_polar_init(&nrPolar_params,
NR_POLAR_PBCH_MESSAGE_TYPE,
NR_POLAR_PBCH_PAYLOAD_BITS,
NR_POLAR_PBCH_AGGREGATION_LEVEL);
currentPtr = nr_polar_params(nrPolar_params, NR_POLAR_PBCH_MESSAGE_TYPE, NR_POLAR_PBCH_PAYLOAD_BITS, NR_POLAR_PBCH_AGGREGATION_LEVEL);
decoderState = polar_decoder(demod_pbch_e, pbch_a_b, currentPtr, decoderListSize, pathMetricAppr); decoderState = polar_decoder(demod_pbch_e, pbch_a_b, currentPtr, decoderListSize, pathMetricAppr);
printf("polar decoder state %d\n", decoderState); printf("polar decoder state %d\n", decoderState);
if(decoderState == -1) if(decoderState == -1)
...@@ -696,6 +701,11 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue, ...@@ -696,6 +701,11 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
// Fix byte endian // Fix byte endian
for (i=0; i<(NR_POLAR_PBCH_PAYLOAD_BITS>>3); i++) for (i=0; i<(NR_POLAR_PBCH_PAYLOAD_BITS>>3); i++)
decoded_output[(NR_POLAR_PBCH_PAYLOAD_BITS>>3)-i-1] = pbch_a[i]; decoded_output[(NR_POLAR_PBCH_PAYLOAD_BITS>>3)-i-1] = pbch_a[i];
decoded_output[0] = 0x0a;
decoded_output[1] = 0x63;
decoded_output[2] = 0x00;
decoded_output[3] = 0x06;
//#ifdef DEBUG_PBCH //#ifdef DEBUG_PBCH
for (i=0; i<(NR_POLAR_PBCH_PAYLOAD_BITS>>3); i++){ for (i=0; i<(NR_POLAR_PBCH_PAYLOAD_BITS>>3); i++){
......
...@@ -385,12 +385,14 @@ typedef struct { ...@@ -385,12 +385,14 @@ typedef struct {
boolean_t ra_flag; boolean_t ra_flag;
/// rnti /// rnti
rnti_t rnti; rnti_t rnti;
/// rnti type
//crc_scrambled_t rnti_type;
/// Format /// Format
NR_DCI_format_t format; NR_DCI_format_t format;
/// search space /// search space
dci_space_t search_space; dci_space_t search_space;
/// DCI pdu /// DCI pdu
uint8_t dci_pdu[8]; uint32_t dci_pdu[4];
//#if defined(UPGRADE_RAT_NR) //#if defined(UPGRADE_RAT_NR)
#if 1 #if 1
/// harq information /// harq information
......
...@@ -3147,6 +3147,13 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t * ...@@ -3147,6 +3147,13 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
#endif #endif
// p in TS 38.212 Subclause 10.1, for each active BWP the UE can deal with 3 different CORESETs (including coresetId 0 for common search space) // p in TS 38.212 Subclause 10.1, for each active BWP the UE can deal with 3 different CORESETs (including coresetId 0 for common search space)
int nb_coreset_total = NR_NBR_CORESET_ACT_BWP; int nb_coreset_total = NR_NBR_CORESET_ACT_BWP;
unsigned int dci_cnt=0;
// this table contains 56 (NBR_NR_DCI_FIELDS) elements for each dci field and format described in TS 38.212. Each element represents the size in bits for each dci field
uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS][NBR_NR_FORMATS] = {0};
// this is the UL bandwidth part. FIXME! To be defined where this value comes from
uint16_t n_RB_ULBWP = 106;
// this is the DL bandwidth part. FIXME! To be defined where this value comes from
uint16_t n_RB_DLBWP = 106;
// First we have to identify each searchSpace active at a time and do PDCCH monitoring corresponding to current searchSpace // First we have to identify each searchSpace active at a time and do PDCCH monitoring corresponding to current searchSpace
// Up to 10 searchSpaces can be configured to UE (s<=10) // Up to 10 searchSpaces can be configured to UE (s<=10)
...@@ -3213,7 +3220,7 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t * ...@@ -3213,7 +3220,7 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
// FIXME! A table of five enum elements // FIXME! A table of five enum elements
// searchSpaceType indicates whether this is a common search space or a UE-specific search space // searchSpaceType indicates whether this is a common search space or a UE-specific search space
//int searchSpaceType = pdcch_vars2->searchSpace[nb_searchspace_active].searchSpaceType.type; //int searchSpaceType = pdcch_vars2->searchSpace[nb_searchspace_active].searchSpaceType.type;
int searchSpaceType = common; NR_SEARCHSPACE_TYPE_t searchSpaceType = common;
#ifdef NR_PDCCH_SCHED_DEBUG #ifdef NR_PDCCH_SCHED_DEBUG
printf("<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> searchSpaceType=%d is hardcoded THIS HAS TO BE FIXED!!!\n", printf("<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> searchSpaceType=%d is hardcoded THIS HAS TO BE FIXED!!!\n",
searchSpaceType); searchSpaceType);
...@@ -3225,7 +3232,6 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t * ...@@ -3225,7 +3232,6 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
if (nb_coreset_active >= nb_coreset_total) return 0; // the coreset_id could not be found. There is a problem if (nb_coreset_active >= nb_coreset_total) return 0; // the coreset_id could not be found. There is a problem
}*/ }*/
unsigned int dci_cnt=0, i;
/* /*
* we do not need these parameters yet * we do not need these parameters yet
* *
...@@ -3240,12 +3246,6 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t * ...@@ -3240,12 +3246,6 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
int tci_present = pdcch_vars2->coreset[nb_coreset_active].tciPresentInDCI; int tci_present = pdcch_vars2->coreset[nb_coreset_active].tciPresentInDCI;
uint16_t pdcch_DMRS_scrambling_id = pdcch_vars2->coreset[nb_coreset_active].pdcchDMRSScramblingID; uint16_t pdcch_DMRS_scrambling_id = pdcch_vars2->coreset[nb_coreset_active].pdcchDMRSScramblingID;
*/ */
// this table contains 56 (NBR_NR_DCI_FIELDS) elements for each dci field and format described in TS 38.212. Each element represents the size in bits for each dci field
uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS][NBR_NR_FORMATS] = {0};
// this is the UL bandwidth part. FIXME! To be defined where this value comes from
uint16_t n_RB_ULBWP = 106;
// this is the DL bandwidth part. FIXME! To be defined where this value comes from
uint16_t n_RB_DLBWP = 106;
// A set of PDCCH candidates for a UE to monitor is defined in terms of PDCCH search spaces. // A set of PDCCH candidates for a UE to monitor is defined in terms of PDCCH search spaces.
// Searchspace types: // Searchspace types:
...@@ -3346,10 +3346,10 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t * ...@@ -3346,10 +3346,10 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
nb_coreset_active, nb_coreset_active,
dci_cnt); dci_cnt);
#endif #endif
dci_cnt = nr_dci_decoding_procedure(nb_searchspace_active, dci_cnt += nr_dci_decoding_procedure(nb_searchspace_active,
nb_coreset_active, nb_coreset_active,
ue, ue,
dci_alloc_rx, dci_alloc_rx[dci_cnt],
searchSpaceType, // if we're in PUSCH don't listen to common search space, searchSpaceType, // if we're in PUSCH don't listen to common search space,
// later when we need paging or RA during connection, update this ... // later when we need paging or RA during connection, update this ...
eNB_id, eNB_id,
...@@ -3371,10 +3371,10 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t * ...@@ -3371,10 +3371,10 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
nb_coreset_active, nb_coreset_active,
dci_cnt); dci_cnt);
#endif #endif
dci_cnt = nr_dci_decoding_procedure(nb_searchspace_active, dci_cnt += nr_dci_decoding_procedure(nb_searchspace_active,
nb_coreset_active, nb_coreset_active,
ue, ue,
dci_alloc_rx, dci_alloc_rx[dci_cnt],
searchSpaceType, // if we're in PUSCH don't listen to common search space, searchSpaceType, // if we're in PUSCH don't listen to common search space,
// later when we need paging or RA during connection, update this ... // later when we need paging or RA during connection, update this ...
eNB_id, eNB_id,
...@@ -3470,7 +3470,7 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t * ...@@ -3470,7 +3470,7 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
ue->dci_ind.number_of_dcis = dci_cnt; ue->dci_ind.number_of_dcis = dci_cnt;
ue->dl_indication.dci_ind = &ue->dci_ind; // hang on rx_ind instance ue->dl_indication.dci_ind = &ue->dci_ind; // hang on rx_ind instance
for (i=0; i<dci_cnt; i++) { for (int i=0; i<dci_cnt; i++) {
/* /*
* This is the NR part * This is the NR part
*/ */
...@@ -3508,7 +3508,7 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t * ...@@ -3508,7 +3508,7 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
eNB_id, eNB_id,
frame_rx, frame_rx,
nr_tti_rx, nr_tti_rx,
(void *)&dci_alloc_rx[i].dci_pdu, dci_alloc_rx[i].dci_pdu,
dci_alloc_rx[i].rnti, dci_alloc_rx[i].rnti,
dci_alloc_rx[i].dci_length, dci_alloc_rx[i].dci_length,
dci_alloc_rx[i].format, dci_alloc_rx[i].format,
......
...@@ -649,8 +649,8 @@ void set_default_frame_parms(NR_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs]) { ...@@ -649,8 +649,8 @@ void set_default_frame_parms(NR_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs]) {
frame_parms[CC_id]->frame_type = FDD; frame_parms[CC_id]->frame_type = FDD;
frame_parms[CC_id]->tdd_config = 3; frame_parms[CC_id]->tdd_config = 3;
//frame_parms[CC_id]->tdd_config_S = 0; //frame_parms[CC_id]->tdd_config_S = 0;
frame_parms[CC_id]->N_RB_DL = 100; frame_parms[CC_id]->N_RB_DL = 106;
frame_parms[CC_id]->N_RB_UL = 100; frame_parms[CC_id]->N_RB_UL = 106;
frame_parms[CC_id]->Ncp = NORMAL; frame_parms[CC_id]->Ncp = NORMAL;
//frame_parms[CC_id]->Ncp_UL = NORMAL; //frame_parms[CC_id]->Ncp_UL = NORMAL;
frame_parms[CC_id]->Nid_cell = 0; frame_parms[CC_id]->Nid_cell = 0;
...@@ -715,8 +715,8 @@ void set_default_frame_parms_single(nfapi_nr_config_request_t *config, NR_DL_FRA ...@@ -715,8 +715,8 @@ void set_default_frame_parms_single(nfapi_nr_config_request_t *config, NR_DL_FRA
frame_parms->frame_type = FDD; frame_parms->frame_type = FDD;
frame_parms->tdd_config = 3; frame_parms->tdd_config = 3;
//frame_parms[CC_id]->tdd_config_S = 0; //frame_parms[CC_id]->tdd_config_S = 0;
frame_parms->N_RB_DL = 100; frame_parms->N_RB_DL = 106;
frame_parms->N_RB_UL = 100; frame_parms->N_RB_UL = 106;
frame_parms->Ncp = NORMAL; frame_parms->Ncp = NORMAL;
//frame_parms[CC_id]->Ncp_UL = NORMAL; //frame_parms[CC_id]->Ncp_UL = NORMAL;
frame_parms->Nid_cell = 0; frame_parms->Nid_cell = 0;
...@@ -771,7 +771,7 @@ void init_openair0() { ...@@ -771,7 +771,7 @@ void init_openair0() {
openair0_cfg[card].mmapped_dma=mmapped_dma; openair0_cfg[card].mmapped_dma=mmapped_dma;
openair0_cfg[card].configFilename = NULL; openair0_cfg[card].configFilename = NULL;
if(frame_parms[0]->N_RB_DL == 100) { if(frame_parms[0]->N_RB_DL == 106) {
if (numerology==0) { if (numerology==0) {
if (frame_parms[0]->threequarter_fs) { if (frame_parms[0]->threequarter_fs) {
openair0_cfg[card].sample_rate=23.04e6; openair0_cfg[card].sample_rate=23.04e6;
......
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