Commit 5520c2eb authored by Guy De Souza's avatar Guy De Souza

DL Freq alloc type 1

parent 8a1005a1
......@@ -318,6 +318,11 @@ typedef enum {
NFAPI_NR_PDSCH_MAPPING_TYPE_B
} nfapi_nr_pdsch_mapping_type_e;
typedef enum {
NFAPI_NR_PDSCH_RBG_CONFIG_TYPE1=0,
NFAPI_NR_PDSCH_RBG_CONFIG_TYPE2
} nfapi_nr_pdsch_rbg_config_type_e;
// P7 Sub Structures
typedef struct {
......
......@@ -20,7 +20,7 @@
*/
/*! \file PHY/NR_TRANSPORT/nr_dci.c
* \brief Implements DCI encoding/decoding and PDCCH TX/RX procedures (38.212/38.213/38.214). V15.2.0 2018-06.
* \brief Implements DCI encoding and PDCCH TX procedures (38.212/38.213/38.214). V15.2.0 2018-06.
* \author Guy De Souza
* \date 2018
* \version 0.1
......
......@@ -39,4 +39,8 @@ void nr_get_time_domain_allocation_type(nfapi_nr_config_request_t config,
void nr_check_time_alloc(uint8_t S, uint8_t L, nfapi_nr_config_request_t config);
uint8_t nr_get_S(uint8_t row_idx, uint8_t CP, uint8_t time_alloc_type, uint8_t dmrs_mapping_type);
uint8_t nr_get_S(uint8_t row_idx, uint8_t CP, uint8_t time_alloc_type, uint8_t dmrs_typeA_position);
void nr_get_rbg_parms(NR_BWP_PARMS* bwp, uint8_t config_type);
void nr_get_rbg_list(uint32_t bitmap, uint8_t n_rbg, uint8_t* rbg_list);
......@@ -19,13 +19,13 @@
* contact@openairinterface.org
*/
/*! \file PHY/LTE_TRANSPORT/dlsch_decoding.c
* \brief Top-level routines for decoding Turbo-coded (DLSCH) transport channels from 36-212, V8.6 2009-03
* \author R. Knopp
* \date 2011
/*! \file PHY/NR_TRANSPORT/nr_dlsch_tools.c
* \brief Top-level routines for decoding DLSCH transport channel from 38-214, V15.2.0 2018-06
* \author Guy De Souza
* \date 2018
* \version 0.1
* \company Eurecom
* \email: knopp@eurecom.fr
* \email: desouza@eurecom.fr
* \note
* \warning
*/
......@@ -41,6 +41,9 @@ uint8_t nr_pdsch_default_time_alloc_B_L[16] = {2,2,2,2,2,2,2,4,4,4,4,4,7,12,11,4
uint8_t nr_pdsch_default_time_alloc_C_S[15] = {2,4,6,8,10,2,4,6,8,10,2,2,3,0,2};
uint8_t nr_pdsch_default_time_alloc_C_L[15] = {2,2,2,2,2,4,4,4,4,4,7,12,11,6,6};
/// Time domain allocation routines
void nr_get_time_domain_allocation_type(nfapi_nr_config_request_t config,
NR_gNB_DCI_ALLOC_t dci_alloc,
NR_gNB_DLSCH_t* dlsch) {
......@@ -131,7 +134,7 @@ void nr_check_time_alloc(uint8_t S, uint8_t L, nfapi_nr_config_request_t config)
if (S==3)
AssertFatal(config.pdsch_config.dmrs_typeA_position.value == 3, "Invalid S %d for dmrs_typeA_position %d\n",
S, config.pdsch_config.dmrs_typeA_position);
S, config.pdsch_config.dmrs_typeA_position.value);
AssertFatal((L>2)&&(L<15), "Invalid L %d for mapping type A and normal CP\n", L);
......@@ -152,7 +155,7 @@ void nr_check_time_alloc(uint8_t S, uint8_t L, nfapi_nr_config_request_t config)
if (S==3)
AssertFatal(config.pdsch_config.dmrs_typeA_position.value == 3, "Invalid S %d for dmrs_typeA_position %d\n",
S, config.pdsch_config.dmrs_typeA_position);
S, config.pdsch_config.dmrs_typeA_position.value);
AssertFatal((L>2)&&(L<13), "Invalid L %d for mapping type A and extended CP\n", L);
......@@ -170,3 +173,35 @@ void nr_check_time_alloc(uint8_t S, uint8_t L, nfapi_nr_config_request_t config)
}
/// Frequency domain allocation routines
// DL alloc type 0
static inline uint8_t get_RBG_size_P(uint16_t n_RB, uint8_t RBG_config) {
if (RBG_config == NFAPI_NR_PDSCH_RBG_CONFIG_TYPE1)
return ((n_RB<37)?2:(n_RB<73)?4:(n_RB<145)?8:16);
else if (RBG_config == NFAPI_NR_PDSCH_RBG_CONFIG_TYPE2)
return ((n_RB<37)?4:(n_RB<73)?8:(n_RB<145)?16:16);
else
AssertFatal(0, "Invalid RBG config type (%d)\n", RBG_config);
}
void nr_get_rbg_parms(NR_BWP_PARMS* bwp, uint8_t config_type) {
nr_rbg_parms_t* rbg_parms = &bwp->rbg_parms;
rbg_parms->P = get_RBG_size_P(bwp->N_RB, config_type);
rbg_parms->start_size = rbg_parms->P - bwp->location%rbg_parms->P;
rbg_parms->end_size = ((bwp->location + bwp->N_RB)%rbg_parms->P)? ((bwp->location + bwp->N_RB)%rbg_parms->P) : rbg_parms->P;
rbg_parms->N_RBG = (uint8_t)ceil( (bwp->N_RB + (bwp->location%rbg_parms->P))/rbg_parms->P);
LOG_I(PHY, "RBG parameters for BWP %d location %d N_RB %d:\n", bwp->bwp_id, bwp->location, bwp->N_RB);
LOG_I(PHY, "P %d\t start size %d\t endsize %d\t N_RBG %d\n", rbg_parms->P, rbg_parms->start_size, rbg_parms->end_size, rbg_parms->N_RBG);
}
void nr_get_rbg_list(uint32_t bitmap, uint8_t n_rbg, uint8_t* rbg_list) {
uint8_t idx=0;
for (int i=0; i<n_rbg; i++)
if ((bitmap>>(n_rbg-i-1))&1)
rbg_list[idx++]=i;
}
// DL alloc type 1
......@@ -149,6 +149,7 @@ typedef struct {
LTE_DL_eNB_HARQ_t *harq_processes[8];
nfapi_nr_pdsch_time_domain_alloc_type_e time_alloc_type;
uint8_t time_alloc_list_flag;
uint8_t rbg_list[NR_MAX_NB_RBG];
//LTE remainders to be removed
......
......@@ -81,6 +81,8 @@
#define NR_MAX_PDCCH_AGG_LEVEL 16
#define NR_MAX_CSET_DURATION 3
#define NR_MAX_NB_RBG 18
typedef enum {
NR_MU_0=0,
NR_MU_1,
......@@ -110,6 +112,17 @@ typedef enum {
nr_FR2
} nr_frequency_range_e;
typedef struct {
/// Size of first RBG
uint8_t start_size;
/// Nominal size
uint8_t P;
/// Size of last RBG
uint8_t end_size;
/// Number of RBG
uint8_t N_RBG;
}nr_rbg_parms_t;
typedef struct NR_BWP_PARMS {
/// BWP ID
uint8_t bwp_id;
......@@ -123,6 +136,8 @@ typedef struct NR_BWP_PARMS {
uint16_t ofdm_symbol_size;
/// Cyclic prefix
uint8_t cyclic_prefix;
/// RBG params
nr_rbg_parms_t rbg_parms;
} NR_BWP_PARMS;
typedef struct {
......
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