Commit 5c0ea2b4 authored by knopp's avatar knopp

addition of MPDCCH format 5. X_u_br sequences for BL/CE UE support and...

addition of MPDCCH format 5. X_u_br sequences for BL/CE UE support and bugfixes in rx_prach0 for eMTC.
parent 73560827
......@@ -989,6 +989,7 @@ set(PHY_SRC
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/lte_mcs.c
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/pbch.c
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/dci.c
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/edci.c
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/phich.c
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/pcfich.c
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/pucch.c
......
......@@ -145,6 +145,13 @@ void phy_config_request(PHY_Config_t *phy_config) {
LOG_I(PHY,"prach_config_common.prach_ConfigInfo.prach_FreqOffset = %d\n",cfg->prach_config.frequency_offset.value);
init_prach_tables(839);
compute_prach_seq(fp->prach_config_common.rootSequenceIndex,
fp->prach_config_common.prach_ConfigInfo.prach_ConfigIndex,
fp->prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig,
fp->prach_config_common.prach_ConfigInfo.highSpeedFlag,
fp->frame_type,
RC.eNB[Mod_id][CC_id]->X_u);
#ifdef Rel14
fp->prach_emtc_config_common.prach_Config_enabled=1;
......@@ -160,10 +167,18 @@ void phy_config_request(PHY_Config_t *phy_config) {
AssertFatal(fp->prach_emtc_config_common.prach_ConfigInfo.prach_starting_subframe_periodicity[3]>=fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[3],
"prach_starting_subframe_periodicity[3] < prach_numPetitionPerPreambleAttempt[3]\n");
fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[3] = cfg->emtc_config.prach_ce_level_3_configuration_index.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_FreqOffset[3] = cfg->emtc_config.prach_ce_level_3_frequency_offset.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_enable[3] = cfg->emtc_config.prach_ce_level_3_hopping_enable.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_offset[3] = cfg->emtc_config.prach_ce_level_3_hopping_offset.value;
if (fp->prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[3] == 1)
compute_prach_seq(fp->prach_emtc_config_common.rootSequenceIndex,
fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[3],
fp->prach_emtc_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig,
fp->prach_emtc_config_common.prach_ConfigInfo.highSpeedFlag,
fp->frame_type,
RC.eNB[Mod_id][CC_id]->X_u_br[3]);
// CE Level 2 parameters
fp->prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[2] = cfg->emtc_config.prach_ce_level_2_enable.value;
......@@ -175,6 +190,13 @@ void phy_config_request(PHY_Config_t *phy_config) {
fp->prach_emtc_config_common.prach_ConfigInfo.prach_FreqOffset[2] = cfg->emtc_config.prach_ce_level_2_frequency_offset.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_enable[2] = cfg->emtc_config.prach_ce_level_2_hopping_enable.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_offset[2] = cfg->emtc_config.prach_ce_level_2_hopping_offset.value;
if (fp->prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[2] == 1)
compute_prach_seq(fp->prach_emtc_config_common.rootSequenceIndex,
fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[3],
fp->prach_emtc_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig,
fp->prach_emtc_config_common.prach_ConfigInfo.highSpeedFlag,
fp->frame_type,
RC.eNB[Mod_id][CC_id]->X_u_br[2]);
// CE Level 1 parameters
fp->prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[1] = cfg->emtc_config.prach_ce_level_1_enable.value;
......@@ -182,11 +204,19 @@ void phy_config_request(PHY_Config_t *phy_config) {
fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[1] = cfg->emtc_config.prach_ce_level_1_number_of_repetitions_per_attempt.value;
AssertFatal(fp->prach_emtc_config_common.prach_ConfigInfo.prach_starting_subframe_periodicity[1]>=fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[1],
"prach_starting_subframe_periodicity[1] < prach_numPetitionPerPreambleAttempt[1]\n");
fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[1] = cfg->emtc_config.prach_ce_level_1_configuration_index.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_FreqOffset[1] = cfg->emtc_config.prach_ce_level_1_frequency_offset.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_enable[1] = cfg->emtc_config.prach_ce_level_1_hopping_enable.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_offset[1] = cfg->emtc_config.prach_ce_level_1_hopping_offset.value;
if (fp->prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[1] == 1)
compute_prach_seq(fp->prach_emtc_config_common.rootSequenceIndex,
fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[3],
fp->prach_emtc_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig,
fp->prach_emtc_config_common.prach_ConfigInfo.highSpeedFlag,
fp->frame_type,
RC.eNB[Mod_id][CC_id]->X_u_br[1]);
// CE Level 0 parameters
fp->prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[0] = cfg->emtc_config.prach_ce_level_0_enable.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_starting_subframe_periodicity[0] = cfg->emtc_config.prach_ce_level_0_starting_subframe_periodicity.value;
......@@ -197,11 +227,16 @@ void phy_config_request(PHY_Config_t *phy_config) {
fp->prach_emtc_config_common.prach_ConfigInfo.prach_FreqOffset[0] = cfg->emtc_config.prach_ce_level_0_frequency_offset.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_enable[0] = cfg->emtc_config.prach_ce_level_0_hopping_enable.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_offset[0] = cfg->emtc_config.prach_ce_level_0_hopping_offset.value;
if (fp->prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[0] == 1)
compute_prach_seq(fp->prach_emtc_config_common.rootSequenceIndex,
fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[3],
fp->prach_emtc_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig,
fp->prach_emtc_config_common.prach_ConfigInfo.highSpeedFlag,
fp->frame_type,
RC.eNB[Mod_id][CC_id]->X_u_br[0]);
#endif
compute_prach_seq(&fp->prach_config_common,fp->frame_type,
RC.eNB[Mod_id][CC_id]->X_u);
fp->pucch_config_common.deltaPUCCH_Shift = 1+cfg->pucch_config.delta_pucch_shift.value;
fp->pucch_config_common.nRB_CQI = cfg->pucch_config.n_cqi_rb.value;
......@@ -441,7 +476,11 @@ void phy_config_sib2_ue(uint8_t Mod_id,int CC_id,
fp->prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig =radioResourceConfigCommon->prach_Config.prach_ConfigInfo.zeroCorrelationZoneConfig;
fp->prach_config_common.prach_ConfigInfo.prach_FreqOffset =radioResourceConfigCommon->prach_Config.prach_ConfigInfo.prach_FreqOffset;
compute_prach_seq(&fp->prach_config_common,fp->frame_type,ue->X_u);
compute_prach_seq(fp->prach_config_common.rootSequenceIndex,
fp->prach_config_common.prach_ConfigInfo.prach_ConfigIndex,
fp->prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig,
fp->prach_config_common.prach_ConfigInfo.highSpeedFlag,
fp->frame_type,ue->X_u);
......@@ -729,7 +768,10 @@ void phy_config_afterHO_ue(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_id, Mobility
// prach_root_sequence_map4[fp->prach_config_common.rootSequenceIndex];
//compute_prach_seq(u,N_ZC, PHY_vars_UE_g[Mod_id]->X_u);
compute_prach_seq(&PHY_vars_UE_g[Mod_id][CC_id]->frame_parms.prach_config_common,
compute_prach_seq(PHY_vars_UE_g[Mod_id][CC_id]->frame_parms.prach_config_common.rootSequenceIndex,
PHY_vars_UE_g[Mod_id][CC_id]->frame_parms.prach_config_common.prach_ConfigInfo.prach_ConfigIndex,
PHY_vars_UE_g[Mod_id][CC_id]->frame_parms.prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig,
PHY_vars_UE_g[Mod_id][CC_id]->frame_parms.prach_config_common.prach_ConfigInfo.highSpeedFlag,
fp->frame_type,
PHY_vars_UE_g[Mod_id][CC_id]->X_u);
......
......@@ -219,7 +219,14 @@ uint8_t *generate_dci0(uint8_t *dci,
AssertFatal((aggregation_level==1) ||
(aggregation_level==2) ||
(aggregation_level==4) ||
(aggregation_level==8),
(aggregation_level==8)
#ifdef Rel14 // Added for EPDCCH/MPDCCH
||
(aggregation_level==16) ||
(aggregation_level==24) ||
(aggregation_level==32)
#endif
,
"generate_dci FATAL, illegal aggregation_level %d\n",aggregation_level);
......
......@@ -2005,7 +2005,7 @@ int fill_mdci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,mDCI_ALLOC_t *dc
dci_alloc->start_symbol = rel13->start_symbol;
dci_alloc->ce_mode = rel13->ce_mode;
dci_alloc->dmrs_scrambling_init = rel13->drms_scrambling_init;
dci_alloc->initial_transmission_sf_io = rel13->initial_transmission_sf_io;
dci_alloc->i0 = rel13->initial_transmission_sf_io;
dci_alloc->ra_flag = 0;
if (rel13->rnti_type == 2 ) dci_alloc->ra_flag = 1;
......
......@@ -148,6 +148,8 @@ typedef struct {
uint16_t nb_rb;
/// downlink power offset field
uint8_t dl_power_off;
/// start symbold of pdsch
uint8_t pdsch_start;
/// Concatenated "e"-sequences (for definition see 36-212 V8.6 2009-03, p.17-18)
uint8_t e[MAX_NUM_CHANNEL_BITS] __attribute__((aligned(32)));
/// Turbo-code outputs (36-212 V8.6 2009-03, p.12
......@@ -172,7 +174,7 @@ typedef struct {
uint8_t Nlayers;
/// First layer for this PSCH transmission
uint8_t first_layer;
/// codeword this transport block is mapped to
/// codeword this transport block is mapped to
uint8_t codeword;
} LTE_DL_eNB_HARQ_t;
......@@ -250,6 +252,13 @@ typedef struct {
uint8_t decode_phich;
} LTE_UL_UE_HARQ_t;
#ifdef Rel14
typedef enum {
CEmodeA = 0,
CEmodeB = 1
} CEmode_t;
#endif
typedef struct {
/// TX buffers for UE-spec transmission (antenna ports 5 or 7..14, prior to precoding)
int32_t *txdataF[8];
......@@ -291,7 +300,13 @@ typedef struct {
int16_t sqrt_rho_a;
/// amplitude of PDSCH (compared to RS) in symbols containing pilots
int16_t sqrt_rho_b;
#ifdef Rel14
/// indicator that this DLSCH corresponds to SIB1-BR, needed for c_init for scrambling
uint8_t sib1_br_flag;
/// initial absolute subframe (see 36.211 Section 6.3.1), needed for c_init for scrambling
uint16_t i0;
CEmode_t CEmode;
#endif
} LTE_eNB_DLSCH_t;
#define PUSCH_x 2
......
......@@ -145,7 +145,7 @@ LTE_eNB_DLSCH_t *new_eNB_dlsch(unsigned char Kmimo,unsigned char Mdlharq,uint32_
bzero(dlsch,sizeof(LTE_eNB_DLSCH_t));
dlsch->Kmimo = Kmimo;
dlsch->Mdlharq = Mdlharq;
dlsch->Mlimit = 4;
dlsch->Mlimit = 8;
dlsch->Nsoft = Nsoft;
for (layer=0; layer<4; layer++) {
......
......@@ -74,10 +74,12 @@ void dlsch_scrambling(LTE_DL_FRAME_PARMS *frame_parms,
int harq_pid,
int G,
uint8_t q,
uint16_t frame,
uint8_t Ns)
{
int i;
int n;
// uint8_t reset;
uint32_t x1, x2, s=0;
uint8_t *dlsch_e=dlsch->harq_processes[harq_pid]->e;
......@@ -85,12 +87,40 @@ void dlsch_scrambling(LTE_DL_FRAME_PARMS *frame_parms,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_SCRAMBLING, VCD_FUNCTION_IN);
#ifdef Rel14
// Rule for accumulation of subframes for BL/CE UEs
uint8_t Nacc=4;
uint16_t j0,j,idelta;
uint16_t i = (Ns>>1) + (10*frame);
uint16_t i0 = dlsch->i0;
if (dlsch->sib1_br_flag==1) Nacc=1;
else if (dlsch->rnti == 0xFFFF || dlsch->rnti == 0xFFFE) Nacc = (frame_parms->frame_type == TDD) ? 10 : 4;
// Note: above SC-RNTI will also have to be added when/if implemented
else if (dlsch->CEmode == CEmodeA) Nacc=1;
else if (dlsch->CEmode == CEmodeB) Nacc = (frame_parms->frame_type == TDD) ? 10 : 4;
if (frame_parms->frame_type == FDD || Nacc == 1) idelta = 0;
else idelta = Nacc-2;
j0 = (i0+idelta)/Nacc;
j = (i - i0)/Nacc;
#endif
// reset = 1;
// x1 is set in lte_gold_generic
if (mbsfn_flag == 0) {
x2 = (dlsch->rnti<<14) + (q<<13) + ((Ns>>1)<<9) + frame_parms->Nid_cell; //this is c_init in 36.211 Sec 6.3.1
#ifdef Rel14
if (dlsch->i0 != 0xFFFF) {
// rule for BL/CE UEs from Section 6.3.1 in 36.211
x2= (dlsch->rnti<<14) + (q<<13) + ((((j0+j)*Nacc)%10)<<9) + frame_parms->Nid_cell;
if ((frame&1023) < 200) LOG_D(PHY,"Scrambling init for (i0 %d, i %d, j0 %d, j %d, Nacc %d) => x2 %d\n",i0,i,j0,j,Nacc,x2);
}
else
#endif
x2 = (dlsch->rnti<<14) + (q<<13) + ((Ns>>1)<<9) + frame_parms->Nid_cell; //this is c_init in 36.211 Sec 6.3.1 for PDSCH
} else {
x2 = ((Ns>>1)<<9) + frame_parms->Nid_cell_mbsfn; //this is c_init in 36.211 Sec 6.3.1
x2 = ((Ns>>1)<<9) + frame_parms->Nid_cell_mbsfn; //this is c_init in 36.211 Sec 6.3.1 for PMCH
}
#ifdef DEBUG_SCRAMBLING
......@@ -98,7 +128,7 @@ void dlsch_scrambling(LTE_DL_FRAME_PARMS *frame_parms,
#endif
s = lte_gold_scram(&x1, &x2, 1);
for (i=0; i<(1+(G>>5)); i++) {
for (n=0; n<(1+(G>>5)); n++) {
#ifdef DEBUG_SCRAMBLING
printf("scrambling %d : %d => ",k,e[k]);
......
......@@ -285,6 +285,7 @@ void generate_mch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,uint8_t *a)
int G;
int subframe = proc->subframe_tx;
int frame = proc->frame_tx;
if (eNB->abstraction_flag != 0) {
if (eNB_transport_info_TB_index[eNB->Mod_id][eNB->CC_id]!=0)
......@@ -324,7 +325,7 @@ void generate_mch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,uint8_t *a)
&eNB->dlsch_interleaving_stats)==0,
"problem in dlsch_encoding");
dlsch_scrambling(&eNB->frame_parms,1,eNB->dlsch_MCH,0,G,0,subframe<<1);
dlsch_scrambling(&eNB->frame_parms,1,eNB->dlsch_MCH,0,G,0,frame,subframe<<1);
mch_modulation(eNB->common_vars.txdataF,
......
......@@ -1596,16 +1596,17 @@ void rx_prach0(PHY_VARS_eNB *eNB,
if (new_dft == 1) {
new_dft = 0;
Xu=(int16_t*)eNB->X_u[preamble_offset-first_nonzero_root_idx];
#ifdef Rel14
if (br_flag == 1) {
Xu=(int16_t*)eNB->X_u_br[ce_level][preamble_offset-first_nonzero_root_idx];
prach_ifft = prach_ifftp[prach_ifft_cnt++];
if (eNB->prach_vars_br.repetition_number[ce_level]==1) memset(prach_ifft,0,((N_ZC==839)?2048:256)*sizeof(int32_t));
}
else
#endif
{
Xu=(int16_t*)eNB->X_u[preamble_offset-first_nonzero_root_idx];
prach_ifft = prach_ifftp[0];
memset(prach_ifft,0,((N_ZC==839) ? 2048 : 256)*sizeof(int32_t));
}
......@@ -1781,15 +1782,18 @@ void init_prach_tables(int N_ZC)
}
}
void compute_prach_seq(PRACH_CONFIG_COMMON *prach_config_common,
lte_frame_type_t frame_type,
uint32_t X_u[64][839])
void compute_prach_seq(uint16_t rootSequenceIndex,
uint8_t prach_ConfigIndex,
uint8_t zeroCorrelationZoneConfig,
uint8_t highSpeedFlag,
lte_frame_type_t frame_type,
uint32_t X_u[64][839])
{
// Compute DFT of x_u => X_u[k] = x_u(inv(u)*k)^* X_u[k] = exp(j\pi u*inv(u)*k*(inv(u)*k+1)/N_ZC)
unsigned int k,inv_u,i,NCS=0,num_preambles;
int N_ZC;
uint8_t prach_fmt = get_prach_fmt(prach_config_common->prach_ConfigInfo.prach_ConfigIndex,frame_type);
uint8_t prach_fmt = get_prach_fmt(prach_ConfigIndex,frame_type);
uint16_t *prach_root_sequence_map;
uint16_t u, preamble_offset;
uint16_t n_shift_ra,n_shift_ra_bar, d_start,numshift;
......@@ -1798,7 +1802,7 @@ void compute_prach_seq(PRACH_CONFIG_COMMON *prach_config_common,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_UE_COMPUTE_PRACH, VCD_FUNCTION_IN);
#ifdef PRACH_DEBUG
LOG_I(PHY,"compute_prach_seq: NCS_config %d, prach_fmt %d\n",prach_config_common->prach_ConfigInfo.zeroCorrelationZoneConfig, prach_fmt);
LOG_I(PHY,"compute_prach_seq: NCS_config %d, prach_fmt %d\n",zeroCorrelationZoneConfig, prach_fmt);
#endif
AssertFatal(prach_fmt<4,
......@@ -1818,15 +1822,15 @@ void compute_prach_seq(PRACH_CONFIG_COMMON *prach_config_common,
LOG_I( PHY, "compute_prach_seq: done init prach_tables\n" );
#endif
if (prach_config_common->prach_ConfigInfo.highSpeedFlag== 0) {
if (highSpeedFlag== 0) {
#ifdef PRACH_DEBUG
LOG_I(PHY,"Low speed prach : NCS_config %d\n",prach_config_common->prach_ConfigInfo.zeroCorrelationZoneConfig);
LOG_I(PHY,"Low speed prach : NCS_config %d\n",zeroCorrelationZoneConfig);
#endif
AssertFatal(prach_config_common->prach_ConfigInfo.zeroCorrelationZoneConfig<=15,
"FATAL, Illegal Ncs_config for unrestricted format %"PRIu8"\n", prach_config_common->prach_ConfigInfo.zeroCorrelationZoneConfig );
NCS = NCS_unrestricted[prach_config_common->prach_ConfigInfo.zeroCorrelationZoneConfig];
AssertFatal(zeroCorrelationZoneConfig<=15,
"FATAL, Illegal Ncs_config for unrestricted format %"PRIu8"\n", zeroCorrelationZoneConfig );
NCS = NCS_unrestricted[zeroCorrelationZoneConfig];
num_preambles = (NCS==0) ? 64 : ((64*NCS)/N_ZC);
......@@ -1836,12 +1840,12 @@ void compute_prach_seq(PRACH_CONFIG_COMMON *prach_config_common,
} else {
#ifdef PRACH_DEBUG
LOG_I( PHY, "high speed prach : NCS_config %"PRIu8"\n", prach_config_common->prach_ConfigInfo.zeroCorrelationZoneConfig );
LOG_I( PHY, "high speed prach : NCS_config %"PRIu8"\n", zeroCorrelationZoneConfig );
#endif
AssertFatal(prach_config_common->prach_ConfigInfo.zeroCorrelationZoneConfig<=14,
"FATAL, Illegal Ncs_config for restricted format %"PRIu8"\n", prach_config_common->prach_ConfigInfo.zeroCorrelationZoneConfig );
NCS = NCS_restricted[prach_config_common->prach_ConfigInfo.zeroCorrelationZoneConfig];
AssertFatal(zeroCorrelationZoneConfig<=14,
"FATAL, Illegal Ncs_config for restricted format %"PRIu8"\n", zeroCorrelationZoneConfig );
NCS = NCS_restricted[zeroCorrelationZoneConfig];
fill_du(prach_fmt);
num_preambles = 64; // compute ZC sequence for 64 possible roots
......@@ -1851,7 +1855,7 @@ void compute_prach_seq(PRACH_CONFIG_COMMON *prach_config_common,
while (not_found == 1) {
// current root depending on rootSequenceIndex
int index = (prach_config_common->rootSequenceIndex + preamble_offset) % N_ZC;
int index = (rootSequenceIndex + preamble_offset) % N_ZC;
if (prach_fmt<4) {
// prach_root_sequence_map points to prach_root_sequence_map0_3
......@@ -1895,12 +1899,12 @@ void compute_prach_seq(PRACH_CONFIG_COMMON *prach_config_common,
if (NCS>0)
LOG_I( PHY, "Initializing %u preambles for PRACH (NCS_config %"PRIu8", NCS %u, N_ZC/NCS %u)\n",
num_preambles, prach_config_common->prach_ConfigInfo.zeroCorrelationZoneConfig, NCS, N_ZC/NCS );
num_preambles, zeroCorrelationZoneConfig, NCS, N_ZC/NCS );
#endif
for (i=0; i<num_preambles; i++) {
int index = (prach_config_common->rootSequenceIndex+i+preamble_offset) % N_ZC;
int index = (rootSequenceIndex+i+preamble_offset) % N_ZC;
if (prach_fmt<4) {
// prach_root_sequence_map points to prach_root_sequence_map0_3
......@@ -1921,7 +1925,6 @@ void compute_prach_seq(PRACH_CONFIG_COMMON *prach_config_common,
for (k=0; k<N_ZC; k++) {
// 420 is the multiplicative inverse of 2 (required since ru is exp[j 2\pi n])
X_u[i][k] = ((uint32_t*)ru)[(((k*(1+(inv_u*k)))%N_ZC)*420)%N_ZC];
//printf("X_u[%d][%d] (%d)(%d)(%d) : %d,%d\n",i,k,u*inv_u*k*(1+(inv_u*k)),u*inv_u*k*(1+(inv_u*k))/2,(u*inv_u*k*(1+(inv_u*k))/2)%N_ZC,((int16_t*)&X_u[i][k])[0],((int16_t*)&X_u[i][k])[1]);
}
}
......
......@@ -1973,6 +1973,7 @@ void dlsch_scrambling(LTE_DL_FRAME_PARMS *frame_parms,
int hard_pid,
int G,
uint8_t q,
uint16_t frame,
uint8_t Ns);
void dlsch_unscrambling(LTE_DL_FRAME_PARMS *frame_parms,
......@@ -2114,12 +2115,20 @@ uint8_t get_fid_prach_tdd(module_id_t Mod_id,uint8_t tdd_map_index);
/*!
\brief Comp ute DFT of PRACH ZC sequences. Used for generation of prach in UE and reception of PRACH in eNB.
@param prach_config_common Pointer to prachConfigCommon structure
@param rootSequenceIndex PRACH root sequence
#param prach_ConfigIndex PRACH Configuration Index
@param zeroCorrelationZoneConfig PRACH ncs_config
@param highSpeedFlat PRACH High-Speed Flag
@param frame_type TDD/FDD flag
@param Xu DFT output
*/
void compute_prach_seq(PRACH_CONFIG_COMMON *prach_config_common,
lte_frame_type_t frame_type,
uint32_t X_u[64][839]);
void compute_prach_seq(uint16_t rootSequenceIndex,
uint8_t prach_ConfigIndex,
uint8_t zeroCorrelationZoneConfig,
uint8_t highSpeedFlag,
lte_frame_type_t frame_type,
uint32_t X_u[64][839]);
void init_prach_tables(int N_ZC);
......
......@@ -940,7 +940,9 @@ typedef struct PHY_VARS_eNB_s {
uint32_t lte_gold_mbsfn_table[10][3][42];
uint32_t X_u[64][839];
#ifdef Rel14
uint32_t X_u_br[4][64][839];
#endif
uint8_t pbch_configured;
uint8_t pbch_pdu[4]; //PBCH_PDU_SIZE
char eNB_generate_rar;
......
......@@ -804,9 +804,9 @@ typedef struct {
uint8_t narrowband;
/// number of PRB pairs for MPDCCH
uint8_t number_of_prb_pairs;
/// mpdcch resource assignement (0=localized,1=distributed)
/// mpdcch resource assignement (combinatorial index r)
uint8_t resource_block_assignment;
/// transmission type
/// transmission type (0=localized,1=distributed)
uint8_t transmission_type;
/// mpdcch start symbol
uint8_t start_symbol;
......@@ -815,7 +815,11 @@ typedef struct {
/// 0-503 n_EPDCCHid_i
uint16_t dmrs_scrambling_init;
/// Absolute subframe of the initial transmission (0-10239)
uint16_t initial_transmission_sf_io;
uint16_t i0;
/// number of mdpcch repetitions
uint16_t reps;
/// current absolute subframe number
uint16_t absSF;
/// DCI pdu
uint8_t dci_pdu[8];
} mDCI_ALLOC_t;
......@@ -834,8 +838,12 @@ typedef struct {
} LTE_eNB_EPDCCH;
typedef struct {
/// number of active MPDCCH allocations
uint8_t num_dci;
/// MPDCCH DCI allocations from MAC
mDCI_ALLOC_t mdci_alloc[32];
// MAX SIZE of an EPDCCH set is 16EREGs * 9REs/EREG * 8 PRB pairs = 2304 bits
uint8_t e[2304];
} LTE_eNB_MPDCCH;
......
This diff is collapsed.
......@@ -290,7 +290,7 @@ void generate_Msg2(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t
dl_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_dl_config_dlsch_pdu));
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pdu_index = eNB->pdu_index[CC_idP];
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.rnti = RA_template->RA_rnti;
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.resource_allocation_type = 2; // format 1A/1B/1D
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.resource_allocation_type = 2;
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.virtual_resource_block_assignment_flag = 0; // localized
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.resource_block_coding = getRIV(N_RB_DL,first_rb,6);
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.modulation = 2; //QPSK
......@@ -538,7 +538,7 @@ void generate_Msg4(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t
if (RA_template->rach_resource_type>0) {
// Generate DCI + repetitions first
// This uses an MPDCCH Type 2 allocation according to Section 9.1.5 36-213 : Note: Assumption that this is still Type 2 Common Search
// This uses an MPDCCH Type 2 allocation according to Section 9.1.5 36-213, Type2 common allocation according to Table 7.1-8 (36-213)
// Parameters:
// p=2+4 PRB set (number of PRB pairs 6)
// rmax = mpdcch-NumRepetition-RA-r13 => Table 9.1.5-3
......
......@@ -1504,10 +1504,6 @@ int main( int argc, char **argv )
UE[CC_id]->mode = mode;
printf("UE[%d]->mode = %d\n",CC_id,mode);
compute_prach_seq(&UE[CC_id]->frame_parms.prach_config_common,
UE[CC_id]->frame_parms.frame_type,
UE[CC_id]->X_u);
if (UE[CC_id]->mac_enabled == 1) {
UE[CC_id]->pdcch_vars[0][0]->crnti = 0x1234;
UE[CC_id]->pdcch_vars[1][0]->crnti = 0x1234;
......
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