Commit 5e9da7c5 authored by knopp's avatar knopp

temporary commit

parent 785b4799
......@@ -365,7 +365,7 @@ void install_schedule_handlers(IF_Module_t *if_inst)
/// this function is a temporary addition for NR configuration
void nr_phy_config_request_sim(PHY_VARS_gNB *gNB)
void nr_phy_config_request_sim(PHY_VARS_gNB *gNB,int N_RB_DL,int N_RB_UL,int mu)
{
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
nfapi_nr_config_request_t *gNB_config = &gNB->gNB_config;
......@@ -373,14 +373,14 @@ void nr_phy_config_request_sim(PHY_VARS_gNB *gNB)
//overwrite for new NR parameters
gNB_config->nfapi_config.rf_bands.rf_band[0] = 22;
gNB_config->nfapi_config.earfcn.value = 6600;
gNB_config->subframe_config.numerology_index_mu.value = 1;
gNB_config->subframe_config.duplex_mode.value = FDD;
gNB_config->subframe_config.numerology_index_mu.value = mu;
gNB_config->subframe_config.duplex_mode.value = TDD;
gNB_config->rf_config.tx_antenna_ports.value = 1;
gNB_config->rf_config.dl_carrier_bandwidth.value = 106;
gNB_config->rf_config.ul_carrier_bandwidth.value = 106;
gNB_config->rf_config.dl_carrier_bandwidth.value = N_RB_DL;
gNB_config->rf_config.ul_carrier_bandwidth.value = N_RB_UL;
gNB_config->sch_config.half_frame_index.value = 0;
gNB_config->sch_config.ssb_subcarrier_offset.value = 0;
gNB_config->sch_config.n_ssb_crb.value = 86;
gNB_config->sch_config.n_ssb_crb.value = N_RB_DL-20;
gNB_config->sch_config.ssb_subcarrier_offset.value = 0;
......
......@@ -660,12 +660,11 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
fp->nb_antennas_tx = 1;
fp->nb_antennas_rx=1;
init_dfts();
printf("Initializing UE vars (abstraction %"PRIu8") for eNB TXant %"PRIu8", UE RXant %"PRIu8"\n",abstraction_flag,fp->nb_antennas_tx,fp->nb_antennas_rx);
//LOG_D(PHY,"[MSC_NEW][FRAME 00000][PHY_UE][MOD %02u][]\n", ue->Mod_id+NB_eNB_INST);
nr_init_frame_parms_ue(&ue->frame_parms);
nr_init_frame_parms_ue(&ue->frame_parms,NR_MU_1,NORMAL);
phy_init_nr_top(ue);
// many memory allocation sizes are hard coded
......@@ -943,28 +942,13 @@ void init_nr_ue_transport(PHY_VARS_NR_UE *ue,int abstraction_flag) {
void phy_init_nr_top(PHY_VARS_NR_UE *ue)
{
NR_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
NR_UE_DLSCH_t *dlsch0 = ue->dlsch[0][0][0];
dlsch0 =(NR_UE_DLSCH_t *)malloc16(sizeof(NR_UE_DLSCH_t));
NR_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
NR_UE_DLSCH_t *dlsch0 = ue->dlsch[0][0][0];
dlsch0 =(NR_UE_DLSCH_t *)malloc16(sizeof(NR_UE_DLSCH_t));
crcTableInit();
ccodedot11_init();
ccodedot11_init_inv();
ccodelte_init();
ccodelte_init_inv();
//treillis_table_init();
phy_generate_viterbi_tables();
phy_generate_viterbi_tables_lte();
//init_td8();
//init_td16();
#ifdef __AVX2__
//init_td16avx2();
#endif
init_dfts();
init_context_synchro_nr(frame_parms);
......
......@@ -26,18 +26,20 @@
uint32_t nr_subcarrier_spacing[MAX_NUM_SUBCARRIER_SPACING] = {15e3, 30e3, 60e3, 120e3, 240e3};
uint16_t nr_slots_per_subframe[MAX_NUM_SUBCARRIER_SPACING] = {1, 2, 4, 16, 32};
int nr_init_frame_parms(nfapi_nr_config_request_t* config,
NR_DL_FRAME_PARMS *frame_parms)
int nr_init_frame_parms0(
NR_DL_FRAME_PARMS *frame_parms,
int mu,
int Ncp)
{
int N_RB = config->rf_config.dl_carrier_bandwidth.value;
int Ncp = config->subframe_config.dl_cyclic_prefix_type.value;
int mu = config->subframe_config.numerology_index_mu.value;
#if DISABLE_LOG_X
printf("Initializing frame parms for mu %d, N_RB %d, Ncp %d\n",mu, N_RB, Ncp);
printf("Initializing frame parms for mu %d, N_RB %d, Ncp %d\n",mu, frame_parms->N_RB_DL, Ncp);
#else
LOG_I(PHY,"Initializing frame parms for mu %d, N_RB %d, Ncp %d\n",mu, N_RB, Ncp);
LOG_I(PHY,"Initializing frame parms for mu %d, N_RB %d, Ncp %d\n",mu, frame_parms->N_RB_DL, Ncp);
#endif
if (Ncp == NFAPI_CP_EXTENDED)
......@@ -54,7 +56,7 @@ int nr_init_frame_parms(nfapi_nr_config_request_t* config,
frame_parms->subcarrier_spacing = nr_subcarrier_spacing[NR_MU_1];
frame_parms->slots_per_subframe = nr_slots_per_subframe[NR_MU_1];
switch(N_RB){
switch(frame_parms->N_RB_DL){
case 11:
case 24:
case 38:
......@@ -88,18 +90,30 @@ int nr_init_frame_parms(nfapi_nr_config_request_t* config,
frame_parms->nb_prefix_samples0 = 264;
frame_parms->nb_prefix_samples = 216;
}
else {
frame_parms->ofdm_symbol_size = 4096;
frame_parms->first_carrier_offset = 2794; //4096 - 1302
frame_parms->nb_prefix_samples0 = 352;
frame_parms->nb_prefix_samples = 288;
}
else {
frame_parms->ofdm_symbol_size = 4096;
frame_parms->first_carrier_offset = 2794; //4096 - 1302
frame_parms->nb_prefix_samples0 = 352;
frame_parms->nb_prefix_samples = 288;
}
break;
case 245:
AssertFatal(frame_parms->threequarter_fs==0,"3/4 sampling impossible for N_RB %d and MU %d\n",frame_parms->N_RB_DL,mu);
frame_parms->ofdm_symbol_size = 4096;
frame_parms->first_carrier_offset = 2626; //4096 - 1478
frame_parms->nb_prefix_samples0 = 352;
frame_parms->nb_prefix_samples = 288;
break;
case 273:
AssertFatal(frame_parms->threequarter_fs==0,"3/4 sampling impossible for N_RB %d and MU %d\n",frame_parms->N_RB_DL,mu);
frame_parms->ofdm_symbol_size = 4096;
frame_parms->first_carrier_offset = 2458; //4096 - 1638
frame_parms->nb_prefix_samples0 = 352;
frame_parms->nb_prefix_samples = 288;
break;
default:
AssertFatal(1==0,"Number of resource blocks %d undefined for mu %d, frame parms = %p\n", N_RB, mu, frame_parms);
AssertFatal(1==0,"Number of resource blocks %d undefined for mu %d, frame parms = %p\n", frame_parms->N_RB_DL, mu, frame_parms);
}
break;
......@@ -107,7 +121,7 @@ int nr_init_frame_parms(nfapi_nr_config_request_t* config,
frame_parms->subcarrier_spacing = nr_subcarrier_spacing[NR_MU_2];
frame_parms->slots_per_subframe = nr_slots_per_subframe[NR_MU_2];
switch(N_RB){ //FR1 bands only
switch(frame_parms->N_RB_DL){ //FR1 bands only
case 11:
case 18:
case 38:
......@@ -121,7 +135,7 @@ int nr_init_frame_parms(nfapi_nr_config_request_t* config,
case 121:
case 135:
default:
AssertFatal(1==0,"Number of resource blocks %d undefined for mu %d, frame parms = %p\n", N_RB, mu, frame_parms);
AssertFatal(1==0,"Number of resource blocks %d undefined for mu %d, frame parms = %p\n", frame_parms->N_RB_DL, mu, frame_parms);
}
break;
......@@ -152,146 +166,27 @@ int nr_init_frame_parms(nfapi_nr_config_request_t* config,
frame_parms->initial_bwp_dl.bwp_id = 0;
frame_parms->initial_bwp_dl.scs = frame_parms->subcarrier_spacing;
frame_parms->initial_bwp_dl.location = 0;
frame_parms->initial_bwp_dl.N_RB = N_RB;
frame_parms->initial_bwp_dl.N_RB = frame_parms->N_RB_DL;
frame_parms->initial_bwp_dl.cyclic_prefix = Ncp;
frame_parms->initial_bwp_dl.ofdm_symbol_size = frame_parms->ofdm_symbol_size;
return 0;
}
int nr_init_frame_parms_ue(NR_DL_FRAME_PARMS *frame_parms)
{
int N_RB = 106;
int Ncp = 0;
int mu = 1;
#if DISABLE_LOG_X
printf("Initializing frame parms for mu %d, N_RB %d, Ncp %d\n",mu, N_RB, Ncp);
#else
LOG_I(PHY,"Initializing frame parms for mu %d, N_RB %d, Ncp %d\n",mu, N_RB, Ncp);
#endif
if (Ncp == EXTENDED)
AssertFatal(mu == NR_MU_2,"Invalid cyclic prefix %d for numerology index %d\n", Ncp, mu);
switch(mu) {
case NR_MU_0: //15kHz scs
frame_parms->subcarrier_spacing = nr_subcarrier_spacing[NR_MU_0];
frame_parms->slots_per_subframe = nr_slots_per_subframe[NR_MU_0];
break;
case NR_MU_1: //30kHz scs
frame_parms->subcarrier_spacing = nr_subcarrier_spacing[NR_MU_1];
frame_parms->slots_per_subframe = nr_slots_per_subframe[NR_MU_1];
switch(N_RB){
case 11:
case 24:
case 38:
case 78:
case 51:
case 65:
case 106: //40 MHz
if (frame_parms->threequarter_fs) {
frame_parms->ofdm_symbol_size = 1536;
frame_parms->first_carrier_offset = 900; //1536 - 636
frame_parms->nb_prefix_samples0 = 132;
frame_parms->nb_prefix_samples = 108;
}
else {
frame_parms->ofdm_symbol_size = 2048;
frame_parms->first_carrier_offset = 1412; //2048 - 636
frame_parms->nb_prefix_samples0 = 176;
frame_parms->nb_prefix_samples = 144;
}
break;
case 133:
case 162:
case 189:
case 217: //80 MHz
if (frame_parms->threequarter_fs) {
frame_parms->ofdm_symbol_size = 3072;
frame_parms->first_carrier_offset = 1770; //3072 - 1302
frame_parms->nb_prefix_samples0 = 264;
frame_parms->nb_prefix_samples = 216;
}
else {
frame_parms->ofdm_symbol_size = 4096;
frame_parms->first_carrier_offset = 2794; //4096 - 1302
frame_parms->nb_prefix_samples0 = 352;
frame_parms->nb_prefix_samples = 288;
}
break;
case 245:
case 273:
default:
AssertFatal(1==0,"Number of resource blocks %d undefined for mu %d, frame parms = %p\n", N_RB, mu, frame_parms);
}
break;
case NR_MU_2: //60kHz scs
frame_parms->subcarrier_spacing = nr_subcarrier_spacing[NR_MU_2];
frame_parms->slots_per_subframe = nr_slots_per_subframe[NR_MU_2];
switch(N_RB){ //FR1 bands only
case 11:
case 18:
case 38:
case 24:
case 31:
case 51:
case 65:
case 79:
case 93:
case 107:
case 121:
case 135:
default:
AssertFatal(1==0,"Number of resource blocks %d undefined for mu %d, frame parms = %p\n", N_RB, mu, frame_parms);
}
break;
case NR_MU_3:
frame_parms->subcarrier_spacing = nr_subcarrier_spacing[NR_MU_3];
frame_parms->slots_per_subframe = nr_slots_per_subframe[NR_MU_3];
break;
case NR_MU_4:
frame_parms->subcarrier_spacing = nr_subcarrier_spacing[NR_MU_4];
frame_parms->slots_per_subframe = nr_slots_per_subframe[NR_MU_4];
break;
default:
AssertFatal(1==0,"Invalid numerology index %d", mu);
}
int nr_init_frame_parms(nfapi_nr_config_request_t* config,
NR_DL_FRAME_PARMS *frame_parms) {
frame_parms->nb_prefix_samples0 = 160;
frame_parms->nb_prefix_samples = 144;
frame_parms->symbols_per_tti = 14;
frame_parms->numerology_index = 0;
frame_parms->ttis_per_subframe = 1;
frame_parms->slots_per_tti = 2; //only slot config 1 is supported
nr_init_frame_parms0(frame_parms,
config->subframe_config.numerology_index_mu.value,
config->subframe_config.dl_cyclic_prefix_type.value);
}
frame_parms->ofdm_symbol_size = 2048;
frame_parms->samples_per_tti = 30720;
frame_parms->samples_per_subframe = 30720 * frame_parms->ttis_per_subframe;
//frame_parms->first_carrier_offset = 2048-600;
int nr_init_frame_parms_ue(NR_DL_FRAME_PARMS *frame_parms,
int mu,
int Ncp)
{
frame_parms->slots_per_frame = 10* frame_parms->slots_per_subframe;
frame_parms->symbols_per_slot = ((Ncp == NORMAL)? 14 : 12); // to redefine for different slot formats
frame_parms->samples_per_subframe_wCP = frame_parms->ofdm_symbol_size * frame_parms->symbols_per_slot * frame_parms->slots_per_subframe;
frame_parms->samples_per_frame_wCP = 10 * frame_parms->samples_per_subframe_wCP;
//frame_parms->samples_per_subframe = (frame_parms->samples_per_subframe_wCP + (frame_parms->nb_prefix_samples0 * frame_parms->slots_per_subframe) +
// (frame_parms->nb_prefix_samples * frame_parms->slots_per_subframe * (frame_parms->symbols_per_slot - 1)));
frame_parms->samples_per_frame = 10 * frame_parms->samples_per_subframe;
frame_parms->freq_range = (frame_parms->dl_CarrierFreq < 6e9)? nr_FR1 : nr_FR2;
nr_init_frame_parms0(frame_parms,mu,Ncp);
return 0;
}
......
......@@ -377,11 +377,12 @@ void phy_config_request(PHY_Config_t *phy_config);
int init_frame_parms(LTE_DL_FRAME_PARMS *frame_parms,uint8_t osf);
void dump_frame_parms(LTE_DL_FRAME_PARMS *frame_parms);
int nr_init_frame_parms(nfapi_nr_config_request_t* config, NR_DL_FRAME_PARMS *frame_parms);
int nr_init_frame_parms_ue(NR_DL_FRAME_PARMS *frame_parms);
int nr_init_frame_parms_ue(NR_DL_FRAME_PARMS *frame_parms,int mu,int Ncp);
int init_nr_ue_signal(PHY_VARS_NR_UE *ue,int nb_connected_eNB,uint8_t abstraction_flag);
void nr_dump_frame_parms(NR_DL_FRAME_PARMS *frame_parms);
int phy_init_nr_gNB(PHY_VARS_gNB *gNB, unsigned char is_secondary_gNB, unsigned char abstraction_flag);
void nr_phy_config_request(NR_PHY_Config_t *gNB);
void nr_phy_config_request_sim(PHY_VARS_gNB *gNB,int N_RB_DL,int N_RB_UL,int mu);
void phy_free_nr_gNB(PHY_VARS_gNB *gNB);
int l1_north_init_gNB(void);
......
......@@ -285,6 +285,7 @@ int initial_sync(PHY_VARS_UE *ue, runmode_t mode)
init_frame_parms(frame_parms,1);
/*
LOG_M("rxdata0.m","rxd0",ue->common_vars.rxdata[0],10*frame_parms->samples_per_tti,1,1);
exit(-1);
*/
sync_pos = lte_sync_time(ue->common_vars.rxdata,
......
......@@ -36,7 +36,7 @@ This section deals with basic functions for OFDM Modulation.
#include "common/utils/LOG/vcd_signal_dumper.h"
#include "modulation_common.h"
#include "PHY/LTE_TRANSPORT/transport_common_proto.h"
//#define DEBUG_OFDM_MOD
#define DEBUG_OFDM_MOD
void normal_prefix_mod(int32_t *txdataF,int32_t *txdata,uint8_t nsymb,LTE_DL_FRAME_PARMS *frame_parms)
......@@ -122,10 +122,10 @@ void PHY_ofdm_mod(int *input, /// pointer to complex input
case 3072:
idft = idft3072;
break;
case 4096:
idft = idft4096;
break;
default:
idft = idft512;
break;
......
......@@ -61,7 +61,7 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
int uespec_pilot[9][1200];*/
void (*dft)(int16_t *,int16_t *, int);
int tmp_dft_in[2048] __attribute__ ((aligned (32))); // This is for misalignment issues for 6 and 15 PRBs
int tmp_dft_in[8192] __attribute__ ((aligned (32))); // This is for misalignment issues for 6 and 15 PRBs
switch (frame_parms->ofdm_symbol_size) {
case 128:
......@@ -88,6 +88,14 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
dft = dft2048;
break;
case 4096:
dft = dft4096;
break;
case 8192:
dft = dft8192;
break;
default:
dft = dft512;
break;
......
......@@ -63,7 +63,7 @@
/* PSS configuration */
#define SYNCHRO_FFT_SIZE_MAX (2048) /* maximum size of fft for synchronisation */
#define SYNCHRO_FFT_SIZE_MAX (8192) /* maximum size of fft for synchronisation */
#define NO_RATE_CHANGE (1)
......@@ -102,13 +102,18 @@ EXTERN int16_t *primary_synchro_nr[NUMBER_PSS_SEQUENCE]
= { NULL, NULL, NULL}
#endif
;
EXTERN int16_t *primary_synchro_nr2[NUMBER_PSS_SEQUENCE]
#ifdef INIT_VARIABLES_PSS_NR_H
= { NULL, NULL, NULL}
#endif
;
EXTERN int16_t *primary_synchro_time_nr[NUMBER_PSS_SEQUENCE]
#ifdef INIT_VARIABLES_PSS_NR_H
= { NULL, NULL, NULL}
#endif
;
EXTERN int *pss_corr_ue[NUMBER_PSS_SEQUENCE]
EXTERN int64_t *pss_corr_ue[NUMBER_PSS_SEQUENCE]
#ifdef INIT_VARIABLES_PSS_NR_H
= { NULL, NULL, NULL}
#endif
......
......@@ -53,6 +53,7 @@ int nr_generate_pss( int16_t *d_pss,
#ifdef NR_PSS_DEBUG
write_output("d_pss.m", "d_pss", (void*)d_pss, NR_PSS_LENGTH, 1, 0);
printf("PSS: ofdm_symbol_size %d, first_carrier_offset %d\n",frame_parms->ofdm_symbol_size,frame_parms->first_carrier_offset);
#endif
/// Resource mapping
......@@ -63,9 +64,12 @@ int nr_generate_pss( int16_t *d_pss,
// PSS occupies a predefined position (subcarriers 56-182, symbol 0) within the SSB block starting from
k = frame_parms->first_carrier_offset + frame_parms->ssb_start_subcarrier + 56; //and
if (k>= frame_parms->ofdm_symbol_size) k-=frame_parms->ofdm_symbol_size;
l = ssb_start_symbol;
for (m = 0; m < NR_PSS_LENGTH; m++) {
printf("pss: writing position k %d / %d\n",k,frame_parms->ofdm_symbol_size);
((int16_t*)txdataF[aa])[2*(l*frame_parms->ofdm_symbol_size + k)] = (a * d_pss[m]) >> 15;
k++;
......@@ -75,7 +79,9 @@ int nr_generate_pss( int16_t *d_pss,
}
#ifdef NR_PSS_DEBUG
write_output("pss_0.m", "pss_0", (void*)&txdataF[0][2*l*frame_parms->ofdm_symbol_size], frame_parms->ofdm_symbol_size, 1, 1);
LOG_M("pss_0.m", "pss_0",
(void*)&txdataF[0][ssb_start_symbol*frame_parms->ofdm_symbol_size],
frame_parms->ofdm_symbol_size, 1, 1);
#endif
return 0;
......
......@@ -21,7 +21,7 @@
#include "PHY/NR_TRANSPORT/nr_transport.h"
#define NR_SSS_DEBUG
//#define NR_SSS_DEBUG
int nr_generate_sss( int16_t *d_sss,
int32_t **txdataF,
......@@ -76,7 +76,6 @@ int nr_generate_sss( int16_t *d_sss,
for (int m = 0; m < NR_SSS_LENGTH; m++) {
((int16_t*)txdataF[aa])[2*(l*frame_parms->ofdm_symbol_size + k)] = (a * d_sss[m]) >> 15;
printf("sss %d: %d\n",m,((int16_t*)txdataF[aa])[2*(l*frame_parms->ofdm_symbol_size + k)]);
k++;
if (k >= frame_parms->ofdm_symbol_size)
......
......@@ -145,26 +145,19 @@ int nr_initial_sync(PHY_VARS_NR_UE *ue, runmode_t mode)
{
int32_t sync_pos, sync_pos2, sync_pos_slot; // k_ssb, N_ssb_crb,
int32_t metric_fdd_ncp=0;
uint8_t phase_fdd_ncp;
int32_t metric_tdd_ncp=0;
uint8_t phase_tdd_ncp;
NR_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
int ret=-1;
int rx_power=0; //aarx,
//nfapi_nr_config_request_t* config;
/*offset parameters to be updated from higher layer */
//k_ssb =0;
//N_ssb_crb = 0;
/*#ifdef OAI_USRP
__m128i *rxdata128;
#endif*/
// LOG_I(PHY,"**************************************************************\n");
// First try FDD normal prefix
// First try TDD normal prefix, mu 1
frame_parms->Ncp=NORMAL;
frame_parms->frame_type=TDD;
nr_init_frame_parms_ue(frame_parms);
nr_init_frame_parms_ue(frame_parms,NR_MU_1,NORMAL);
LOG_D(PHY,"nr_initial sync ue RB_DL %d\n", ue->frame_parms.N_RB_DL);
/*
write_output("rxdata0.m","rxd0",ue->common_vars.rxdata[0],10*frame_parms->samples_per_tti,1,1);
......@@ -183,6 +176,8 @@ int nr_initial_sync(PHY_VARS_NR_UE *ue, runmode_t mode)
* --------------------------
* sync_pos SS/PBCH block
*/
cnt++;
if (1){ // (cnt>100)
cnt =0;
......@@ -190,22 +185,13 @@ int nr_initial_sync(PHY_VARS_NR_UE *ue, runmode_t mode)
/* process pss search on received buffer */
sync_pos = pss_synchro_nr(ue, NO_RATE_CHANGE);
sync_pos_slot = (frame_parms->samples_per_tti>>1) - 3*(frame_parms->ofdm_symbol_size + frame_parms->nb_prefix_samples);
sync_pos = sync_pos_slot+frame_parms->nb_prefix_samples;
if (sync_pos >= frame_parms->nb_prefix_samples)
sync_pos2 = sync_pos - frame_parms->nb_prefix_samples;
else
sync_pos2 = sync_pos + FRAME_LENGTH_COMPLEX_SAMPLES - frame_parms->nb_prefix_samples;
/* offset is used by sss serach as it is returned from pss search */
if (sync_pos2 >= sync_pos_slot)
ue->rx_offset = sync_pos2 - sync_pos_slot;
else
ue->rx_offset = FRAME_LENGTH_COMPLEX_SAMPLES + sync_pos2 - sync_pos_slot;
LOG_D(PHY,"sync_pos %d sync_pos_slot %d rx_offset %d\n",sync_pos,sync_pos_slot, ue->rx_offset);
ue->ssb_offset = sync_pos - frame_parms->nb_prefix_samples;
else
ue->ssb_offset = sync_pos + FRAME_LENGTH_COMPLEX_SAMPLES - frame_parms->nb_prefix_samples;
LOG_D(PHY,"sync_pos %d ssb_offset %d\n",sync_pos,ue->ssb_offset);
// write_output("rxdata1.m","rxd1",ue->common_vars.rxdata[0],10*frame_parms->samples_per_tti,1,1);
......@@ -221,19 +207,20 @@ int nr_initial_sync(PHY_VARS_NR_UE *ue, runmode_t mode)
LOG_I(PHY,"Calling sss detection (normal CP)\n");
#endif
rx_sss_nr(ue,&metric_fdd_ncp,&phase_fdd_ncp);
rx_sss_nr(ue,&metric_tdd_ncp,&phase_tdd_ncp);
nr_init_frame_parms_ue(&ue->frame_parms);
nr_init_frame_parms_ue(&ue->frame_parms,NR_MU_1,NORMAL);
nr_gold_pbch(ue);
ret = nr_pbch_detection(ue,mode);
nr_gold_pdcch(ue,0, 2);
/*
int nb_prefix_samples0 = frame_parms->nb_prefix_samples0;
frame_parms->nb_prefix_samples0 = 0;
nr_slot_fep(ue,0, 0, ue->rx_offset, 0, 1, NR_PDCCH_EST);
nr_slot_fep(ue,1, 0, ue->rx_offset, 0, 1, NR_PDCCH_EST);
frame_parms->nb_prefix_samples0 = frame_parms->nb_prefix_samples.
nr_slot_fep(ue,0, 0, ue->ssb_offset, 0, 1, NR_PDCCH_EST);
nr_slot_fep(ue,1, 0, ue->ssb_offset, 0, 1, NR_PDCCH_EST);
frame_parms->nb_prefix_samples0 = nb_prefix_samples0;
LOG_I(PHY,"[UE %d] AUTOTEST Cell Sync : frame = %d, rx_offset %d, freq_offset %d \n",
......@@ -241,18 +228,16 @@ int nr_initial_sync(PHY_VARS_NR_UE *ue, runmode_t mode)
ue->proc.proc_rxtx[0].frame_rx,
ue->rx_offset,
ue->common_vars.freq_offset );
//ret = -1; //to be deleted
// write_output("rxdata2.m","rxd2",ue->common_vars.rxdata[0],10*frame_parms->samples_per_tti,1,1);
*/
#ifdef DEBUG_INITIAL_SYNCH
LOG_I(PHY,"FDD Normal prefix: CellId %d metric %d, phase %d, flip %d, pbch %d\n",
frame_parms->Nid_cell,metric_fdd_ncp,phase_fdd_ncp,flip_fdd_ncp,ret);
LOG_I(PHY,"TDD Normal prefix: CellId %d metric %d, phase %d, flip %d, pbch %d\n",
frame_parms->Nid_cell,metric_tdd_ncp,phase_tdd_ncp,flip_tdd_ncp,ret);
#endif
}
else {
#ifdef DEBUG_INITIAL_SYNCH
LOG_I(PHY,"FDD Normal prefix: SSS error condition: sync_pos %d, sync_pos_slot %d\n", sync_pos, sync_pos_slot);
LOG_I(PHY,"TDD Normal prefix: SSS error condition: sync_pos %d, sync_pos_slot %d\n", sync_pos, sync_pos_slot);
#endif
}
}
......@@ -370,12 +355,6 @@ int nr_initial_sync(PHY_VARS_NR_UE *ue, runmode_t mode)
#ifdef DEBUG_INITIAL_SYNC
LOG_I(PHY,"[UE%d] Initial sync : PBCH not ok\n",ue->Mod_id);
LOG_I(PHY,"[UE%d] Initial sync : Estimated PSS position %d, Nid2 %d\n",ue->Mod_id,sync_pos,ue->common_vars.eNb_id);
/* LOG_I(PHY,"[UE%d] Initial sync: (metric fdd_ncp %d (%d), metric fdd_ecp %d (%d), metric_tdd_ncp %d (%d), metric_tdd_ecp %d (%d))\n",
ue->Mod_id,
metric_fdd_ncp,Nid_cell_fdd_ncp,
metric_fdd_ecp,Nid_cell_fdd_ecp,
metric_tdd_ncp,Nid_cell_tdd_ncp,
metric_tdd_ecp,Nid_cell_tdd_ecp);*/
LOG_I(PHY,"[UE%d] Initial sync : Estimated Nid_cell %d, Frame_type %d\n",ue->Mod_id,
frame_parms->Nid_cell,frame_parms->frame_type);
#endif
......
......@@ -1362,6 +1362,7 @@ void generate_RIV_tables(void);
N_RB_DL, PHICH_CONFIG and Nid_cell) and the UE can begin decoding PDCCH and DLSCH SI to retrieve the rest. Once these
parameters are know, the routine calls some basic initialization routines (cell-specific reference signals, etc.)
@param phy_vars_ue Pointer to UE variables
@param mode current running mode
*/
int nr_initial_sync(PHY_VARS_NR_UE *phy_vars_ue, runmode_t mode);
......
This diff is collapsed.
......@@ -213,10 +213,14 @@ int pss_ch_est_nr(PHY_VARS_NR_UE *ue,
uint8_t aarx,i;
NR_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
pss = primary_synchro_nr[ue->common_vars.eNb_id];
pss = primary_synchro_nr2[ue->common_vars.eNb_id];
sss_ext3 = (int16_t*)&sss_ext[0][0];
#if 0
int16_t chest[2*LENGTH_PSS_NR];
#endif
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
sss_ext2 = (int16_t*)&sss_ext[aarx][0];
......@@ -243,18 +247,28 @@ int pss_ch_est_nr(PHY_VARS_NR_UE *ue,
#endif
int32_t amp;
int shift;
for (i = 0; i < LENGTH_PSS_NR; i++) {
// This is H*(PSS) = R* \cdot PSS
tmp_re = (int16_t)(((pss_ext2[i*2] * (int32_t)pss[i*2])>>SCALING_CE_PSS_NR) + ((pss_ext2[i*2+1] * (int32_t)pss[i*2+1])>>SCALING_CE_PSS_NR));
tmp_im = (int16_t)(((pss_ext2[i*2] * (int32_t)pss[i*2+1])>>SCALING_CE_PSS_NR) - ((pss_ext2[i*2+1] * (int32_t)pss[i*2])>>SCALING_CE_PSS_NR));
//printf("H*(%d,%d) : (%d,%d)\n",aarx,i,tmp_re,tmp_im);
//printf("pss(%d,%d) : (%d,%d)\n",aarx,i,pss[2*i],pss[2*i+1]);
//printf("pss_ext(%d,%d) : (%d,%d)\n",aarx,i,pss_ext2[2*i],pss_ext2[2*i+1]);
tmp_re = pss_ext2[i*2] * pss[i];
tmp_im = -pss_ext2[i*2+1] * pss[i];
amp = (((int32_t)tmp_re)*tmp_re) + ((int32_t)tmp_im)*tmp_im;
shift = log2_approx(amp)/2;
#if 0
printf("H*(%d,%d) : (%d,%d)\n",aarx,i,tmp_re,tmp_im);
printf("pss(%d,%d) : (%d,%d)\n",aarx,i,pss[2*i],pss[2*i+1]);
printf("pss_ext(%d,%d) : (%d,%d)\n",aarx,i,pss_ext2[2*i],pss_ext2[2*i+1]);
if (aarx==0) {
chest[i<<1]=tmp_re;
chest[1+(i<<1)]=tmp_im;
}
#endif
// This is R(SSS) \cdot H*(PSS)
tmp_re2 = (int16_t)(((tmp_re * (int32_t)sss_ext2[i*2])>>SCALING_CE_PSS_NR) - ((tmp_im * (int32_t)sss_ext2[i*2+1]>>SCALING_CE_PSS_NR)));
tmp_im2 = (int16_t)(((tmp_re * (int32_t)sss_ext2[i*2+1])>>SCALING_CE_PSS_NR) + ((tmp_im * (int32_t)sss_ext2[i*2]>>SCALING_CE_PSS_NR)));
tmp_re2 = (int16_t)(((tmp_re * (int32_t)sss_ext2[i*2])>>shift) - ((tmp_im * (int32_t)sss_ext2[i*2+1]>>shift)));
tmp_im2 = (int16_t)(((tmp_re * (int32_t)sss_ext2[i*2+1])>>shift) + ((tmp_im * (int32_t)sss_ext2[i*2]>>shift)));
// printf("SSSi(%d,%d) : (%d,%d)\n",aarx,i,sss_ext2[i<<1],sss_ext2[1+(i<<1)]);
// printf("SSSo(%d,%d) : (%d,%d)\n",aarx,i,tmp_re2,tmp_im2);
......@@ -268,7 +282,11 @@ int pss_ch_est_nr(PHY_VARS_NR_UE *ue,
}
}
}
#if 0
LOG_M("pssrx.m","pssrx",pss,LENGTH_PSS_NR,1,1);
LOG_M("pss_ext.m","pssext",pss_ext2,LENGTH_PSS_NR,1,1);
LOG_M("psschest.m","pssch",chest,LENGTH_PSS_NR,1,1);
#endif
#if 0
for (int i = 0; i < LENGTH_PSS_NR; i++) {
......@@ -336,10 +354,8 @@ int do_pss_sss_extract_nr(PHY_VARS_NR_UE *ue,
k++;
if (k >= ofdm_symbol_size) {
k++;
k-=ofdm_symbol_size;
}
if (k == ofdm_symbol_size) k=0;
}
}
......@@ -423,23 +439,24 @@ int rx_sss_nr(PHY_VARS_NR_UE *ue, int32_t *tot_metric,uint8_t *phase_max)
/* rxdataF stores SS/PBCH from beginning of buffers in the same symbol order as in time domain */
int nb_prefix_samples0 = frame_parms->nb_prefix_samples0;
frame_parms->nb_prefix_samples0 = 0;
// For now, symbol 0 = PSS/PBCH and it is never in symbol 0 or 7*2^mu (i.e. always shorter prefix)
frame_parms->nb_prefix_samples0 = frame_parms->nb_prefix_samples;
// Do FFTs for SSS/PSS
// SSS
nr_slot_fep(ue,
SSS_SYMBOL_NB, // symbol number
SSS_SYMBOL_NB-PSS_SYMBOL_NB, // symbol number w.r.t. PSS
0, // Ns slot number
ue->rx_offset, // sample_offset of int16_t
ue->ssb_offset, // sample_offset of int16_t
0, // no_prefix
1, // reset frequency estimation