Commit 63b8be32 authored by Guy De Souza's avatar Guy De Souza

DMRS sequence generation

parent fea11c17
......@@ -147,14 +147,18 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
//PDSCH DMRS init
gNB->nr_gold_pdsch_dmrs = (uint32_t ***)malloc16(fp->slots_per_frame*sizeof(uint32_t**));
uint32_t ***pdsch_dmrs = gNB->nr_gold_pdsch_dmrs;
gNB->nr_gold_pdsch_dmrs = (uint32_t ****)malloc16(fp->slots_per_frame*sizeof(uint32_t***));
uint32_t ****pdsch_dmrs = gNB->nr_gold_pdsch_dmrs;
for (int slot=0; slot<fp->slots_per_frame; slot++) {
pdsch_dmrs[slot] = (uint32_t **)malloc16(fp->symbols_per_slot*sizeof(uint32_t*));
pdsch_dmrs[slot] = (uint32_t ***)malloc16(fp->symbols_per_slot*sizeof(uint32_t**));
AssertFatal(pdsch_dmrs[slot]!=NULL, "NR init: pdsch_dmrs for slot %d - malloc failed\n", slot);
for (int symb=0; symb<fp->symbols_per_slot; symb++){
pdsch_dmrs[slot][symb] = (uint32_t *)malloc16(NR_MAX_PDSCH_DMRS_INIT_LENGTH_DWORD*sizeof(uint32_t));
pdsch_dmrs[slot][symb] = (uint32_t **)malloc16(NR_MAX_NB_CODEWORDS*sizeof(uint32_t*));
AssertFatal(pdsch_dmrs[slot][symb]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb);
for (int q=0; q<NR_MAX_NB_CODEWORDS; q++) {
pdsch_dmrs[slot][symb][q] = (uint32_t*)malloc16(NR_MAX_PDSCH_DMRS_INIT_LENGTH_DWORD*sizeof(uint32_t));
AssertFatal(pdsch_dmrs[slot][symb][q]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d codeword %d - malloc failed\n", slot, symb, q);
}
}
}
......
......@@ -65,7 +65,7 @@ void nr_init_pdcch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid)
for (uint8_t symb=0; symb<fp->symbols_per_slot; symb++) {
reset = 1;
x2 = ((1<<17) * (14*slot+symb+1) * ((Nid<<1)+1) + (Nid<<1))&(((uint32_t)1<<31)-1);
x2 = ((1<<17) * (14*slot+symb+1) * ((Nid<<1)+1) + (Nid<<1));
for (uint32_t n=0; n<NR_MAX_PDCCH_DMRS_INIT_LENGTH_DWORD; n++) {
pdcch_dmrs[slot][symb][n] = lte_gold_generic(&x1, &x2, reset);
......@@ -82,19 +82,21 @@ void nr_init_pdsch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid)
uint32_t x1, x2;
uint8_t reset;
int Nscid;
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
uint32_t ***pdsch_dmrs = gNB->nr_gold_pdsch_dmrs;
//x2 compute by 38.211 7.4.1.1.1
Nscid = 0;
uint32_t ****pdsch_dmrs = gNB->nr_gold_pdsch_dmrs;
uint16_t N_n_scid[NR_MAX_NB_CODEWORDS]={Nid, Nid}; // Not correct, appropriate scrambling IDs have to be updated to support DCI 1_1
uint8_t n_scid=0; // again works only for 1_0
for (uint8_t slot=0; slot<fp->slots_per_frame; slot++) {
for (uint8_t symb=0; symb<fp->symbols_per_slot; symb++) {
reset = 1;
x2 = ((1<<17) * (slot*symb*slot+symb+1) * ((Nid<<1)+1) +((Nid<<1)+Nscid))&(((uint32_t)1<<31)-1);
for (uint32_t n=0; n<NR_MAX_PDSCH_DMRS_INIT_LENGTH_DWORD; n++) {
pdsch_dmrs[slot][symb][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
for (uint8_t q=0; q<NR_MAX_NB_CODEWORDS; q++) {
reset = 1;
x2 = ((1<<17) * (fp->symbols_per_slot*slot+symb+1) * ((N_n_scid[n_scid]<<1)+1) +((N_n_scid[n_scid]<<1)+n_scid));
for (uint32_t n=0; n<NR_MAX_PDSCH_DMRS_INIT_LENGTH_DWORD; n++) {
pdsch_dmrs[slot][symb][q][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
}
}
}
......
......@@ -190,7 +190,7 @@ static inline uint16_t get_pdsch_dmrs_idx(uint8_t n, uint8_t k_prime, uint8_t de
uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t dlsch,
NR_gNB_DCI_ALLOC_t dci_alloc,
uint32_t **pdsch_dmrs,
uint32_t ***pdsch_dmrs,
int32_t** txdataF,
int16_t amp,
uint8_t subframe,
......@@ -289,7 +289,7 @@ for (int l=0; l<rel15->nb_layers; l++)
int16_t mod_dmrs[n_dmrs<<1];
uint8_t dmrs_type = config.pdsch_config.dmrs_type.value;
l0 = get_l0(dmrs_type, 2);//config.pdsch_config.dmrs_typeA_position.value);
nr_modulation(pdsch_dmrs[l0], n_dmrs, MOD_QPSK, mod_dmrs);
nr_modulation(pdsch_dmrs[l0][0], n_dmrs, MOD_QPSK, mod_dmrs); // currently only codeword 0 is modulated
#ifdef DEBUG_DLSCH
printf("DMRS modulation (single symbol %d, %d symbols, type %d):\n", l0, n_dmrs, dmrs_type);
for (int i=0; i<n_dmrs>>3; i++) {
......
......@@ -79,7 +79,7 @@ void nr_pdsch_layer_mapping(int16_t **mod_symbs,
uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t dlsch,
NR_gNB_DCI_ALLOC_t dci_alloc,
uint32_t **pdsch_dmrs,
uint32_t ***pdsch_dmrs,
int32_t** txdataF,
int16_t amp,
uint8_t subframe,
......
......@@ -405,7 +405,7 @@ typedef struct PHY_VARS_gNB_s {
uint32_t ***nr_gold_pdcch_dmrs;
/// PDSCH DMRS sequence
uint32_t ***nr_gold_pdsch_dmrs;
uint32_t ****nr_gold_pdsch_dmrs;
/// Indicator set to 0 after first SR
uint8_t first_sr[NUMBER_OF_UE_MAX];
......
......@@ -73,8 +73,8 @@
/*used for the resource mapping*/
#define NR_MAX_PDCCH_DMRS_LENGTH 576 // 16(L)*2(QPSK)*3(3 DMRS symbs per REG)*6(REG per CCE)
#define NR_MAX_PDSCH_DMRS_LENGTH 1100 //275*2(k)*2(QPSK)
#define NR_MAX_PDSCH_DMRS_INIT_LENGTH_DWORD 35 // ceil(NR_MAX_PDSCH_DMRS_LENGTH/32)
#define NR_MAX_PDSCH_DMRS_LENGTH 3300 //275*6(k)*2(QPSK)
#define NR_MAX_PDSCH_DMRS_INIT_LENGTH_DWORD 104 // ceil(NR_MAX_PDSCH_DMRS_LENGTH/32)
#define NR_MAX_DCI_PAYLOAD_SIZE 64
#define NR_MAX_DCI_SIZE 1728 //16(L)*2(QPSK)*9(12 RE per REG - 3(DMRS))*6(REG per CCE)
......
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