Commit 83c3acd0 authored by knopp's avatar knopp

git-svn-id: http://svn.eurecom.fr/openair4G/trunk@5699 818b1a75-f10b-46b9-bf7c-635c3b92a50f
parent 1ae40bac
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......@@ -64,6 +64,7 @@
#include "MBSFN-AreaInfoList-r9.h"
#include "MBSFN-SubframeConfigList.h"
#include "PMCH-InfoList-r9.h"
#include "SCellToAddMod-r10.h"
#endif
//#ifdef PHY_EMUL
......@@ -620,14 +621,28 @@ typedef struct{
}SBMAP_CONF;
//end ALU's algo
typedef struct{
DLSCH_PDU DLSCH_pdu[MAX_NUM_CCs][2][NUMBER_OF_UE_MAX];
/// DCI template and MAC connection parameters for UEs
UE_TEMPLATE UE_template[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
/// DCI template and MAC connection for RA processes
int pCC_id[NUMBER_OF_UE_MAX];
int ordered_CCids[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
int numactiveCCs[NUMBER_OF_UE_MAX];
int ordered_ULCCids[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
int numactiveULCCs[NUMBER_OF_UE_MAX];
/// eNB to UE statistics
eNB_UE_STATS eNB_UE_stats[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
UE_sched_ctrl UE_sched_ctrl[NUMBER_OF_UE_MAX];
int next[NUMBER_OF_UE_MAX];
int head;
int avail;
int num_UEs;
boolean_t active[NUMBER_OF_UE_MAX];
} UE_list_t;
typedef struct{
///
uint16_t Node_id;
/// frame counter
frame_t frame;
/// subframe counter
sub_frame_t subframe;
/// Outgoing DCI for PHY generated by eNB scheduler
DCI_PDU DCI_pdu;
/// Outgoing BCCH pdu for PHY
......@@ -636,11 +651,6 @@ typedef struct{
uint32_t BCCH_alloc_pdu;
/// Outgoing CCCH pdu for PHY
CCCH_PDU CCCH_pdu;
/// Outgoing DLSCH pdu for PHY
DLSCH_PDU DLSCH_pdu[NUMBER_OF_UE_MAX+1][2];
/// DCI template and MAC connection parameters for UEs
UE_TEMPLATE UE_template[NUMBER_OF_UE_MAX];
/// DCI template and MAC connection for RA processes
RA_TEMPLATE RA_template[NB_RA_PROC_MAX];
/// BCCH active flag
uint8_t bcch_active;
......@@ -674,16 +684,25 @@ typedef struct{
uint8_t num_active_cba_groups;
uint16_t cba_rnti[NUM_MAX_CBA_GROUP];
#endif
}COMMON_channels_t;
typedef struct{
///
uint16_t Node_id;
/// frame counter
frame_t frame;
/// subframe counter
sub_frame_t subframe;
/// Common cell resources
COMMON_channels_t common_channels[MAX_NUM_CCs];
UE_list_t UE_list;
///subband bitmap configuration
SBMAP_CONF sbmap_conf;
/// active flag for Other lcid
uint8_t lcid_active[NB_RB_MAX];
// uint8_t lcid_active[NB_RB_MAX];
// eNB stats
eNB_STATS eNB_stats;
/// eNB to UE statistics
eNB_UE_STATS eNB_UE_stats[NUMBER_OF_UE_MAX];
UE_sched_ctrl UE_sched_ctrl[NUMBER_OF_UE_MAX];
// MAC function execution peformance profiler
time_stats_t eNB_scheduler;
time_stats_t schedule_si;
......@@ -766,6 +785,10 @@ typedef struct{
struct RACH_ConfigDedicated *rach_ConfigDedicated;
/// pointer to RRC PHY configuration
struct PhysicalConfigDedicated *physicalConfigDedicated;
#ifdef Rel10
/// pointer to RRC PHY configuration SCEll
struct PhysicalConfigDedicatedSCell_r10 *physicalConfigDedicatedSCell_r10;
#endif
/// pointer to TDD Configuration (NULL for FDD)
TDD_Config_t *tdd_Config;
/// Number of adjacent cells to measure
......@@ -912,6 +935,10 @@ int rrc_mac_config_req(module_id_t module_idP,
uint8_t eNB_index,
RadioResourceConfigCommonSIB_t *radioResourceConfigCommon,
struct PhysicalConfigDedicated *physicalConfigDedicated,
#ifdef Rel10
SCellToAddMod_r10_t *sCellToAddMod_r10,
//struct PhysicalConfigDedicatedSCell_r10 *physicalConfigDedicatedSCell_r10,
#endif
MeasObjectToAddMod_t **measObj,
MAC_MainConfig_t *mac_MainConfig,
long logicalChannelIdentity,
......
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......@@ -70,25 +70,33 @@
#define DEBUG_eNB_SCHEDULER 1
void schedule_SI(module_id_t module_idP,frame_t frameP, unsigned char *nprb,unsigned int *nCCE) {
void schedule_SI(module_id_t module_idP,frame_t frameP, unsigned int *nprbP,unsigned int *nCCEP) {
start_meas(&eNB_mac_inst[module_idP].schedule_si);
unsigned char bcch_sdu_length;
int mcs = -1;
void *BCCH_alloc_pdu=(void*)&eNB_mac_inst[module_idP].BCCH_alloc_pdu;
bcch_sdu_length = mac_rrc_data_req(module_idP,
frameP,
BCCH,1,
&eNB_mac_inst[module_idP].BCCH_pdu.payload[0],
1,
module_idP,
0); // not used in this case
if (bcch_sdu_length > 0) {
LOG_D(MAC,"[eNB %d] Frame %d : BCCH->DLSCH, Received %d bytes \n",module_idP,frameP,bcch_sdu_length);
void *BCCH_alloc_pdu;
int CC_id;
eNB_MAC_INST *eNB = &eNB_mac_inst[module_idP];
start_meas(&eNB->schedule_si);
for (CC_id=0;CC_id<MAX_NUM_CCs;CC_id++) {
BCCH_alloc_pdu=(void*)&eNB->common_channels[CC_id].BCCH_alloc_pdu;
bcch_sdu_length = mac_rrc_data_req(module_idP,
frameP,
BCCH,1,
&eNB->common_channels[CC_id].BCCH_pdu.payload[0],
1,
module_idP,
0); // not used in this case
if (bcch_sdu_length > 0) {
LOG_D(MAC,"[eNB %d] Frame %d : BCCH->DLSCH CC_id %d, Received %d bytes \n",module_idP,CC_id,frameP,bcch_sdu_length);
if (bcch_sdu_length <= (mac_xface->get_TBS_DL(0,3)))
mcs=0;
else if (bcch_sdu_length <= (mac_xface->get_TBS_DL(1,3)))
......@@ -108,82 +116,83 @@ void schedule_SI(module_id_t module_idP,frame_t frameP, unsigned char *nprb,unsi
else if (bcch_sdu_length <= (mac_xface->get_TBS_DL(8,3)))
mcs=8;
if (mac_xface->lte_frame_parms->frame_type == TDD) {
switch (mac_xface->lte_frame_parms->N_RB_DL) {
case 6:
((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->mcs = mcs;
break;
case 25:
((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->mcs = mcs;
break;
case 50:
((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->mcs = mcs;
break;
case 100:
((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->mcs = mcs;
break;
}
if (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.frame_type == TDD) {
switch (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL) {
case 6:
((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->mcs = mcs;
break;
case 25:
((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->mcs = mcs;
break;
case 50:
((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->mcs = mcs;
break;
case 100:
((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->mcs = mcs;
break;
}
}
else {
switch (mac_xface->lte_frame_parms->N_RB_DL) {
case 6:
((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->mcs = mcs;
break;
case 25:
((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->mcs = mcs;
break;
case 50:
((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->mcs = mcs;
break;
case 100:
((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->mcs = mcs;
break;
}
switch (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL) {
case 6:
((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->mcs = mcs;
break;
case 25:
((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->mcs = mcs;
break;
case 50:
((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->mcs = mcs;
break;
case 100:
((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->mcs = mcs;
break;
}
}
#if defined(USER_MODE) && defined(OAI_EMU)
if (oai_emulation.info.opt_enabled) {
trace_pdu(1,
&eNB_mac_inst[module_idP].BCCH_pdu.payload[0],
&eNB->common_channels[CC_id].BCCH_pdu.payload[0],
bcch_sdu_length,
0xffff,
4,
0xffff,
eNB_mac_inst[module_idP].subframe,
eNB->subframe,
0,
0);
}
LOG_D(OPT,"[eNB %d][BCH] Frame %d trace pdu for rnti %x with size %d\n",
module_idP, frameP, 0xffff, bcch_sdu_length);
module_idP, frameP, 0xffff, bcch_sdu_length);
#endif
if (mac_xface->lte_frame_parms->frame_type == TDD) {
LOG_D(MAC,"[eNB] Frame %d : Scheduling BCCH->DLSCH (TDD) for SI %d bytes (mcs %d, rb 3, TBS %d)\n",
if (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.frame_type == TDD) {
LOG_D(MAC,"[eNB] Frame %d : Scheduling BCCH->DLSCH (TDD) for SI %d bytes (mcs %d, rb 3, TBS %d)\n",
frameP,
bcch_sdu_length,
mcs,
mac_xface->get_TBS_DL(mcs,3));
}
else {
LOG_D(MAC,"[eNB] Frame %d : Scheduling BCCH->DLSCH (FDD) for SI %d bytes (mcs %d, rb 3, TBS %d)\n",
LOG_D(MAC,"[eNB] Frame %d : Scheduling BCCH->DLSCH (FDD) for SI %d bytes (mcs %d, rb 3, TBS %d)\n",
frameP,
bcch_sdu_length,
mcs,
mac_xface->get_TBS_DL(mcs,3));
}
eNB_mac_inst[module_idP].bcch_active=1;
*nprb=3;
*nCCE=4;
}
else {
eNB_mac_inst[module_idP].bcch_active=0;
*nprb=0;
*nCCE=0;
//LOG_D(MAC,"[eNB %d] Frame %d : BCCH not active \n",Mod_id,frame);
eNB->common_channels[CC_id].bcch_active=1;
nprbP[CC_id]=3;
nCCEP[CC_id]=4;
}
else {
eNB->common_channels[CC_id].bcch_active=0;
nprbP[CC_id]=0;
nCCEP[CC_id]=0;
//LOG_D(MAC,"[eNB %d] Frame %d : BCCH not active \n",Mod_id,frame);
}
}
// this might be misleading when bcch is inactive
stop_meas(&eNB_mac_inst[module_idP].schedule_si);
stop_meas(&eNB->schedule_si);
return;
}
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......@@ -41,21 +41,33 @@
#include "UTIL/LOG/log.h"
#include "proto.h"
int8_t get_Po_NOMINAL_PUSCH(module_id_t module_idP) {
int8_t get_Po_NOMINAL_PUSCH(module_id_t module_idP,int CC_id) {
RACH_ConfigCommon_t *rach_ConfigCommon = NULL;
if (CC_id>0) {
LOG_E(MAC,"Transmission on secondary CCs is not supported yet\n");
mac_xface->macphy_exit("MAC FATAL CC_id>0");
return;
}
if (UE_mac_inst[module_idP].radioResourceConfigCommon)
rach_ConfigCommon = &UE_mac_inst[module_idP].radioResourceConfigCommon->rach_ConfigCommon;
else {
LOG_E(MAC,"[UE %d] FATAL radioResourceConfigCommon is NULL !!!\n",module_idP);
LOG_E(MAC,"[UE %d] CCid %d FATAL radioResourceConfigCommon is NULL !!!\n",module_idP,CC_id);
mac_xface->macphy_exit("FATAL radioResourceConfigCommon is NULL");
}
return(-120 + (rach_ConfigCommon->powerRampingParameters.preambleInitialReceivedTargetPower<<1) +
get_DELTA_PREAMBLE(module_idP));
get_DELTA_PREAMBLE(module_idP,CC_id));
}
int8_t get_deltaP_rampup(module_id_t module_idP) {
int8_t get_deltaP_rampup(module_id_t module_idP,int CC_id) {
if (CC_id>0) {
LOG_E(MAC,"Transmission on secondary CCs is not supported yet\n");
mac_xface->macphy_exit("MAC FATAL CC_id>0");
return;
}
LOG_D(MAC,"[PUSCH]%d dB\n",UE_mac_inst[module_idP].RA_PREAMBLE_TRANSMISSION_COUNTER<<1);
return((int8_t)(UE_mac_inst[module_idP].RA_PREAMBLE_TRANSMISSION_COUNTER<<1));
......
......@@ -115,6 +115,9 @@ int mac_top_init(int eMBMS_active, uint8_t cba_group_active, uint8_t HO_active){
RA_TEMPLATE *RA_template;
UE_TEMPLATE *UE_template;
int size_bytes1,size_bytes2,size_bits1,size_bits2;
int CC_id;
int list_el;
UE_list_t *UE_list;
LOG_I(MAC,"[MAIN] Init function start:Nb_UE_INST=%d\n",NB_UE_INST);
if (NB_UE_INST>0) {
......@@ -137,19 +140,31 @@ int mac_top_init(int eMBMS_active, uint8_t cba_group_active, uint8_t HO_active){
if (NB_eNB_INST>0) {
eNB_mac_inst = (eNB_MAC_INST*)malloc16(NB_eNB_INST*sizeof(eNB_MAC_INST));
if (eNB_mac_inst == NULL){
LOG_D(MAC,"[MAIN] can't ALLOCATE %d Bytes for %d eNB_MAC_INST with size %d \n",NB_eNB_INST*sizeof(eNB_MAC_INST),NB_eNB_INST,sizeof(eNB_MAC_INST));
LOG_D(MAC,"[MAIN] can't ALLOCATE %d Bytes for %d eNB_MAC_INST with size %d \n",NB_eNB_INST*sizeof(eNB_MAC_INST*),NB_eNB_INST,sizeof(eNB_MAC_INST));
mac_xface->macphy_exit("[MAC][MAIN] not enough memory for eNB \n");
}
LOG_D(MAC,"[MAIN] ALLOCATE %d Bytes for %d eNB_MAC_INST @ %p\n",NB_eNB_INST*sizeof(eNB_MAC_INST),NB_eNB_INST,eNB_mac_inst);
bzero(eNB_mac_inst,NB_eNB_INST*sizeof(eNB_MAC_INST));
else{
LOG_D(MAC,"[MAIN] ALLOCATE %d Bytes for %d eNB_MAC_INST @ %p\n",sizeof(eNB_MAC_INST),NB_eNB_INST,eNB_mac_inst);
bzero(eNB_mac_inst,NB_eNB_INST*sizeof(eNB_MAC_INST));
}
}
else
eNB_mac_inst = NULL;
// Initialize Linked-List for Active UEs
for(Mod_id=0;Mod_id<NB_eNB_INST;Mod_id++){
UE_list = &eNB_mac_inst[Mod_id].UE_list;
UE_list->num_UEs=0;
UE_list->head=-1;
UE_list->avail=0;
for (list_el=0;list_el<NUMBER_OF_UE_MAX-1;list_el++) {
UE_list->next[list_el]=list_el+1;
}
UE_list->next[list_el]=-1;
#ifdef PHY_EMUL
Mac_rlc_xface->Is_cluster_head[Mod_id]=2;//0: MR, 1: CH, 2: not CH neither MR
Mac_rlc_xface->Is_cluster_head[Mod_id]=2;//0: MR, 1: CH, 2: not CH neither MR
#endif
/*#ifdef Rel10
int n;
......@@ -181,11 +196,12 @@ int mac_top_init(int eMBMS_active, uint8_t cba_group_active, uint8_t HO_active){
// Set up DCIs for TDD 5MHz Config 1..6
for (i=0;i<NB_eNB_INST;i++) {
for (i=0;i<NB_eNB_INST;i++)
for (CC_id=0;CC_id<MAX_NUM_CCs;CC_id++) {
LOG_D(MAC,"[MAIN][eNB %d] initializing RA_template\n",i);
LOG_D(MAC, "[MSC_NEW][FRAME 00000][MAC_eNB][MOD %02d][]\n", i);
RA_template = (RA_TEMPLATE *)&eNB_mac_inst[i].RA_template[0];
RA_template = (RA_TEMPLATE *)&eNB_mac_inst[i].common_channels[CC_id].RA_template[0];
for (j=0;j<NB_RA_PROC_MAX;j++) {
if (mac_xface->lte_frame_parms->frame_type == TDD) {
switch (mac_xface->lte_frame_parms->N_RB_DL) {
......@@ -268,13 +284,13 @@ int mac_top_init(int eMBMS_active, uint8_t cba_group_active, uint8_t HO_active){
}
memset (&eNB_mac_inst[i].eNB_stats,0,sizeof(eNB_STATS));
UE_template = (UE_TEMPLATE *)&eNB_mac_inst[i].UE_template[0];
UE_template = (UE_TEMPLATE *)&eNB_mac_inst[i].UE_list.UE_template[CC_id][0];
for (j=0;j<NUMBER_OF_UE_MAX;j++) {
UE_template[j].rnti=0;
// initiallize the eNB to UE statistics
memset (&eNB_mac_inst[i].eNB_UE_stats[j],0,sizeof(eNB_UE_STATS));
memset (&eNB_mac_inst[i].UE_list.eNB_UE_stats[CC_id][j],0,sizeof(eNB_UE_STATS));
}
}
}
//ICIC init param
......@@ -284,15 +300,16 @@ int mac_top_init(int eMBMS_active, uint8_t cba_group_active, uint8_t HO_active){
srand (time(NULL));
for(j=0;j<NB_eNB_INST;j++){
eNB_mac_inst[j].sbmap_conf.first_subframe=0;
eNB_mac_inst[j].sbmap_conf.periodicity=10;
eNB_mac_inst[j].sbmap_conf.sb_size=SB_size;
eNB_mac_inst[j].sbmap_conf.nb_active_sb=1;
for(j=0;j<NB_eNB_INST;j++)
for (CC_id=0;CC_id<MAX_NUM_CCs;CC_id++){
eNB_mac_inst[j][CC_id].sbmap_conf.first_subframe=0;
eNB_mac_inst[j][CC_id].sbmap_conf.periodicity=10;
eNB_mac_inst[j][CC_id].sbmap_conf.sb_size=SB_size;
eNB_mac_inst[j][CC_id].sbmap_conf.nb_active_sb=1;
for(i=0;i<NUMBER_OF_SUBBANDS;i++)
eNB_mac_inst[j].sbmap_conf.sbmap[i]=1;
eNB_mac_inst[j][CC_id].sbmap_conf.sbmap[i]=1;
eNB_mac_inst[j].sbmap_conf.sbmap[rand()%NUMBER_OF_SUBBANDS]=0;
eNB_mac_inst[j][CC_id].sbmap_conf.sbmap[rand()%NUMBER_OF_SUBBANDS]=0;
}
#endif
......
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......@@ -57,6 +57,7 @@ extern unsigned short RIV2first_rb_LUT25[512];
extern inline unsigned int taus(void);
unsigned short fill_rar(module_id_t module_idP,
int CC_id,
frame_t frameP,
uint8_t *dlsch_buffer,
uint16_t N_RB_UL,
......@@ -70,9 +71,9 @@ unsigned short fill_rar(module_id_t module_idP,
uint8_t mcs,TPC,ULdelay,cqireq;
for (i=0;i<NB_RA_PROC_MAX;i++) {
if (eNB_mac_inst[module_idP].RA_template[i].generate_rar == 1) {
if (eNB_mac_inst[module_idP].common_channels[CC_id].RA_template[i].generate_rar == 1) {
ra_idx=i;
eNB_mac_inst[module_idP].RA_template[i].generate_rar = 0;
eNB_mac_inst[module_idP].common_channels[CC_id].RA_template[i].generate_rar = 0;
break;
}
}
......@@ -80,24 +81,24 @@ unsigned short fill_rar(module_id_t module_idP,
// subheader fixed
rarh->E = 0; // First and last RAR
rarh->T = 1; // 0 for E/T/R/R/BI subheader, 1 for E/T/RAPID subheader
rarh->RAPID = eNB_mac_inst[module_idP].RA_template[ra_idx].preamble_index; // Respond to Preamble 0 only for the moment
rarh->RAPID = eNB_mac_inst[module_idP].common_channels[CC_id].RA_template[ra_idx].preamble_index; // Respond to Preamble 0 only for the moment
/*
rar->R = 0;
rar->Timing_Advance_Command = eNB_mac_inst[module_idP].RA_template[ra_idx].timing_offset/4;
rar->Timing_Advance_Command = eNB_mac_inst[module_idP].common_channels[CC_id].RA_template[ra_idx].timing_offset/4;
rar->hopping_flag = 0;
rar->rb_alloc = mac_xface->computeRIV(N_RB_UL,12,2); // 2 RB
rar->mcs = 2; // mcs 2
rar->TPC = 4; // 2 dB power adjustment
rar->UL_delay = 0;
rar->cqi_req = 1;
rar->t_crnti = eNB_mac_inst[module_idP].RA_template[ra_idx].rnti;
rar->t_crnti = eNB_mac_inst[module_idP].common_channels[CC_id].RA_template[ra_idx].rnti;
*/
rar[4] = (uint8_t)(eNB_mac_inst[module_idP].RA_template[ra_idx].rnti>>8);
rar[5] = (uint8_t)(eNB_mac_inst[module_idP].RA_template[ra_idx].rnti&0xff);
eNB_mac_inst[module_idP].RA_template[ra_idx].timing_offset = 0;
//eNB_mac_inst[module_idP].RA_template[ra_idx].timing_offset /= 16;
rar[0] = (uint8_t)(eNB_mac_inst[module_idP].RA_template[ra_idx].timing_offset>>(2+4)); // 7 MSBs of timing advance + divide by 4
rar[1] = (uint8_t)(eNB_mac_inst[module_idP].RA_template[ra_idx].timing_offset<<(4-2))&0xf0; // 4 LSBs of timing advance + divide by 4
rar[4] = (uint8_t)(eNB_mac_inst[module_idP].common_channels[CC_id].RA_template[ra_idx].rnti>>8);
rar[5] = (uint8_t)(eNB_mac_inst[module_idP].common_channels[CC_id].RA_template[ra_idx].rnti&0xff);
eNB_mac_inst[module_idP].common_channels[CC_id].RA_template[ra_idx].timing_offset = 0;
//eNB_mac_inst[module_idP].common_channels[CC_id].RA_template[ra_idx].timing_offset /= 16;
rar[0] = (uint8_t)(eNB_mac_inst[module_idP].common_channels[CC_id].RA_template[ra_idx].timing_offset>>(2+4)); // 7 MSBs of timing advance + divide by 4
rar[1] = (uint8_t)(eNB_mac_inst[module_idP].common_channels[CC_id].RA_template[ra_idx].timing_offset<<(4-2))&0xf0; // 4 LSBs of timing advance + divide by 4
rballoc = mac_xface->computeRIV(N_RB_UL,1,1); // first PRB only for UL Grant
rar[1] |= (rballoc>>7)&7; // Hopping = 0 (bit 3), 3 MSBs of rballoc
rar[2] = ((uint8_t)(rballoc&0xff))<<1; // 7 LSBs of rballoc
......@@ -111,28 +112,33 @@ unsigned short fill_rar(module_id_t module_idP,
LOG_I(MAC,"[eNB %d][RAPROC] Frame %d Generating RAR (%02x|%02x.%02x.%02x.%02x.%02x.%02x) for ra_idx %d, CRNTI %x,preamble %d/%d,TIMING OFFSET %d\n",module_idP,frameP,
*(uint8_t*)rarh,rar[0],rar[1],rar[2],rar[3],rar[4],rar[5],
ra_idx,
eNB_mac_inst[module_idP].RA_template[ra_idx].rnti,
rarh->RAPID,eNB_mac_inst[module_idP].RA_template[0].preamble_index,
eNB_mac_inst[module_idP].RA_template[ra_idx].timing_offset);
eNB_mac_inst[module_idP].common_channels[CC_id].RA_template[ra_idx].rnti,
rarh->RAPID,eNB_mac_inst[module_idP].common_channels[CC_id].RA_template[0].preamble_index,
eNB_mac_inst[module_idP].common_channels[CC_id].RA_template[ra_idx].timing_offset);
#if defined(USER_MODE) && defined(OAI_EMU)
if (oai_emulation.info.opt_enabled){
trace_pdu(1, dlsch_buffer, input_buffer_length, module_idP, 2, 1,
eNB_mac_inst[module_idP].subframe, 0, 0);
LOG_I(OPT,"[eNB %d][RAPROC] RAR Frame %d trace pdu for rnti %x and rapid %d size %d\n",
module_idP, frameP, eNB_mac_inst[module_idP].RA_template[ra_idx].rnti,
module_idP, frameP, eNB_mac_inst[module_idP].common_channels[CC_id].RA_template[ra_idx].rnti,
rarh->RAPID, input_buffer_length);
}
#endif
return(eNB_mac_inst[module_idP].RA_template[ra_idx].rnti);
return(eNB_mac_inst[module_idP].common_channels[CC_id].RA_template[ra_idx].rnti);
}
uint16_t ue_process_rar(module_id_t module_idP, frame_t frameP, uint8_t *dlsch_buffer,rnti_t *t_crnti,uint8_t preamble_index) {
uint16_t ue_process_rar(module_id_t module_idP, int CC_id,frame_t frameP, uint8_t *dlsch_buffer,rnti_t *t_crnti,uint8_t preamble_index) {
RA_HEADER_RAPID *rarh = (RA_HEADER_RAPID *)dlsch_buffer;
// RAR_PDU *rar = (RAR_PDU *)(dlsch_buffer+1);
uint8_t *rar = (uint8_t *)(dlsch_buffer+1);
if (CC_id>0) {
LOG_W(MAC,"Should not have received RAR on secondary CCs! \n");
return(0xffff);
}
LOG_I(MAC,"[eNB %d][RAPROC] Frame %d Received RAR (%02x|%02x.%02x.%02x.%02x.%02x.%02x) for preamble %d/%d\n",module_idP,frameP,
*(uint8_t*)rarh,rar[0],rar[1],rar[2],rar[3],rar[4],rar[5],
rarh->RAPID,preamble_index);
......
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......@@ -61,6 +61,11 @@ UE_MAC_INST *UE_mac_inst; //[NB_MODULE_MAX];
eNB_MAC_INST *eNB_mac_inst; //[NB_MODULE_MAX];
MAC_RLC_XFACE *Mac_rlc_xface;
/// Primary component carrier index of eNB
int pCC_id[NUMBER_OF_eNB_MAX];
eNB_ULSCH_INFO eNB_ulsch_info[NUMBER_OF_eNB_MAX][NUMBER_OF_UE_MAX]; // eNBxUE = 8x8
eNB_DLSCH_INFO eNB_dlsch_info[NUMBER_OF_eNB_MAX][NUMBER_OF_UE_MAX]; // eNBxUE = 8x8
......
......@@ -89,6 +89,7 @@ MAC_OBJS += $(MAC_DIR)/eNB_scheduler_ulsch.o
MAC_OBJS += $(MAC_DIR)/eNB_scheduler_mch.o
MAC_OBJS += $(MAC_DIR)/eNB_scheduler_bch.o
MAC_OBJS += $(MAC_DIR)/eNB_scheduler_primitives.o
MAC_OBJS += $(MAC_DIR)/eNB_scheduler_RA.o
MAC_OBJS += $(MAC_DIR)/pre_processor.o
MAC_OBJS += $(MAC_DIR)/config.o
......
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