Commit 897de9f8 authored by knopp's avatar knopp

testing of rf simulation in UE

parent fa8b42c0
......@@ -368,16 +368,12 @@ uint8_t generate_dci_top(uint8_t num_pdcch_symbols,
if (dci_alloc[i].L == (uint8_t)L) {
#ifdef DEBUG_DCI_ENCODING
if (dci_alloc[i].rnti==0x1234)
LOG_D(PHY,"Generating DCI %d/%d (nCCE %d) of length %d, aggregation %d (%x), rnti %x\n",i,num_dci,dci_alloc[i].firstCCE,dci_alloc[i].dci_length,dci_alloc[i].L,
LOG_I(PHY,"Generating DCI %d/%d (nCCE %d) of length %d, aggregation %d (%x), rnti %x\n",
i,num_dci,dci_alloc[i].firstCCE,dci_alloc[i].dci_length,dci_alloc[i].L,
*(unsigned int*)dci_alloc[i].dci_pdu,
dci_alloc[i].rnti);
dump_dci(frame_parms,&dci_alloc[i]);
#endif
if (dci_alloc[i].firstCCE>=0) {
//printf("generate DCI .%d rnti %d length %d\n", subframe, dci_alloc[i].rnti, dci_alloc[i].dci_length);
e_ptr = generate_dci0(dci_alloc[i].dci_pdu,
e+(72*dci_alloc[i].firstCCE),
dci_alloc[i].dci_length,
......
......@@ -3481,13 +3481,13 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu,
ulsch->harq_processes[harq_pid]->nb_rb = RIV2nb_rb_LUT[rballoc];
if (ue->ul_power_control_dedicated[eNB_id].accumulationEnabled == 1) {
LOG_D(PHY,"[UE %d][PUSCH %d] Frame %d subframe %d: f_pusch (ACC) %d, adjusting by %d (TPC %d)\n",
LOG_I(PHY,"[UE %d][PUSCH %d] Frame %d subframe %d: f_pusch (ACC) %d, adjusting by %d (TPC %d)\n",
ue->Mod_id,harq_pid,proc->frame_rx,subframe,ulsch->f_pusch,
delta_PUSCH_acc[ue->ulsch[eNB_id]->harq_processes[harq_pid]->TPC],
ue->ulsch[eNB_id]->harq_processes[harq_pid]->TPC);
ulsch->f_pusch += delta_PUSCH_acc[ue->ulsch[eNB_id]->harq_processes[harq_pid]->TPC];
} else {
LOG_D(PHY,"[UE %d][PUSCH %d] Frame %d subframe %d: f_pusch (ABS) %d, adjusting to %d (TPC %d)\n",
LOG_I(PHY,"[UE %d][PUSCH %d] Frame %d subframe %d: f_pusch (ABS) %d, adjusting to %d (TPC %d)\n",
ue->Mod_id,harq_pid,proc->frame_rx,subframe,ulsch->f_pusch,
delta_PUSCH_abs[ue->ulsch[eNB_id]->harq_processes[harq_pid]->TPC],
ue->ulsch[eNB_id]->harq_processes[harq_pid]->TPC);
......
......@@ -1899,7 +1899,7 @@ void dci_decoding_procedure0(LTE_UE_PDCCH **pdcch_vars,
LOG_D(PHY,"[DCI search nPdcch %d - common] Attempting candidate %d Aggregation Level %d DCI length %d at CCE %d/%d (CCEmap %x,CCEmap_cand %x)\n",
pdcch_vars[eNB_id]->num_pdcch_symbols,m,L2,sizeof_bits,CCEind,nCCE,*CCEmap,CCEmap_mask);
else
LOG_D(PHY,"[DCI search nPdcch %d - ue spec %x] Attempting candidate %d Aggregation Level %d DCI length %d at CCE %d/%d (CCEmap %x,CCEmap_cand %x) format %d\n",
LOG_I(PHY,"[DCI search nPdcch %d - ue spec %x] Attempting candidate %d Aggregation Level %d DCI length %d at CCE %d/%d (CCEmap %x,CCEmap_cand %x) format %d\n",
pdcch_vars[eNB_id]->num_pdcch_symbols,pdcch_vars[eNB_id]->crnti,m,L2,sizeof_bits,CCEind,nCCE,*CCEmap,CCEmap_mask,format_c);
dci_decoding(sizeof_bits,
......
......@@ -493,17 +493,6 @@ int initial_sync(PHY_VARS_UE *ue, runmode_t mode)
#endif
// send sync status to higher layers later when timing offset converge to target timing
#if OAISIM
if (ue->mac_enabled==1) {
LOG_I(PHY,"[UE%d] Sending synch status to higher layers\n",ue->Mod_id);
//mac_resynch();
dl_phy_sync_success(ue->Mod_id,ue->proc.proc_rxtx[0].frame_rx,0,1);//ue->common_vars.eNb_id);
ue->UE_mode[0] = PRACH;
}
else {
ue->UE_mode[0] = PUSCH;
}
#endif
generate_pcfich_reg_mapping(frame_parms);
generate_phich_reg_mapping(frame_parms);
......
......@@ -369,7 +369,7 @@ void rx_phich(PHY_VARS_UE *ue,
if (HI16>0) { //NACK
if (ue->ulsch_Msg3_active[eNB_id] == 1) {
LOG_D(PHY,"[UE %d][PUSCH %d][RAPROC] Frame %d subframe %d Msg3 PHICH, received NAK (%d) nseq %d, ngroup %d\n",
LOG_I(PHY,"[UE %d][PUSCH %d][RAPROC] Frame %d subframe %d Msg3 PHICH, received NAK (%d) nseq %d, ngroup %d\n",
ue->Mod_id,harq_pid,
proc->frame_rx,
subframe,
......@@ -379,7 +379,7 @@ void rx_phich(PHY_VARS_UE *ue,
ulsch->f_pusch += delta_PUSCH_acc[ulsch->harq_processes[harq_pid]->TPC];
LOG_D(PHY,"[PUSCH %d] AbsSubframe %d.%d: f_pusch (ACC) %d, adjusting by %d (TPC %d)\n",
LOG_I(PHY,"[PUSCH %d] AbsSubframe %d.%d: f_pusch (ACC) %d, adjusting by %d (TPC %d)\n",
harq_pid,proc->frame_rx,subframe,ulsch->f_pusch,
delta_PUSCH_acc[ulsch->harq_processes[harq_pid]->TPC],
ulsch->harq_processes[harq_pid]->TPC);
......
......@@ -182,7 +182,7 @@ int generate_ue_ulsch_params_from_rar(PHY_VARS_UE *ue,
// initialize power control based on PRACH power
ulsch->f_pusch = delta_PUSCH_msg2[ulsch->harq_processes[harq_pid]->TPC] +
get_deltaP_rampup(ue->Mod_id,ue->CC_id);
LOG_D(PHY,"[UE %d][PUSCH PC] Initializing f_pusch to %d dB, TPC %d (delta_PUSCH_msg2 %d dB), deltaP_rampup %d dB\n",
LOG_I(PHY,"[UE %d][PUSCH PC] Initializing f_pusch to %d dB, TPC %d (delta_PUSCH_msg2 %d dB), deltaP_rampup %d dB\n",
ue->Mod_id,ulsch->f_pusch,ulsch->harq_processes[harq_pid]->TPC,delta_PUSCH_msg2[ulsch->harq_processes[harq_pid]->TPC],
get_deltaP_rampup(ue->Mod_id,ue->CC_id));
......
......@@ -556,7 +556,7 @@ void phy_procedures_eNB_TX(PHY_VARS_eNB *eNB,
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_DCI_INFO,(frame*10)+subframe);
if (num_dci > 0)
LOG_D(PHY,"[eNB %"PRIu8"] Frame %d, subframe %d: Calling generate_dci_top (pdcch) (num_dci %"PRIu8") num_pdcch_symbols:%d\n",eNB->Mod_id,frame, subframe, num_dci, num_pdcch_symbols);
LOG_I(PHY,"[eNB %"PRIu8"] Frame %d, subframe %d: Calling generate_dci_top (pdcch) (num_dci %"PRIu8") num_pdcch_symbols:%d\n",eNB->Mod_id,frame, subframe, num_dci, num_pdcch_symbols);
//LOG_D(PHY,"Before generate_dci_top num_pdcch_symbols:%d num_dci:%d dci_alloc:dci_length:%d\n", num_pdcch_symbols, num_dci, eNB->pdcch_vars[subframe&1].dci_alloc[0].dci_length);
......
......@@ -2661,6 +2661,9 @@ void ue_pbch_procedures(uint8_t eNB_id,PHY_VARS_UE *ue,UE_rxtx_proc_t *proc, uin
ue->UE_mode[eNB_id]==NOT_SYNCHED ? 1 : 0);
}
// if this is the first PBCH after initial synchronization, make L1 state = PRACH
if (ue->UE_mode[eNB_id]==NOT_SYNCHED) ue->UE_mode[eNB_id] = PRACH;
if (first_run) {
first_run = 0;
......@@ -2783,6 +2786,7 @@ int ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint
uint8_t next1_thread_id = ue->current_thread_id[subframe_rx]== (RX_NB_TH-1) ? 0:(ue->current_thread_id[subframe_rx]+1);
uint8_t next2_thread_id = next1_thread_id== (RX_NB_TH-1) ? 0:(next1_thread_id+1);
LOG_I(PHY,"DCI Decoding procedure in %d.%d\n",frame_rx,subframe_rx);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_PDCCH_PROCEDURES, VCD_FUNCTION_IN);
#if UE_TIMING_TRACE
start_meas(&ue->dlsch_rx_pdcch_stats);
......@@ -2845,7 +2849,7 @@ int ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint
LOG_D(PHY,"current_thread %d next1_thread %d next2_thread %d \n", ue->current_thread_id[subframe_rx], next1_thread_id, next2_thread_id);
LOG_D(PHY,"[UE %d] AbsSubFrame %d.%d, Mode %s: DCI found %i --> rnti %x / crnti %x : format %d\n",
LOG_I(PHY,"[UE %d] AbsSubFrame %d.%d, Mode %s: DCI found %i --> rnti %x / crnti %x : format %d\n",
ue->Mod_id,frame_rx%1024,subframe_rx,mode_string[ue->UE_mode[eNB_id]],
dci_cnt,
dci_alloc_rx[0].rnti,
......@@ -3765,6 +3769,7 @@ void ue_dlsch_procedures(PHY_VARS_UE *ue,
break;
case SI_PDSCH:
// Panos: Substitute call with call to fill_dlsch_indication()
LOG_D(PHY,"%d.%d: Decoding SI message\n",frame_rx,subframe_rx);
ue_decode_si(ue->Mod_id,
CC_id,
frame_rx,
......
......@@ -114,7 +114,7 @@ void pusch_power_cntl(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uint8_
else if (ue->ulsch[eNB_id]->PHR > 40)
ue->ulsch[eNB_id]->PHR = 40;
LOG_D(PHY,"[UE %d][PUSCH %d] AbsSubframe %d.%d: nb_rb: %d, Po_PUSCH %d dBm : tx power %d, Po_NOMINAL_PUSCH %d,log10(NPRB) %f,PHR %d, PL %d, alpha*PL %f,delta_IF %f,f_pusch %d\n",
LOG_I(PHY,"[UE %d][PUSCH %d] AbsSubframe %d.%d: nb_rb: %d, Po_PUSCH %d dBm : tx power max %d , Po_NOMINAL_PUSCH %d,log10(NPRB) %f,PHR %d, PL %d, alpha*PL %f,delta_IF %f,f_pusch %d\n",
ue->Mod_id,harq_pid,proc->frame_tx,proc->subframe_tx,nb_rb,
ue->ulsch[eNB_id]->Po_PUSCH,
ue->tx_power_max_dBm,
......
......@@ -135,15 +135,16 @@ void do_DL_sig(channel_desc_t *RU2UE[NUMBER_OF_RU_MAX][NUMBER_OF_UE_MAX][MAX_NUM
txdata = RC.ru[ru_id]->common.txdata;
frame_parms = &RC.ru[ru_id]->frame_parms;
sf_offset = (subframe*frame_parms->samples_per_tti) + offset;
LOG_D(SIM,">>>>>>>>>>>>>>>>>TXPATH: RU %d : DL_sig reading TX for subframe %d (sf_offset %d, length %d) from %p\n",ru_id,subframe,sf_offset,length,txdata[0]+sf_offset);
// sf_offset = (subframe*frame_parms->samples_per_tti) + offset;
sf_offset = (subframe*frame_parms->samples_per_tti);
LOG_D(OCM,">>>>>>>>>>>>>>>>>TXPATH: RU %d : DL_sig reading TX for subframe %d (sf_offset %d, length %d) from %p\n",ru_id,subframe,sf_offset,length,txdata[0]+sf_offset);
int length_meas = frame_parms->ofdm_symbol_size;
if (sf_offset+length <= frame_parms->samples_per_tti*10) {
tx_pwr = dac_fixed_gain(s_re,
s_im,
txdata,
sf_offset,
sf_offset+offset,
nb_antennas_tx,
length,
sf_offset,
......@@ -185,7 +186,7 @@ void do_DL_sig(channel_desc_t *RU2UE[NUMBER_OF_RU_MAX][NUMBER_OF_UE_MAX][MAX_NUM
frame_parms->N_RB_DL*12);
}
#ifdef DEBUG_SIM
LOG_D(PHY,"[SIM][DL] subframe %d: txp (time) %d dB\n",
LOG_D(OCM,"[SIM][DL] subframe %d: txp (time) %d dB\n",
subframe,dB_fixed(signal_energy(&txdata[0][sf_offset],length_meas)));
LOG_D(OCM,"[SIM][DL] RU %d (CCid %d): tx_pwr %.1f dBm/RE (target %d dBm/RE), for subframe %d\n",
......
......@@ -2895,7 +2895,7 @@ allocate_CCEs(int module_idP, int CC_idP, int subframeP, int test_onlyP)
// allocate UL DCIs
if (hi_dci0_pdu[i].pdu_type == NFAPI_HI_DCI0_DCI_PDU_TYPE) {
LOG_D(MAC,
LOG_I(MAC,
"Trying to allocate format 0 DCI %d/%d (%d,%d) : rnti %x, aggreg %d nCCE %d / %d (num_pdcch_symbols %d)\n",
idci, DL_req->number_dci + HI_DCI0_req->number_of_dci,
DL_req->number_dci, HI_DCI0_req->number_of_dci,
......@@ -2964,10 +2964,10 @@ allocate_CCEs(int module_idP, int CC_idP, int subframeP, int test_onlyP)
// the allocation is feasible, rnti rule passes
nCCE += hi_dci0_pdu[i].dci_pdu.dci_pdu_rel8.aggregation_level;
LOG_D(MAC, "Allocating at nCCE %d\n", fCCE);
LOG_I(MAC, "Allocating at nCCE %d\n", fCCE);
if (test_onlyP == 0) {
hi_dci0_pdu[i].dci_pdu.dci_pdu_rel8.cce_index = fCCE;
LOG_D(MAC, "Allocate CCEs subframe %d, test %d\n",
LOG_I(MAC, "Allocate CCEs subframe %d, test %d\n",
subframeP, test_onlyP);
}
idci++;
......
......@@ -156,9 +156,9 @@ rx_sdu(const module_id_t enb_mod_idP,
}
if (UE_id != -1) {
LOG_D(MAC,
"[eNB %d][PUSCH %d] CC_id %d Received ULSCH sdu round %d from PHY (rnti %x, UE_id %d) ul_cqi %d\n",
enb_mod_idP, harq_pid, CC_idP,
LOG_I(MAC,
"[eNB %d][PUSCH %d] CC_id %d %d.%d Received ULSCH sdu round %d from PHY (rnti %x, UE_id %d) ul_cqi %d\n",
enb_mod_idP, harq_pid, CC_idP,frameP,subframeP,
UE_list->UE_sched_ctrl[UE_id].round_UL[CC_idP][harq_pid],
current_rnti, UE_id, ul_cqi);
......@@ -190,9 +190,9 @@ rx_sdu(const module_id_t enb_mod_idP,
if (UE_list->UE_template[CC_idP][UE_id].scheduled_ul_bytes < 0)
UE_list->UE_template[CC_idP][UE_id].scheduled_ul_bytes = 0;
} else { // we've got an error
LOG_D(MAC,
"[eNB %d][PUSCH %d] CC_id %d ULSCH in error in round %d, ul_cqi %d\n",
enb_mod_idP, harq_pid, CC_idP,
LOG_I(MAC,
"[eNB %d][PUSCH %d] CC_id %d %d.%d ULSCH in error in round %d, ul_cqi %d\n",
enb_mod_idP, harq_pid, CC_idP,frameP,subframeP,
UE_list->UE_sched_ctrl[UE_id].round_UL[CC_idP][harq_pid],
ul_cqi);
......@@ -1278,7 +1278,7 @@ schedule_ulsch_rnti(module_id_t module_idP,
// this is the normalized RX power and this should be constant (regardless of mcs
normalized_rx_power = UE_sched_ctrl->pusch_snr[CC_id];
target_rx_power = 178;
target_rx_power = 158;
// this assumes accumulated tpc
// make sure that we are only sending a tpc update once a frame, otherwise the control loop will freak out
......@@ -1302,7 +1302,7 @@ schedule_ulsch_rnti(module_id_t module_idP,
}
//tpc = 1;
if (tpc != 1) {
LOG_D(MAC,
LOG_I(MAC,
"[eNB %d] ULSCH scheduler: frame %d, subframe %d, harq_pid %d, tpc %d, accumulated %d, normalized/target rx power %d/%d\n",
module_idP, frameP, subframeP, harq_pid, tpc,
tpc_accumulated, normalized_rx_power,
......@@ -1459,7 +1459,7 @@ schedule_ulsch_rnti(module_id_t module_idP,
CC_id, UE_id, subframeP,
S_UL_SCHEDULED);
//LOG_D(MAC, "[eNB %d] CC_id %d Frame %d, subframeP %d: Generated ULSCH DCI for next UE_id %d, format 0\n", module_idP, CC_id, frameP, subframeP, UE_id);
LOG_I(MAC, "[eNB %d] CC_id %d Frame %d, subframeP %d: Generated ULSCH DCI for next UE_id %d, format 0\n", module_idP, CC_id, frameP, subframeP, UE_id);
LOG_D(MAC,"[PUSCH %d] SFN/SF:%04d%d UL_CFG:SFN/SF:%04d%d CQI:%d for UE %d/%x\n", harq_pid,frameP,subframeP,ul_sched_frame,ul_sched_subframeP,cqi_req,UE_id,rnti);
// increment first rb for next UE allocation
......
......@@ -522,7 +522,7 @@ char openair_rrc_ue_init( const module_id_t ue_mod_idP, const unsigned char eNB_
rrc_set_state (ue_mod_idP, RRC_STATE_INACTIVE);
rrc_set_sub_state (ue_mod_idP, RRC_SUB_STATE_INACTIVE);
LOG_D(RRC,"[UE %d] INIT State = RRC_IDLE (eNB %d)\n",ctxt.module_id,eNB_index);
LOG_I(RRC,"[UE %d] INIT State = RRC_IDLE (eNB %d)\n",ctxt.module_id,eNB_index);
UE_rrc_inst[ctxt.module_id].Info[eNB_index].State=RRC_IDLE;
UE_rrc_inst[ctxt.module_id].Info[eNB_index].T300_active = 0;
UE_rrc_inst[ctxt.module_id].Info[eNB_index].T304_active = 0;
......@@ -3020,7 +3020,7 @@ int decode_BCCH_DLSCH_Message(
char message_string[15000];
size_t message_string_size;
//LOG_I(RRC, "Panos-D: decode_BCCH_DLSCH_Message, Before xer_sprint() \n");
LOG_I(RRC, "Panos-D: decode_BCCH_DLSCH_Message, Before xer_sprint() SI_status %d\n", UE_rrc_inst[ctxt_pP->module_id].Info[eNB_index].SIStatus);
if ((message_string_size = xer_sprint(message_string, sizeof(message_string), &asn_DEF_BCCH_DL_SCH_Message, (void *)bcch_message)) > 0) {
MessageDef *msg_p;
......@@ -3063,7 +3063,7 @@ int decode_BCCH_DLSCH_Message(
&bcch_message->message.choice.c1.choice.systemInformation,
sizeof(SystemInformation_t) );
LOG_D( RRC, "[UE %"PRIu8"] Decoding SI for frameP %"PRIu32"\n",
LOG_I( RRC, "[UE %"PRIu8"] Decoding SI for frameP %"PRIu32"\n",
ctxt_pP->module_id,
ctxt_pP->frame );
//LOG_I( RRC, "Panos-D: decode_BCCH_DLSCH_Message1 BEFORE OTHER decode_SI");
......@@ -3290,6 +3290,7 @@ int decode_SIB1( const protocol_ctxt_t* const ctxt_pP, const uint8_t eNB_index,
#endif
);
LOG_I(RRC,"Setting SIStatus bit 0 to 1\n");
UE_rrc_inst[ctxt_pP->module_id].Info[eNB_index].SIStatus = 1;
UE_rrc_inst[ctxt_pP->module_id].Info[eNB_index].SIB1systemInfoValueTag = sib1->systemInfoValueTag;
......
......@@ -56,7 +56,7 @@ eNBs =
pucch_nRB_CQI = 0;
pucch_nCS_AN = 0;
pucch_n1_AN = 32;
pdsch_referenceSignalPower = -27;
pdsch_referenceSignalPower = -12;
pdsch_p_b = 0;
pusch_n_SB = 1;
pusch_enable64QAM = "DISABLE";
......
......@@ -140,7 +140,7 @@
{"ue-nb-ant-rx", CONFIG_HLP_UENANTR, 0, u8ptr:&nb_antenna_rx, defuintval:1, TYPE_UINT8, 0}, \
{"ue-nb-ant-tx", CONFIG_HLP_UENANTT, 0, u8ptr:&nb_antenna_tx, defuintval:1, TYPE_UINT8, 0}, \
{"ue-scan-carrier", CONFIG_HLP_UESCAN, PARAMFLAG_BOOL, iptr:&UE_scan_carrier, defintval:0, TYPE_INT, 0}, \
{"ue-max-power", NULL, 0, iptr:&(tx_max_power[0]), defintval:90, TYPE_INT, 0}, \
{"ue-max-power", NULL, 0, iptr:&(tx_max_power[0]), defintval:23, TYPE_INT, 0}, \
{"emul-iface", CONFIG_HLP_EMULIFACE, 0, strptr:&emul_iface, defstrval:"lo", TYPE_STRING, 100}, \
{"L2-emul", NULL, 0, u8ptr:&nfapi_mode, defuintval:3, TYPE_UINT8, 0}, \
{"num-ues", NULL, 0, u8ptr:&(NB_UE_INST), defuintval:1, TYPE_UINT8, 0}, \
......@@ -184,7 +184,7 @@
{"q" , CONFIG_HLP_STMON, PARAMFLAG_BOOL, iptr:&opp_enabled, defintval:0, TYPE_INT, 0}, \
{"S" , CONFIG_HLP_MSLOTS, PARAMFLAG_BOOL, u8ptr:&exit_missed_slots, defintval:1, TYPE_UINT8, 0}, \
{"T" , CONFIG_HLP_TDD, PARAMFLAG_BOOL, iptr:&tddflag, defintval:0, TYPE_INT, 0}, \
{"s" , CONFIG_HLP_SNR, PARAMFLAG_BOOL, iptr:&snr_dB, defintval:15, TYPE_INT, 0}, \
{"s" , CONFIG_HLP_SNR, PARAMFLAG_BOOL, iptr:&snr_dB, defintval:25, TYPE_INT, 0}, \
{"numerology" , CONFIG_HLP_NUMEROLOGY, PARAMFLAG_BOOL, iptr:&numerology, defintval:0, TYPE_INT, 0}, \
{"emulate-rf" , CONFIG_HLP_EMULATE_RF, PARAMFLAG_BOOL, iptr:&emulate_rf, defintval:0, TYPE_INT, 0}, \
{"codingw" , CONFIG_HLP_CODINGW, PARAMFLAG_BOOL, iptr:&codingw, defintval:0, TYPE_INT, 0}, \
......
......@@ -974,7 +974,7 @@ int main( int argc, char **argv )
init_UE_stub_single_thread(NB_UE_INST,eMBMS_active,uecap_xer_in,emul_iface);
}
else {
init_UE(1,eMBMS_active,uecap_xer_in,0,phy_test,UE_scan,UE_scan_carrier,mode,(int)rx_gain[0][0],tx_max_power,
init_UE(1,eMBMS_active,uecap_xer_in,0,phy_test,UE_scan,UE_scan_carrier,mode,(int)rx_gain[0][0],tx_max_power[0],
frame_parms[0]->nb_antennas_rx,
frame_parms[0]->nb_antennas_tx);
}
......@@ -1147,7 +1147,10 @@ int main( int argc, char **argv )
}
//p_exmimo_config->framing.tdd_config = TXRXSWITCH_TESTRX;
if (simL1flag==1) init_ocm((double)snr_dB,0);
if (simL1flag==1) {
init_ocm((double)snr_dB,0);
PHY_vars_UE_g[0][0]->no_timing_correction = 1;
}
printf("Sending sync to all threads (%p,%p,%p)\n",&sync_var,&sync_mutex,&sync_cond);
......
......@@ -328,7 +328,6 @@ int UE_trx_read(openair0_device *device, openair0_timestamp *ptimestamp, void **
return(nsamps);
}
extern double ru_amp[NUMBER_OF_RU_MAX];
int ru_trx_write(openair0_device *device,openair0_timestamp timestamp, void **buff, int nsamps, int cc, int flags) {
......@@ -349,7 +348,7 @@ int ru_trx_write(openair0_device *device,openair0_timestamp timestamp, void **bu
}
ru_amp[ru_id] = sqrt(ru_amp[ru_id]);
LOG_D(SIM,"Setting amp for RU %d to %f (%d)\n",ru_id,ru_amp[ru_id], dB_fixed((double)signal_energy((int32_t*)buff[0],frame_parms->ofdm_symbol_size)));
LOG_I(PHY,"Setting amp for RU %d to %f (%d)\n",ru_id,ru_amp[ru_id], dB_fixed((double)signal_energy((int32_t*)buff[0],frame_parms->ofdm_symbol_size)));
// tell top-level we are done
pthread_mutex_lock(&subframe_mutex);
subframe_ru_mask|=(1<<ru_id);
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment