Commit 9a575c71 authored by nikaeinn's avatar nikaeinn

* fix the bugs for the IP connectivity when more than one UE is activated

* add the phy abstraction for eMBMS, and the MCH transport info for distributed simulation
* add supports in PDCP to detect the multicast/broadcast packets
* update the readme files, and the script start_one_eNB_multi_UE_nas



git-svn-id: http://svn.eurecom.fr/openair4G/trunk@5079 818b1a75-f10b-46b9-bf7c-635c3b92a50f
parent 1428b7d9
#!/bin/sh
echo "building ctags for openair1 and openair2 ..."
ctags -e -R --exclude=openair3 --exclude=openair1/DOCS --exclude=openair2/DOCS --exclude=openair2/RRC/CELLULAR --exclude=openair2/NAS/DRIVER/CELLULAR --exclude=openair2/SIMULATION --exclude=openairITS
ctags -e -R --exclude=openair3/ --exclude=openair1/DOCS/ --exclude=openair2/DOCS/ --exclude=openair2/RRC/CELLULAR/ --exclude=openair2/NAS/DRIVER/CELLULAR/ --exclude=openair2/SIMULATION/ --exclude=openairITS/
......@@ -2309,8 +2309,14 @@ u8 generate_dci_top_emul(PHY_VARS_eNB *phy_vars_eNB,
eNB_transport_info[phy_vars_eNB->Mod_id].num_ue_spec_dci = num_ue_spec_dci;
eNB_transport_info[phy_vars_eNB->Mod_id].num_common_dci = num_common_dci;
LOG_D(PHY,"[eNB %d][DCI][EMUL] num spec dci %d num comm dci %d\n", phy_vars_eNB->Mod_id, num_ue_spec_dci,num_common_dci);
n_dci_dl =0;
LOG_D(PHY,"[eNB %d][DCI][EMUL] num spec dci %d num comm dci %d num PMCH %d \n", phy_vars_eNB->Mod_id, num_ue_spec_dci,num_common_dci,
eNB_transport_info[phy_vars_eNB->Mod_id].num_pmch);
if (eNB_transport_info[phy_vars_eNB->Mod_id].cntl.pmch_flag == 1 )
n_dci_dl = eNB_transport_info[phy_vars_eNB->Mod_id].num_pmch;
else
n_dci_dl = 0;
for (n_dci =0 ;
n_dci < (eNB_transport_info[phy_vars_eNB->Mod_id].num_ue_spec_dci+ eNB_transport_info[phy_vars_eNB->Mod_id].num_common_dci);
n_dci++) {
......
......@@ -70,7 +70,8 @@
#define MAX_NUM_RE (14*1200)
#define SI_RNTI 0xffff
#define P_RNTI 0xfffd
#define M_RNTI 0xfffd
#define P_RNTI 0xfffe
#define CBA_RNTI 0xfff4
#define C_RNTI 0x1234
......
......@@ -44,7 +44,7 @@
#include "PHY/CODING/extern.h"
#include "SCHED/extern.h"
#include "SIMULATION/TOOLS/defs.h"
//#define DEBUG_DLSCH_DECODING
#define DEBUG_DLSCH_DECODING
void free_ue_dlsch(LTE_UE_DLSCH_t *dlsch) {
......@@ -660,6 +660,7 @@ uint32_t dlsch_decoding_emul(PHY_VARS_UE *phy_vars_ue,
u16 i;
#endif
// may not be necessaru for PMCH??
for (eNB_id2=0;eNB_id2<NB_eNB_INST;eNB_id2++) {
if (PHY_vars_eNB_g[eNB_id2]->lte_frame_parms.Nid_cell == phy_vars_ue->lte_frame_parms.Nid_cell)
break;
......@@ -750,6 +751,35 @@ uint32_t dlsch_decoding_emul(PHY_VARS_UE *phy_vars_ue,
if (dlsch_ue->harq_processes[harq_pid]->round == 0)
memcpy(dlsch_eNB->harq_processes[harq_pid]->b,dlsch_ue->harq_processes[harq_pid]->b,dlsch_ue->harq_processes[harq_pid]->TBS>>3);
break;
case 5: // PMCH
dlsch_ue = phy_vars_ue->dlsch_ue_MCH[eNB_id];
dlsch_eNB = PHY_vars_eNB_g[eNB_id2]->dlsch_eNB_MCH;
LOG_D(PHY,"decoding pmch emul (size is %d, enb %d %d)\n", dlsch_ue->harq_processes[0]->TBS>>3, eNB_id, eNB_id2);
#ifdef DEBUG_DLSCH_DECODING
for (i=0;i<dlsch_ue->harq_processes[0]->TBS>>3;i++)
LOG_T(PHY,"%x.",dlsch_eNB->harq_processes[0]->b[i]);
LOG_T(PHY,"\n");
#endif
/*
if (dlsch_abstraction_MIESM(phy_vars_ue->sinr_dB, phy_vars_ue->transmission_mode[eNB_id], dlsch_eNB->rb_alloc,
dlsch_eNB->harq_processes[0]->mcs,PHY_vars_eNB_g[eNB_id]->mu_mimo_mode[ue_id].dl_pow_off) == 1) {
*/
if (1) {
// reset HARQ
dlsch_ue->harq_processes[0]->status = SCH_IDLE;
dlsch_ue->harq_processes[0]->round = 0;
memcpy(dlsch_ue->harq_processes[0]->b,
dlsch_eNB->harq_processes[0]->b,
dlsch_ue->harq_processes[0]->TBS>>3);
return(1);
}
else {
// retransmission
return(1+dlsch_ue->max_turbo_iterations);
}
break;
default:
dlsch_ue = phy_vars_ue->dlsch_ue[eNB_id][0];
LOG_E(PHY,"dlsch_decoding_emul: FATAL, unknown DLSCH_id %d\n",dlsch_id);
......
......@@ -143,11 +143,12 @@ int is_pmch_subframe(uint32_t frame, int subframe, LTE_DL_FRAME_PARMS *frame_par
return(0);
}
void fill_eNB_dlsch_MCH(PHY_VARS_eNB *phy_vars_eNB,int mcs,int ndi,int rvidx) {
void fill_eNB_dlsch_MCH(PHY_VARS_eNB *phy_vars_eNB,int mcs,int ndi,int rvidx, int abstraction_flag) {
LTE_eNB_DLSCH_t *dlsch = phy_vars_eNB->dlsch_eNB_MCH;
LTE_DL_FRAME_PARMS *frame_parms=&phy_vars_eNB->lte_frame_parms;
// dlsch->rnti = M_RNTI;
dlsch->harq_processes[0]->mcs = mcs;
// dlsch->harq_processes[0]->Ndi = ndi;
dlsch->harq_processes[0]->rvidx = rvidx;
......@@ -174,6 +175,18 @@ void fill_eNB_dlsch_MCH(PHY_VARS_eNB *phy_vars_eNB,int mcs,int ndi,int rvidx) {
dlsch->rb_alloc[3] = 0xf;
break;
}
if (abstraction_flag){
eNB_transport_info[phy_vars_eNB->Mod_id].cntl.pmch_flag=1;
eNB_transport_info[phy_vars_eNB->Mod_id].num_pmch=1; // assumption: there is always one pmch in each SF
eNB_transport_info[phy_vars_eNB->Mod_id].num_common_dci=0;
eNB_transport_info[phy_vars_eNB->Mod_id].num_ue_spec_dci=0;
eNB_transport_info[phy_vars_eNB->Mod_id].dlsch_type[0]=5;// put at the reserved position for PMCH
eNB_transport_info[phy_vars_eNB->Mod_id].harq_pid[0]=0;
eNB_transport_info[phy_vars_eNB->Mod_id].ue_id[0]=255;//broadcast
eNB_transport_info[phy_vars_eNB->Mod_id].tbs[0]=dlsch->harq_processes[0]->TBS>>3;
}
}
void fill_UE_dlsch_MCH(PHY_VARS_UE *phy_vars_ue,int mcs,int ndi,int rvidx,int eNB_id) {
......@@ -181,6 +194,7 @@ void fill_UE_dlsch_MCH(PHY_VARS_UE *phy_vars_ue,int mcs,int ndi,int rvidx,int eN
LTE_UE_DLSCH_t *dlsch = phy_vars_ue->dlsch_ue_MCH[eNB_id];
LTE_DL_FRAME_PARMS *frame_parms=&phy_vars_ue->lte_frame_parms;
// dlsch->rnti = M_RNTI;
dlsch->harq_processes[0]->mcs = mcs;
dlsch->harq_processes[0]->rvidx = rvidx;
// dlsch->harq_processes[0]->Ndi = ndi;
......@@ -209,10 +223,25 @@ void fill_UE_dlsch_MCH(PHY_VARS_UE *phy_vars_ue,int mcs,int ndi,int rvidx,int eN
}
}
void generate_mch(PHY_VARS_eNB *phy_vars_eNB,int subframe,uint8_t *a) {
void generate_mch(PHY_VARS_eNB *phy_vars_eNB,int subframe,uint8_t *a,int abstraction_flag) {
int G;
if (abstraction_flag != 0) {
if (eNB_transport_info_TB_index[phy_vars_eNB->Mod_id]!=0)
printf("[PHY][EMU] PMCH transport block position is different than zero %d \n", eNB_transport_info_TB_index[phy_vars_eNB->Mod_id]);
memcpy(phy_vars_eNB->dlsch_eNB_MCH->harq_processes[0]->b,
a,
phy_vars_eNB->dlsch_eNB_MCH->harq_processes[0]->TBS>>3);
LOG_D(PHY, "eNB %d dlsch_encoding_emul pmch , tbs is %d \n",
phy_vars_eNB->Mod_id,
phy_vars_eNB->dlsch_eNB_MCH->harq_processes[0]->TBS>>3);
memcpy(&eNB_transport_info[phy_vars_eNB->Mod_id].transport_blocks[eNB_transport_info_TB_index[phy_vars_eNB->Mod_id]],
a,
phy_vars_eNB->dlsch_eNB_MCH->harq_processes[0]->TBS>>3);
eNB_transport_info_TB_index[phy_vars_eNB->Mod_id]+= phy_vars_eNB->dlsch_eNB_MCH->harq_processes[0]->TBS>>3;//=eNB_transport_info[phy_vars_eNB->Mod_id].tbs[0];
}else {
G = get_G(&phy_vars_eNB->lte_frame_parms,
phy_vars_eNB->lte_frame_parms.N_RB_DL,
phy_vars_eNB->dlsch_eNB_MCH->rb_alloc,
......@@ -244,7 +273,9 @@ void generate_mch(PHY_VARS_eNB *phy_vars_eNB,int subframe,uint8_t *a) {
subframe,
&phy_vars_eNB->lte_frame_parms,
phy_vars_eNB->dlsch_eNB_MCH);
}
}
}
void mch_extract_rbs(int **rxdataF,
int **dl_ch_estimates,
......@@ -801,5 +832,3 @@ int rx_pmch(PHY_VARS_UE *phy_vars_ue,
return(0);
}
......@@ -222,14 +222,20 @@ int mch_modulation(mod_sym_t **txdataF,
@param phy_vars_eNB Pointer to eNB variables
@param subframe Subframe for PMCH
@param a Pointer to transport block
@param abstraction_flag
*/
void generate_mch(PHY_VARS_eNB *phy_vars_eNB,int subframe,uint8_t *a);
void generate_mch(PHY_VARS_eNB *phy_vars_eNB,int subframe,uint8_t *a,int abstraction_flag);
/** \brief This function generates the frequency-domain pilots (cell-specific downlink reference signals)
@param phy_vars_eNB Pointer to eNB variables
@param mcs MCS for MBSFN
@param ndi new data indicator
@param rdvix
@param abstraction_flag
*/
void fill_eNB_dlsch_MCH(PHY_VARS_eNB *phy_vars_eNB,int mcs,int ndi,int rvidx);
void fill_eNB_dlsch_MCH(PHY_VARS_eNB *phy_vars_eNB,int mcs,int ndi,int rvidx,int abstraction_flag);
/** \brief This function generates the frequency-domain pilots (cell-specific downlink reference signals)
@param phy_vars_ue Pointer to UE variables
......
......@@ -1070,15 +1070,18 @@ void phy_procedures_eNB_TX(unsigned char next_slot,PHY_VARS_eNB *phy_vars_eNB,u8
#endif
}
}
}
if (is_pmch_subframe(phy_vars_eNB->frame,next_slot>>1,&phy_vars_eNB->lte_frame_parms)) {
if (abstraction_flag==0){
if ((next_slot%2) == 0) {
// This is DL-Cell spec pilots in Control region
generate_pilots_slot(phy_vars_eNB,
phy_vars_eNB->lte_eNB_common_vars.txdataF[sect_id],
AMP,
next_slot,1);
}
}
#ifdef Rel10
// if mcch is active, send regardless of the node type: eNB or RN
// when mcch is active, MAC sched does not allow MCCH and MTCH multiplexing
......@@ -1129,9 +1132,9 @@ void phy_procedures_eNB_TX(unsigned char next_slot,PHY_VARS_eNB *phy_vars_eNB,u8
}// switch
if (mch_pduP){
fill_eNB_dlsch_MCH(phy_vars_eNB,mch_pduP->mcs,1,0);
fill_eNB_dlsch_MCH(phy_vars_eNB,mch_pduP->mcs,1,0, abstraction_flag);
// Generate PMCH
generate_mch(phy_vars_eNB,next_slot>>1,(uint8_t*)mch_pduP->payload);
generate_mch(phy_vars_eNB,next_slot>>1,(uint8_t*)mch_pduP->payload,abstraction_flag);
#ifdef DEBUG_PHY
for (i=0;i<mch_pduP->Pdu_size;i++)
msg("%2x.",(uint8_t)mch_pduP->payload[i]);
......@@ -1142,9 +1145,11 @@ void phy_procedures_eNB_TX(unsigned char next_slot,PHY_VARS_eNB *phy_vars_eNB,u8
}
#endif
}
}
else {
vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_RS_TX,1);
if (abstraction_flag==0){
generate_pilots_slot(phy_vars_eNB,
phy_vars_eNB->lte_eNB_common_vars.txdataF[sect_id],
AMP,
......@@ -1153,6 +1158,7 @@ void phy_procedures_eNB_TX(unsigned char next_slot,PHY_VARS_eNB *phy_vars_eNB,u8
phy_vars_eNB->lte_eNB_common_vars.txdataF[sect_id],
AMP,
next_slot+1,0);
vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_RS_TX,0);
if (next_slot == 0) {
......@@ -1172,6 +1178,7 @@ void phy_procedures_eNB_TX(unsigned char next_slot,PHY_VARS_eNB *phy_vars_eNB,u8
}
}
}
}
if (next_slot == 0) {
if ((phy_vars_eNB->frame&3) == 0) {
......@@ -1332,7 +1339,7 @@ void phy_procedures_eNB_TX(unsigned char next_slot,PHY_VARS_eNB *phy_vars_eNB,u8
}
}
}
}
//return;
......
......@@ -3005,8 +3005,8 @@ int lte_ue_pdcch_procedures(u8 eNB_id,u8 last_slot, PHY_VARS_UE *phy_vars_ue,u8
LOG_I(PHY,"Throughput %5.1f kbps\n",(float) phy_vars_ue->bitrate[eNB_id]/1000.0);
}
}
if (is_pmch_subframe(((last_slot>>1)==9?-1:0)+phy_vars_ue->frame,last_slot>>1,&phy_vars_ue->lte_frame_parms)) {
LOG_I(PHY,"ue calling pmch subframe ..\n ");
if ((last_slot%2)==1) {
LOG_D(PHY,"[UE %d] Frame %d, subframe %d: Querying for PMCH demodulation(%d)\n",
......@@ -3022,7 +3022,7 @@ int lte_ue_pdcch_procedures(u8 eNB_id,u8 last_slot, PHY_VARS_UE *phy_vars_ue,u8
if (pmch_mcs>=0) {
LOG_D(PHY,"[UE %d] Frame %d, subframe %d: Programming PMCH demodulation for mcs %d\n",phy_vars_ue->Mod_id,((last_slot>>1)==9?-1:0)+phy_vars_ue->frame,last_slot>>1,pmch_mcs);
fill_UE_dlsch_MCH(phy_vars_ue,pmch_mcs,1,0,0);
if (abstraction_flag == 0 ) {
for (l=2;l<12;l++) {
slot_fep_mbsfn(phy_vars_ue,
......@@ -3063,6 +3063,13 @@ int lte_ue_pdcch_procedures(u8 eNB_id,u8 last_slot, PHY_VARS_UE *phy_vars_ue,u8
last_slot>>1,
0,
0,0);
}
else { // abstraction
ret = dlsch_decoding_emul(phy_vars_ue,
(((last_slot>>1)==0) ? 9 : ((last_slot>>1)-1)),
5, // PMCH
eNB_id);
}
if (mcch_active == 1)
phy_vars_ue->dlsch_mcch_trials[sync_area][0]++;
else
......
......@@ -259,7 +259,8 @@ int emu_transport_handle_ue_info(bypass_msg_header_t *messg,
for (n_ue = oai_emulation.info.master[messg->master_id].first_ue;
n_ue < oai_emulation.info.master[messg->master_id].first_ue +
oai_emulation.info.master[messg->master_id].nb_ue; n_ue ++) {
oai_emulation.info.master[messg->master_id].nb_ue;
n_ue ++) {
fill_phy_ue_vars(n_ue, last_slot);
}
} else {
......@@ -566,7 +567,8 @@ void bypass_tx_data(emu_transport_info_t Type, unsigned int frame, unsigned int
n_enb<(oai_emulation.info.first_enb_local+oai_emulation.info.nb_enb_local);
n_enb++) {
total_tbs=0;
for (n_dci = 0; n_dci < (eNB_transport_info[n_enb].num_ue_spec_dci +
for (n_dci = 0; n_dci < (eNB_transport_info[n_enb].num_pmch +
eNB_transport_info[n_enb].num_ue_spec_dci +
eNB_transport_info[n_enb].num_common_dci);
n_dci++) {
total_tbs +=eNB_transport_info[n_enb].tbs[n_dci];
......
......@@ -51,6 +51,7 @@ typedef unsigned int (*rx_handler_t) (unsigned char, char*, unsigned int);
typedef struct {
u32 pbch_flag:1;
u32 pmch_flag:1;
u32 pss:2;
u32 sss:8;
u32 cfi:2;
......@@ -77,10 +78,12 @@ typedef struct {
} UE_cntl;
#define MAX_TRANSPORT_BLOCKS_BUFFER_SIZE 16384
#define MAX_NUM_DCI 5
//#define MAX_PMCH_TRANSPORT_BLOCKS_BUFFER_SIZE 8192 // 16384
#define MAX_NUM_DCI 5+1 // +1: for PMCH/MCH
typedef struct {
eNB_cntl cntl;
u8 num_pmch;
u8 num_common_dci;
u8 num_ue_spec_dci;
DCI_ALLOC_t dci_alloc[MAX_NUM_DCI];
......@@ -89,6 +92,7 @@ typedef struct {
u8 ue_id[MAX_NUM_DCI];
u16 tbs[MAX_NUM_DCI*2]; // times 2 for dual-stream MIMO formats
u8 transport_blocks[MAX_TRANSPORT_BLOCKS_BUFFER_SIZE];
//u8 pmch_transport_blocks[MAX_PMCH_TRANSPORT_BLOCKS_BUFFER_SIZE];
} __attribute__((__packed__)) eNB_transport_info_t ;
typedef struct {
......
......@@ -269,8 +269,10 @@ void fill_phy_enb_vars(unsigned int enb_id, unsigned int next_slot)
// to be added later
//DCI
nb_total_dci= eNB_transport_info[enb_id].num_ue_spec_dci+
nb_total_dci= eNB_transport_info[enb_id].num_pmch +
eNB_transport_info[enb_id].num_ue_spec_dci +
eNB_transport_info[enb_id].num_common_dci;
PHY_vars_eNB_g[enb_id]->num_ue_spec_dci[(next_slot>>1)&1] =
eNB_transport_info[enb_id].num_ue_spec_dci;
PHY_vars_eNB_g[enb_id]->num_common_dci[(next_slot>>1)&1] =
......@@ -287,11 +289,12 @@ void fill_phy_enb_vars(unsigned int enb_id, unsigned int next_slot)
for (n_dci = 0; n_dci < nb_total_dci; n_dci++) {
//exclude ul dci
if (eNB_transport_info[enb_id].dci_alloc[n_dci_dl].format > 0) {
if ((eNB_transport_info[enb_id].dci_alloc[n_dci_dl].format > 0) || (eNB_transport_info[enb_id].num_pmch > 0 )) {
#ifdef DEBUG_EMU
LOG_D(EMU, "dci spec %d common %d tbs is %d payload offset %d\n",
LOG_D(EMU, "dci spec %d common %d pmch %d tbs is %d payload offset %d\n",
eNB_transport_info[enb_id].num_ue_spec_dci,
eNB_transport_info[enb_id].num_common_dci,
eNB_transport_info[enb_id].num_pmch,
eNB_transport_info[enb_id].tbs[n_dci_dl],
payload_offset);
#endif
......@@ -346,6 +349,19 @@ void fill_phy_enb_vars(unsigned int enb_id, unsigned int next_slot)
eNB_transport_info[enb_id].tbs[n_dci_dl]);
break;
case 5:
memcpy(PHY_vars_eNB_g[enb_id]->dlsch_eNB_MCH->harq_processes[0]->b,
&eNB_transport_info[enb_id].transport_blocks[payload_offset],
eNB_transport_info[enb_id].tbs[n_dci_dl]);
#ifdef DEBUG_EMU
LOG_D(EMU, "PMCH eNB_transport_info[enb_id].tbs[n_dci_dl] %d \n",
eNB_transport_info[enb_id].tbs[n_dci_dl]);
#endif
break;
default:
LOG_W(EMU,"not supported dlsch type %d \n", eNB_transport_info[enb_id].dlsch_type[n_dci_dl]);
break;
}
payload_offset += eNB_transport_info[enb_id].tbs[n_dci_dl];
}
......@@ -385,11 +401,10 @@ void fill_phy_ue_vars(unsigned int ue_id, unsigned int last_slot)
UE_transport_info[ue_id].cntl.sr,
ue_cntl_delay[ue_id][last_slot%2].sr,
UE_transport_info[ue_id].cntl.pucch_sel,
ue_cntl_delay[ue_id][last_slot%2].pucch_sel );
ue_cntl_delay[ue_id][last_slot%2].pucch_sel);
#endif
//ue_cntl_delay[subframe%2].prach_flag ;
PHY_vars_UE_g[ue_id]->generate_prach =
ue_cntl_delay[ue_id][last_slot%2].prach_flag;//UE_transport_info[ue_id].cntl.prach_flag;
PHY_vars_UE_g[ue_id]->generate_prach = ue_cntl_delay[ue_id][last_slot%2].prach_flag;//UE_transport_info[ue_id].cntl.prach_flag;
if (PHY_vars_UE_g[ue_id]->generate_prach == 1) {
// if (PHY_vars_UE_g[ue_id]->prach_resources[enb_id] == NULL)
// PHY_vars_UE_g[ue_id]->prach_resources[enb_id] = malloc(sizeof(PRACH_RESOURCES_t));
......@@ -398,8 +413,7 @@ void fill_phy_ue_vars(unsigned int ue_id, unsigned int last_slot)
ue_cntl_delay[ue_id][last_slot%2].prach_id;
}
pucch_format=
ue_cntl_delay[ue_id][last_slot%2].pucch_flag;// UE_transport_info[ue_id].cntl.pucch_flag;
pucch_format= ue_cntl_delay[ue_id][last_slot%2].pucch_flag;// UE_transport_info[ue_id].cntl.pucch_flag;
if ((last_slot + 1) % 2 == 0) {
if (pucch_format == pucch_format1) { // UE_transport_info[ue_id].cntl.sr;
PHY_vars_UE_g[ue_id]->sr[subframe] = ue_cntl_delay[ue_id][last_slot%2].sr;
......
......@@ -555,9 +555,10 @@ typedef struct {
u8 RA_dci_fmt2;
/// Flag to indicate the eNB should generate RAR. This is triggered by detection of PRACH
u8 generate_rar;
/// Subframe where preamble was received
u8 preamble_subframe;
/// Subframe where Msg3 is to be sent
u8 Msg3_subframe;
u8 preamble_subframe;
/// Flag to indicate the eNB should generate Msg4 upon reception of SDU from RRC. This is triggered by first ULSCH reception at eNB for new user.
u8 generate_Msg4;
/// Flag to indicate the eNB should generate the DCI for Msg4, after getting the SDU from RRC.
......
......@@ -1160,7 +1160,7 @@ int schedule_MBMS(unsigned char Mod_id,u32 frame, u8 subframe) {
ii = eNB_mac_inst[Mod_id].mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & (0x80>>msi_pos);
msi_pos++;
}
//LOG_D(MAC,"[eNB %d] Frame %d subframe %d : sync area %d sf allocation pattern %d sf alloc %x msi pos is %d \n", Mod_id,frame, subframe,i,j,eNB_mac_inst[Mod_id].mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0], msi_pos);
LOG_D(MAC,"[eNB %d] Frame %d subframe %d : sync area %d sf allocation pattern %d sf alloc %x msi pos is %d \n", Mod_id,frame, subframe,i,j,eNB_mac_inst[Mod_id].mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0], msi_pos);
}
// Check if the subframe is for MSI, MCCH or MTCHs and Set the correspoding flag to 1
......
......@@ -560,7 +560,7 @@ int ue_query_mch(uint8_t Mod_id, uint32_t frame, uint32_t subframe, uint8_t eNB_
mch_scheduling_period = 8<<(UE_mac_inst[Mod_id].pmch_Config[0]->mch_SchedulingPeriod_r9);
for (i=0;
i< eNB_mac_inst[Mod_id].num_active_mbsfn_area;
i< UE_mac_inst[Mod_id].num_active_mbsfn_area;
i++ ){
// assume, that there is always a mapping
if ((j=ue_get_mbsfn_sf_alloction(Mod_id,i,eNB_index)) == -1)
......@@ -570,9 +570,10 @@ int ue_query_mch(uint8_t Mod_id, uint32_t frame, uint32_t subframe, uint8_t eNB_
mbsfn_period = 1<<(UE_mac_inst[Mod_id].mbsfn_SubframeConfig[0]->radioframeAllocationPeriod);
mcch_period = 32<<(UE_mac_inst[Mod_id].mbsfn_AreaInfo[0]->mcch_Config_r9.mcch_RepetitionPeriod_r9);
LOG_D(MAC,"[UE %d] Frame %d subframe %d: Checking MBSFN Sync Area %d/%d with SF allocation %d/%d for MCCH and MTCH (mbsfn period %d, mcch period %d)\n",
LOG_D(MAC,"[UE %d] Frame %d subframe %d: Checking MBSFN Sync Area %d/%d with SF allocation %d/%d for MCCH and MTCH (mbsfn period %d, mcch period %d,mac sched period (%d,%d))\n",
Mod_id,frame, subframe,i,UE_mac_inst[Mod_id].num_active_mbsfn_area,
j,UE_mac_inst[Mod_id].num_sf_allocation_pattern,mbsfn_period,mcch_period);
j,UE_mac_inst[Mod_id].num_sf_allocation_pattern,mbsfn_period,mcch_period,
mch_scheduling_period,UE_mac_inst[Mod_id].mbsfn_SubframeConfig[j]->radioframeAllocationOffset);
// get the real MCS value
switch (UE_mac_inst[Mod_id].mbsfn_AreaInfo[i]->mcch_Config_r9.signallingMCS_r9) {
......
......@@ -334,12 +334,12 @@ BOOL pdcp_data_ind(u8 eNB_id, u8 UE_id, u32_t frame, u8_t eNB_flag, u8_t MBMS_fl
"and radio bearer ID %d rlc sdu size %d eNB_flag %d\n",
UE_id, eNB_id, rb_id, sdu_buffer_size, eNB_flag);
} else {
pdcp = &pdcp_array_eNB[UE_id][eNB_id][rb_id];
pdcp = &pdcp_array_eNB[eNB_id][UE_id][rb_id];
module_id = eNB_id;
LOG_I(PDCP, "Data indication notification for PDCP entity from eNB %u to UE %u "
"and radio bearer ID %d rlc sdu size %d eNB_flag %d\n",
eNB_id, UE_id, rb_id, sdu_buffer_size, eNB_flag);
"and radio bearer ID %d rlc sdu size %d eNB_flag %d eNB_id %d\n",
eNB_id, UE_id, rb_id, sdu_buffer_size, eNB_flag, eNB_id);
}
sdu_list = &pdcp_sdu_list;
#endif
......@@ -466,14 +466,14 @@ BOOL pdcp_data_ind(u8 eNB_id, u8 UE_id, u32_t frame, u8_t eNB_flag, u8_t MBMS_fl
((pdcp_data_ind_header_t *) new_sdu->data)->rb_id = rb_id;
} else {
/* RB id for an UE on eNB is instantiated */
((pdcp_data_ind_header_t *) new_sdu->data)->rb_id = rb_id + (UE_id * NB_RAB_MAX);
((pdcp_data_ind_header_t *) new_sdu->data)->rb_id = rb_id + (UE_id * NB_RB_MAX);
}
((pdcp_data_ind_header_t *) new_sdu->data)->data_size = sdu_buffer_size - payload_offset;
// Here there is no virtualization possible
#ifdef IDROMEL_NEMO
if (eNB_flag == 0)
((pdcp_data_ind_header_t *) new_sdu->data)->inst = rb_id / NB_RAB_MAX;
((pdcp_data_ind_header_t *) new_sdu->data)->inst = rb_id / NB_RB_MAX;
else
((pdcp_data_ind_header_t *) new_sdu->data)->inst = 0;
#else
......
......@@ -407,7 +407,7 @@ int pdcp_fifo_read_input_sdus (u32_t frame, u8_t eNB_flag, u8_t UE_index, u8_t e
# if defined(ENABLE_PDCP_NETLINK_FIFO)
rb_id_t rab_id;
pdcp_t *pdcp;
u8 pdcp_mode = 0;
struct pdcp_netlink_element_s *data = NULL;
while (pdcp_netlink_dequeue_element(eNB_flag, UE_index, eNB_index, &data) != 0) {
......@@ -416,17 +416,33 @@ int pdcp_fifo_read_input_sdus (u32_t frame, u8_t eNB_flag, u8_t UE_index, u8_t e
rab_id = data->pdcp_read_header.rb_id;
pdcp = &pdcp_array_ue[UE_index][rab_id];
} else {
rab_id = data->pdcp_read_header.rb_id % NB_RAB_MAX;
UE_index = data->pdcp_read_header.rb_id / NB_RAB_MAX;
rab_id = data->pdcp_read_header.rb_id % NB_RB_MAX;
UE_index = data->pdcp_read_header.rb_id / NB_RB_MAX;
pdcp = &pdcp_array_eNB[eNB_index][UE_index][rab_id];
}
if (data->pdcp_read_header.rb_id != 0) {
if (pdcp->instanciated_instance) {
LOG_D(PDCP, "[FRAME %05d][IP][MOD %02d][][--- PDCP_DATA_REQ "
"/ %d Bytes --->][PDCP][MOD %02d][RB %02d]\n",
frame, data->pdcp_read_header.inst, data->pdcp_read_header.data_size,
data->pdcp_read_header.inst, data->pdcp_read_header.rb_id);
#ifdef OAI_NW_DRIVER_TYPE_ETHERNET
if ((data->pdcp_read_header.traffic_type == 2) /*OAI_NW_DRV_IPV6_ADDR_TYPE_MULTICAST */ ||
(data->pdcp_read_header.traffic_type == 6) /*OAI_NW_DRV_IPV4_ADDR_TYPE_MULTICAST */ ||
(data->pdcp_read_header.traffic_type == 7) /*OAI_NW_DRV_IPV4_ADDR_TYPE_BROADCAST */ )
pdcp_mode = PDCP_TM;
else if ((data->pdcp_read_header.traffic_type == 1) /* OAI_NW_DRV_IPV6_ADDR_TYPE_UNICAST */ ||
(data->pdcp_read_header.traffic_type == 5) /*OAI_NW_DRV_IPV4_ADDR_TYPE_UNICAST*/ )
pdcp_mode= PDCP_DATA_PDU;
else {
pdcp_mode= PDCP_DATA_PDU;
LOG_W(PDCP,"unknown IP traffic type \n");
}
#else // NASMESH driver does not curreenlty support multicast traffic
pdcp_mode = PDCP_DATA_PDU;
#endif
pdcp_data_req(eNB_index,
UE_index,
frame,
......@@ -436,12 +452,12 @@ int pdcp_fifo_read_input_sdus (u32_t frame, u8_t eNB_flag, u8_t UE_index, u8_t e
RLC_SDU_CONFIRM_NO,
data->pdcp_read_header.data_size,
data->data,
PDCP_DATA_PDU);
pdcp_mode);
} else {
LOG_E(PDCP, "Received packet for non-instanciated instance %u with rb_id %u, UE_index %d, eNB_flag %d\n",
data->pdcp_read_header.inst, data->pdcp_read_header.rb_id, UE_index, eNB_flag);
LOG_E(PDCP, "Received packet for non-instanciated instance %u with rb_id %u, UE_index %d, eNB_flag %d eNB_index %d\n",
data->pdcp_read_header.inst, data->pdcp_read_header.rb_id, UE_index, eNB_flag,eNB_index);
}
} else if (eNB_flag) {
} else if (eNB_flag) { // eNB
/* rb_id = 0, thus interpreated as broadcast and transported as
* multiple unicast is a broadcast packet, we have to send this
* packet on all default RABS of all connected UEs
......@@ -536,9 +552,7 @@ int pdcp_fifo_read_input_sdus (u32_t frame, u8_t eNB_flag, u8_t UE_index, u8_t e
frame, pdcp_read_header.inst, pdcp_read_header.data_size, pdcp_read_header.inst, pdcp_read_header.rb_id);
#endif
pdcp_data_req(pdcp_read_header.inst,
frame,
eNB_flag,
pdcp_data_req(eNB_index,UE_index,frame, eNB_flag,
pdcp_read_header.rb_id,
RLC_MUI_UNDEFINED,
RLC_SDU_CONFIRM_NO,
......@@ -554,7 +568,8 @@ int pdcp_fifo_read_input_sdus (u32_t frame, u8_t eNB_flag, u8_t UE_index, u8_t e
#warning CODE TO BE REVIEWED, ONLY WORK FOR SIMPLE TOPOLOGY CASES
for (rab_id = DEFAULT_RAB_ID; rab_id < MAX_RB; rab_id = rab_id + NB_RB_MAX) {
if (pdcp_array[pdcp_input_header.inst][rab_id%NB_RB_MAX].instanciated_instance == (pdcp_input_header.inst + 1)) {
pdcp_data_req (pdcp_read_header.inst, frame, eNB_flag, rab_id, RLC_MUI_UNDEFINED,RLC_SDU_CONFIRM_NO,
pdcp_data_req (eNB_index,UE_index,frame, eNB_flag,
rab_id, RLC_MUI_UNDEFINED,RLC_SDU_CONFIRM_NO,
pdcp_read_header.data_size,
(unsigned char *)NLMSG_DATA(nas_nlh_rx),
PDCP_DATA_PDU);
......@@ -562,7 +577,8 @@ int pdcp_fifo_read_input_sdus (u32_t frame, u8_t eNB_flag, u8_t UE_index, u8_t e
}
} else {
LOG_D(PDCP, "Forcing send on DEFAULT_RAB_ID\n");
pdcp_data_req (pdcp_read_header.inst,
pdcp_data_req (eNB_index,
UE_index,
frame, eNB_flag,
DEFAULT_RAB_ID,
RLC_MUI_UNDEFINED,
......@@ -570,6 +586,7 @@ int pdcp_fifo_read_input_sdus (u32_t frame, u8_t eNB_flag, u8_t UE_index, u8_t e
pdcp_read_header.data_size,
(unsigned char *)NLMSG_DATA(nas_nlh_rx),
PDCP_DATA_PDU);
}
}
}
......@@ -589,7 +606,7 @@ void pdcp_fifo_read_input_sdus_from_otg (u32_t frame, u8_t eNB_flag, u8 UE_index
int dst_id, rb_id; // dst for otg
int pkt_size=0, pkt_cnt=0;
u8 pdcp_mode, is_ue=0;
Packet_otg_elt * otg_pkt_info;
Packet_otg_elt * otg_pkt_info=NULL;
int result;
src_id = eNB_index;
......@@ -599,7 +616,7 @@ void pdcp_fifo_read_input_sdus_from_otg (u32_t frame, u8_t eNB_flag, u8 UE_index
if (oai_emulation.info.otg_enabled ==1 ){
module_id = (eNB_flag == 1) ? eNB_index : NB_eNB_INST + UE_index ;
//rb_id = (eNB_flag == 1) ? eNB_index * MAX_NUM_RB + DTCH : (NB_eNB_INST + UE_index -1 ) * MAX_NUM_RB + DTCH ;
src_id = module_id;
while ((otg_pkt_info = pkt_list_remove_head(&(otg_pdcp_buffer[module_id]))) != NULL) {
LOG_I(OTG,"Mod_id %d Frame %d Got a packet (%p), HEAD of otg_pdcp_buffer[%d] is %p and Nb elements is %d\n",
module_id,frame, otg_pkt_info, module_id, pkt_list_get_head(&(otg_pdcp_buffer[module_id])), otg_pdcp_buffer[module_id].nb_elements);
......@@ -631,6 +648,7 @@ void pdcp_fifo_read_input_sdus_from_otg (u32_t frame, u8_t eNB_flag, u8 UE_index
AssertFatal (result == TRUE, "PDCP data request failed!\n");
}
free(otg_pkt);
otg_pkt = NULL;
}
// } //else LOG_D(OTG,"frame %d enb %d-> ue %d link not yet established state %d \n", frame, eNB_index,dst_id - NB_eNB_INST, mac_get_rrc_status(module_id, eNB_flag, dst_id - NB_eNB_INST));
......
......@@ -471,8 +471,11 @@ s8 mac_rrc_lite_data_ind(u8 Mod_id, u32 frame, u16 Srb_id, u8 *Sdu, u16 sdu_size
}
#else
// msg("\n******INST %d Srb_info %p, Srb_id=%d****\n\n",Mod_id,Srb_info,Srb_info->Srb_id);
memcpy(Srb_info->Rx_buffer.Payload,Sdu,6);
if (sdu_size > 0) {
memcpy(Srb_info->Rx_buffer.Payload,Sdu,sdu_size);
Srb_info->Rx_buffer.payload_size = sdu_size;
rrc_eNB_decode_ccch(Mod_id,frame,Srb_info);
}
#endif
}
......
......@@ -232,7 +232,7 @@ void openair_rrc_top_init(int eMBMS_active, u8 cba_group_active,u8 HO_active){
0);*/
#ifdef Rel10
LOG_I(RRC,"[UE] eMBMS active state is %d \n", eMBMS_active);
for (i=0;i<NB_eNB_INST;i++) {
for (i=0;i<NB_UE_INST;i++) {
UE_rrc_inst[i].MBMS_flag = (uint8_t)eMBMS_active;
}
#endif
......
......@@ -693,6 +693,7 @@ The following diagram is based on graphviz (http://www.graphviz.org/), you need
unsigned int n_frames;
unsigned int n_frames_flag; // if set, then let the emulation goes to infinity
unsigned char frame_type;
char * frame_type_name;
unsigned char tdd_config;
unsigned char tdd_config_S;
unsigned char extended_prefix_flag;
......
......@@ -73,6 +73,8 @@ static int wall_penetration_loss_dB_;
static int system_bandwidth_MB_;
static int system_frequency_GHz_;
static int transmission_mode_;
static int frame_type_;
static int tdd_config_;
static int antenna_;
static int eNB_antenna_;
static int UE_antenna_;
......@@ -263,6 +265,10 @@ void start_element(void *user_data, const xmlChar *name, const xmlChar **attrs)
system_frequency_GHz_ = 1;
} else if (!xmlStrcmp(name,(unsigned char*) "TRANSMISSION_MODE")) {
transmission_mode_ = 1;
} else if (!xmlStrcmp(name,(unsigned char*) "FRAME_TYPE")) {
frame_type_ = 1;
} else if (!xmlStrcmp(name,(unsigned char*) "TDD_CONFIG")) {
tdd_config_ = 1;
} else if (!xmlStrcmp(name,(unsigned char*) "ANTENNA")) {
antenna_ = 1;
} else if (!xmlStrcmp(name,(unsigned char*) "eNB_ANTENNA")) {
......@@ -589,6 +595,10 @@ void end_element(void *user_data, const xmlChar *name) { // called once at the e
system_frequency_GHz_ = 0;
} else if (!xmlStrcmp(name,(unsigned char*) "TRANSMISSION_MODE")) {
transmission_mode_ = 0;
} else if (!xmlStrcmp(name,(unsigned char*) "FRAME_TYPE")) {
frame_type_ = 0;
} else if (!xmlStrcmp(name,(unsigned char*) "TDD_CONFIG")) {
tdd_config_ = 0;
} else if (!xmlStrcmp(name,(unsigned char*) "ANTENNA")) {
antenna_ = 0;
} else if (!xmlStrcmp(name,(unsigned char*) "eNB_ANTENNA")) {
......@@ -903,6 +913,10 @@ void characters(void *user_data, const xmlChar *xmlch, int xmllen) { // called o
oai_emulation.environment_system_config.system_frequency_GHz = atof(ch);
} else if (transmission_mode_) {
oai_emulation.info.transmission_mode = atof(ch);
} else if (frame_type_) {
oai_emulation.info.frame_type_name = strndup(ch, len);
} else if (tdd_config_) {
oai_emulation.info.tdd_config = atof(ch);
} else if (antenna_) {
if (eNB_antenna_) {
if (number_of_sectors_) {
......
......@@ -15,6 +15,8 @@ First, you must have all four openair SW directories, openair1, openair2, openai
1. The following packages must be available on your system:
- libblas and libblas-dev