Commit beb30f1e authored by HOAI SON DANG's avatar HOAI SON DANG

Merge branch 'nr_fix_pucch_dmrs' into develop-nr

Signed-off-by: HOAI SON DANG's avatarHOAI SON DANG <sondh8@viettel.com.vn>
parents 4255f4e4 b4d7c62d
......@@ -212,7 +212,7 @@ pipeline {
steps {
gitlabCommitStatus(name: "Build eNb-ethernet") {
timeout (time: 20, unit: 'MINUTES') {
sh "./ci-scripts/oai-ci-vm-tool wait --workspace $WORKSPACE --variant enb-ethernet --job-name ${JOB_NAME} --build-id ${BUILD_ID} --keep-vm-alive"
sh "./ci-scripts/oai-ci-vm-tool wait --workspace $WORKSPACE --variant enb-ethernet --job-name ${JOB_NAME} --build-id ${BUILD_ID}"
}
}
}
......@@ -221,7 +221,7 @@ pipeline {
steps {
gitlabCommitStatus(name: "Build UE-ethernet") {
timeout (time: 20, unit: 'MINUTES') {
sh "./ci-scripts/oai-ci-vm-tool wait --workspace $WORKSPACE --variant ue-ethernet --job-name ${JOB_NAME} --build-id ${BUILD_ID} --keep-vm-alive"
sh "./ci-scripts/oai-ci-vm-tool wait --workspace $WORKSPACE --variant ue-ethernet --job-name ${JOB_NAME} --build-id ${BUILD_ID}"
}
}
}
......
......@@ -197,8 +197,8 @@ MACRLCs = (
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
phy_test_mode = 0;
puSch10xSnr = 200;
puCch10xSnr = 200;
puSch10xSnr = 160;
puCch10xSnr = 160;
}
);
......@@ -227,7 +227,7 @@ RUs = (
THREAD_STRUCT = (
{
#three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
parallel_config = "PARALLEL_RU_L1_TRX_SPLIT";
parallel_config = "PARALLEL_SINGLE_THREAD";
#two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
worker_config = "WORKER_ENABLE";
}
......
......@@ -197,8 +197,8 @@ MACRLCs = (
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
phy_test_mode = 0;
puSch10xSnr = 200;
puCch10xSnr = 200;
puSch10xSnr = 160;
puCch10xSnr = 160;
}
);
......@@ -218,7 +218,7 @@ RUs = (
att_rx = 0;
bands = [7];
max_pdschReferenceSignalPower = -27;
max_rxgain = 115;
max_rxgain = 125;
eNB_instances = [0];
}
......@@ -227,7 +227,7 @@ RUs = (
THREAD_STRUCT = (
{
#three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
parallel_config = "PARALLEL_RU_L1_TRX_SPLIT";
parallel_config = "PARALLEL_SINGLE_THREAD";
#two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
worker_config = "WORKER_ENABLE";
}
......
......@@ -197,8 +197,8 @@ MACRLCs = (
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
phy_test_mode = 0;
puSch10xSnr = 200;
puCch10xSnr = 200;
puSch10xSnr = 160;
puCch10xSnr = 160;
}
);
......@@ -218,7 +218,7 @@ RUs = (
att_rx = 0;
bands = [7];
max_pdschReferenceSignalPower = -27;
max_rxgain = 115;
max_rxgain = 120;
eNB_instances = [0];
}
......@@ -227,7 +227,7 @@ RUs = (
THREAD_STRUCT = (
{
#three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
parallel_config = "PARALLEL_RU_L1_TRX_SPLIT";
parallel_config = "PARALLEL_SINGLE_THREAD";
#two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
worker_config = "WORKER_ENABLE";
}
......
......@@ -200,8 +200,8 @@ MACRLCs = (
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
phy_test_mode = 0;
puSch10xSnr = 200;
puCch10xSnr = 200;
puSch10xSnr = 160;
puCch10xSnr = 160;
}
);
......@@ -234,7 +234,7 @@ RUs = (
THREAD_STRUCT = (
{
#three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
parallel_config = "PARALLEL_RU_L1_TRX_SPLIT";
parallel_config = "PARALLEL_SINGLE_THREAD";
#two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
worker_config = "WORKER_ENABLE";
}
......
......@@ -200,8 +200,8 @@ MACRLCs = (
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
phy_test_mode = 0;
puSch10xSnr = 200;
puCch10xSnr = 200;
puSch10xSnr = 160;
puCch10xSnr = 160;
}
);
......@@ -234,7 +234,7 @@ RUs = (
THREAD_STRUCT = (
{
#three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
parallel_config = "PARALLEL_RU_L1_TRX_SPLIT";
parallel_config = "PARALLEL_SINGLE_THREAD";
#two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
worker_config = "WORKER_ENABLE";
}
......
......@@ -200,8 +200,8 @@ MACRLCs = (
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
phy_test_mode = 0;
puSch10xSnr = 200;
puCch10xSnr = 200;
puSch10xSnr = 160;
puCch10xSnr = 160;
}
);
......@@ -234,7 +234,7 @@ RUs = (
THREAD_STRUCT = (
{
#three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
parallel_config = "PARALLEL_RU_L1_TRX_SPLIT";
parallel_config = "PARALLEL_SINGLE_THREAD";
#two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
worker_config = "WORKER_ENABLE";
}
......
......@@ -20,7 +20,7 @@ RUs = (
THREAD_STRUCT = (
{
#three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
parallel_config = "PARALLEL_RU_L1_TRX_SPLIT";
parallel_config = "PARALLEL_SINGLE_THREAD";
#two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
worker_config = "WORKER_ENABLE";
}
......
......@@ -1504,7 +1504,8 @@ class SSHConnection():
return ENB_PROCESS_ASSERTION
if foundRealTimeIssue:
logging.debug('\u001B[1;37;41m eNB faced real time issues! \u001B[0m')
return ENB_PROCESS_REALTIME_ISSUE
self.htmleNBFailureMsg += 'eNB faced real time issues!\n'
#return ENB_PROCESS_REALTIME_ISSUE
return 0
def TerminateeNB(self):
......
......@@ -252,8 +252,9 @@ case $key in
VM_NAME=ci-phy-sim
ARCHIVES_LOC=phy_sim
LOG_PATTERN=.Rel15.txt
NB_PATTERN_FILES=6
NB_PATTERN_FILES=8
BUILD_OPTIONS="--phy_simulators"
VM_MEMORY=4096
RUN_OPTIONS="./run_exec_autotests.bash -g \"01510*\" -q -np -b"
NBARGS=$[$NBARGS+256]
shift
......@@ -330,8 +331,9 @@ case $key in
VM_NAME=ci-phy-sim
ARCHIVES_LOC=phy_sim
LOG_PATTERN=.Rel15.txt
NB_PATTERN_FILES=6
NB_PATTERN_FILES=8
BUILD_OPTIONS="--phy_simulators"
VM_MEMORY=4096
RUN_OPTIONS="./run_exec_autotests.bash -g \"01510*\" -q -np -b"
NBARGS=$[$NBARGS+256]
;;
......
......@@ -411,6 +411,10 @@ function report_build {
then
summary_table_row "PBCH Test - Release 15" ./archives/phy_sim/nr_pbchsim.Rel15.txt "Built target nr_pbchsim" ./phy_sim_row6.html
fi
if [ -f ./archives/phy_sim/nr_dlschsim.Rel15.txt ]
then
summary_table_row "DLSCH Test - Release 15" ./archives/phy_sim/nr_dlschsim.Rel15.txt "Built target nr_dlschsim" ./phy_sim_row7.html
fi
summary_table_footer
......
......@@ -165,6 +165,10 @@ function check_on_vm_build {
fi
done
if [ $NB_PATTERN_FILES -ne $NB_FOUND_FILES ]; then STATUS=-1; fi
if [ $NB_PATTERN_FILES -ne $NB_FOUND_FILES ]
then
echo "Expecting $NB_PATTERN_FILES log files and found $NB_FOUND_FILES"
STATUS=-1
fi
}
......@@ -290,6 +290,8 @@ set(protobuf_generated_dir ${OPENAIR_BIN_DIR})
add_list2_option(RRC_ASN1_VERSION "Rel15" "ASN.1 version of RRC interface" "Rel8" "Rel10" "Rel14" "CBA")
Message("RRC_ASN1_VERSION is ${RRC_ASN1_VERSION}")
if (${RRC_ASN1_VERSION} STREQUAL "Rel8")
make_version(RRC_VERSION 8 6 0)
set (RRC_GRAMMAR ${OPENAIR2_DIR}/RRC/LTE/MESSAGES/asn1c/ASN1_files/EUTRA-RRC-Definitions-86.asn)
......@@ -366,9 +368,9 @@ execute_process(COMMAND mkdir -p ${NR_RRC_FULL_DIR}
OUTPUT_QUIET
ERROR_QUIET)
if (NOT ${ret} STREQUAL 0)
message(FATAL_ERROR "${ret}: error")
endif (NOT ${ret} STREQUAL 0)
#if (NOT ${ret} STREQUAL 0)
# message(FATAL_ERROR "${ret}: error")
#endif (NOT ${ret} STREQUAL 0)
file(GLOB nr_rrc_source ${NR_RRC_FULL_DIR}/*.c)
file(GLOB nr_rrc_h ${NR_RRC_FULL_DIR}/*.h)
......@@ -961,7 +963,7 @@ set(UTIL_SRC
${OPENAIR_DIR}/common/utils/LOG/log.c
# ${OPENAIR2_DIR}/UTIL/LOG/vcd_signal_dumper.c
${OPENAIR2_DIR}/UTIL/MATH/oml.c
${OPENAIR2_DIR}/UTIL/MEM/mem_block.c
# ${OPENAIR2_DIR}/UTIL/MEM/mem_block.c
# ${OPENAIR2_DIR}/UTIL/OCG/OCG.c
# ${OPENAIR2_DIR}/UTIL/OCG/OCG_create_dir.c
# ${OPENAIR2_DIR}/UTIL/OCG/OCG_detect_file.c
......@@ -1184,6 +1186,7 @@ set(PHY_SRC_COMMON
${OPENAIR1_DIR}/PHY/CODING/lte_segmentation.c
${OPENAIR1_DIR}/PHY/CODING/nr_segmentation.c
${OPENAIR1_DIR}/PHY/CODING/nr_compute_tbs.c
${OPENAIR1_DIR}/PHY/CODING/nr_rate_matching.c
${OPENAIR1_DIR}/PHY/CODING/ccoding_byte.c
${OPENAIR1_DIR}/PHY/CODING/ccoding_byte_lte.c
${OPENAIR1_DIR}/PHY/CODING/3gpplte_sse.c
......@@ -1304,6 +1307,11 @@ set(PHY_SRC_UE
${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_pbch.c
${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_dci.c
${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_dci_tools.c
${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_dlsch.c
${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_dlsch_tools.c
${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_dlsch_coding.c
${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_tbs_tools.c
${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_sch_dmrs.c
${OPENAIR1_DIR}/PHY/NR_REFSIG/nr_gold.c
${OPENAIR1_DIR}/PHY/TOOLS/file_output.c
${OPENAIR1_DIR}/PHY/TOOLS/cadd_vv.c
......@@ -1333,6 +1341,10 @@ set(PHY_SRC_UE
${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/dmrs_nr.c
${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/nr_initial_sync.c
${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/nr_pbch.c
${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c
${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c
${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/nr_dlsch_llr_computation.c
${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_tbs_tools.c
${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/
${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/nr_prach.c
${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/srs_modulation_nr.c
......@@ -1343,6 +1355,7 @@ set(PHY_SRC_UE
${OPENAIR1_DIR}/PHY/NR_REFSIG/nr_dmrs_rx.c
${OPENAIR1_DIR}/PHY/NR_REFSIG/nr_gold_ue.c
${OPENAIR1_DIR}/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c
${OPENAIR1_DIR}/PHY/NR_UE_ESTIMATION/nr_adjust_synch_ue.c
${OPENAIR1_DIR}/PHY/LTE_ESTIMATION/lte_ue_measurements.c
${OPENAIR1_DIR}/PHY/TOOLS/file_output.c
${OPENAIR1_DIR}/PHY/TOOLS/cadd_vv.c
......@@ -1523,14 +1536,6 @@ set(NR_L2_SRC_UE
${NR_UE_RRC_DIR}/L2_interface_ue.c
${NR_UE_RRC_DIR}/main_ue.c
${NR_UE_RRC_DIR}/rrc_UE.c
# ${NR_UE_RRC_DIR}/mac_vars.c
#${RRC_DIR}/rrc_UE.c
)
set(L2_NR_SRC_UE
${NR_UE_RRC_DIR}/L2_interface_ue.c
${NR_UE_RRC_DIR}/main_ue.c
${NR_UE_RRC_DIR}/rrc_UE.c
)
set (MAC_SRC
......@@ -1636,26 +1641,27 @@ set ( NR_LTE_UE_REUSE_SRC
${OPENAIR1_DIR}/SCHED/phy_procedures_lte_common.c
#${OPENAIR1_DIR}/SCHED_UE/phy_procedures_lte_ue.c
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/lte_mcs.c
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/pmch_common.c
#${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/pmch_common.c
${OPENAIR1_DIR}/PHY/LTE_REFSIG/lte_dl_cell_spec.c
${OPENAIR1_DIR}/PHY/CODING/lte_segmentation.c
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/prach_common.c
#${OPENAIR1_DIR}/PHY/LTE_REFSIG/lte_dl_cell_spec.c
#${OPENAIR1_DIR}/PHY/CODING/lte_segmentation.c
#${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/prach_common.c
# ${OPENAIR1_DIR}/PHY/INIT/lte_init_ue.c
${OPENAIR1_DIR}/PHY/CODING/crc_byte.c
${OPENAIR1_DIR}/PHY/CODING/viterbi_lte.c
${OPENAIR1_DIR}/PHY/CODING/viterbi.c
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/phich_common.c
#${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/phich_common.c
${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation.c
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/dci_tools_common.c
${OPENAIR1_DIR}/PHY/CODING/lte_rate_matching.c
# ${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/dci_tools_common.c
# ${OPENAIR1_DIR}/PHY/CODING/lte_rate_matching.c
${OPENAIR1_DIR}/PHY/CODING/ccoding_byte_lte.c
${OPENAIR1_DIR}/PHY/CODING/ccoding_byte.c
${OPENAIR1_DIR}/PHY/LTE_REFSIG/lte_gold.c
${OPENAIR1_DIR}/PHY/LTE_ESTIMATION/lte_est_freq_offset.c
${OPENAIR1_DIR}/PHY/LTE_ESTIMATION/lte_dl_channel_estimation.c
${OPENAIR1_DIR}/PHY/LTE_ESTIMATION/lte_ue_measurements.c
${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/dlsch_demodulation.c
#${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/dlsch_demodulation.c
#${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation_avx2.c
)
......@@ -2555,11 +2561,14 @@ target_link_libraries(polartest SIMU PHY PHY_NR PHY_COMMON m ${ATLAS_LIBRARIES})
add_executable(ldpctest ${OPENAIR1_DIR}/PHY/CODING/TESTBENCH/ldpctest.c)
target_link_libraries(ldpctest SIMU PHY PHY_NR m ${ATLAS_LIBRARIES})
add_executable(nr_dlschsim ${OPENAIR1_DIR}/SIMULATION/NR_PHY/dlschsim.c ${T_SOURCE})
target_link_libraries(nr_dlschsim -Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB CONFIG_LIB -Wl,--end-group m pthread ${ATLAS_LIBRARIES} ${T_LIB} dl)
add_executable(nr_pbchsim ${OPENAIR1_DIR}/SIMULATION/NR_PHY/pbchsim.c ${T_SOURCE})
target_link_libraries(nr_pbchsim -Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB CONFIG_LIB -Wl,--end-group m pthread ${ATLAS_LIBRARIES} ${T_LIB} dl)
add_executable(nr_dlsim ${OPENAIR1_DIR}/SIMULATION/NR_PHY/dlsim.c ${T_SOURCE})
target_link_libraries(nr_dlsim -Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB SCHED_NR_UE_LIB MAC_NR MAC_UE_NR CONFIG_LIB -Wl,--end-group m pthread ${ATLAS_LIBRARIES} ${T_LIB} dl)
add_executable(nr_dlsim ${OPENAIR1_DIR}/SIMULATION/NR_PHY/dlsim.c ${T_SOURCE})
target_link_libraries(nr_dlsim -Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB SCHED_NR_UE_LIB MAC_NR MAC_UE_NR RRC_LIB NR_RRC_LIB CONFIG_LIB L2_NR -Wl,--end-group m pthread ${ATLAS_LIBRARIES} ${T_LIB} dl)
foreach(myExe dlsim dlsim_tm7 ulsim pbchsim scansim mbmssim pdcchsim pucchsim prachsim syncsim)
......
......@@ -1035,14 +1035,16 @@
<testCase id="015103">
<class>execution</class>
<desc>polartest Test cases. (Test1: PBCH polar test)</desc>
<desc>polartest Test cases. (Test1: PBCH polar test),
(Test2: DCI polar test)</desc>
<pre_compile_prog></pre_compile_prog>
<compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</compile_prog>
<compile_prog_args> --phy_simulators -c </compile_prog_args>
<pre_exec>$OPENAIR_DIR/cmake_targets/autotests/tools/free_mem.bash</pre_exec>
<pre_exec_args></pre_exec_args>
<main_exec> $OPENAIR_DIR/targets/bin/polartest.Rel15</main_exec>
<main_exec_args>-q -s-10 -f0</main_exec_args>
<main_exec_args>-q -s-10 -f0
-q -s-10 -f0 -m1</main_exec_args>
<tags>polartest.test1</tags>
<search_expr_true>BLER= 0.000000</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
......@@ -1051,16 +1053,24 @@
<testCase id="015104">
<class>execution</class>
<desc>nr_pbchsim Test cases. (Test1: PBCH-only),
(Test2: PBCH and synchronization)</desc>
<desc>nr_pbchsim Test cases. (Test1: PBCH-only, 106 PRB),
(Test2: PBCH and synchronization, 106PBR),
(Test3: PBCH-only, 217 PRB),
(Test4: PBCH and synchronization, 217 RPB),
(Test5: PBCH-only, 217 PRB),
(Test6: PBCH and synchronization, 217 PRB)</desc>
<pre_compile_prog></pre_compile_prog>
<compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</compile_prog>
<compile_prog_args> --phy_simulators -c </compile_prog_args>
<pre_exec>$OPENAIR_DIR/cmake_targets/autotests/tools/free_mem.bash</pre_exec>
<pre_exec_args></pre_exec_args>
<main_exec> $OPENAIR_DIR/targets/bin/nr_pbchsim.Rel15</main_exec>
<main_exec_args>-s-11 -S-10 -n1000
-s-11 -S-10 -n10 -I</main_exec_args>
<main_exec_args>-s0 -S1 -n1000 -R106
-s0 -S1 -n10 -I -R106
-s0 -S1 -n1000 -R217
-s0 -S1 -n10 -I -R217
-s0 -S1 -n1000 -R273
-s0 -S1 -n10 -I -R273</main_exec_args>
<tags>nr_pbchsim.test1 nr_pbchsim.test2</tags>
<search_expr_true>PBCH test OK</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
......
......@@ -339,6 +339,10 @@ function main() {
FORCE_DEADLINE_SCHEDULER_FLAG_USER="True"
echo_info "Enabling the usage of deadline scheduler"
shift 1;;
--enable-cpu-affinity)
CPU_AFFINITY_FLAG_USER="True"
echo_info "Enabling CPU Affinity (only valid when not using deadline scheduler)"
shift 1;;
--disable-cpu-affinity)
CPU_AFFINITY_FLAG_USER="False"
echo_info "Disabling CPU Affinity (only valid when not using deadline scheduler)"
......@@ -692,7 +696,7 @@ function main() {
echo_info "Compiling unitary tests simulators"
# TODO: fix: dlsim_tm4 pucchsim prachsim pdcchsim pbchsim mbmssim
#simlist="dlsim_tm4 dlsim ulsim pucchsim prachsim pdcchsim pbchsim mbmssim"
simlist="dlsim ulsim polartest ldpctest nr_pbchsim"
simlist="dlsim ulsim polartest ldpctest nr_pbchsim nr_dlschsim nr_dlsim"
for f in $simlist ; do
compilations \
phy_simulators $f \
......
......@@ -3,11 +3,11 @@ set(PACKAGE_NAME "unitary_tests_simulators")
set(PHYSIM True)
set(RF_BOARD None)
set(XFORMS True)
set(ENABLE_ITTI False)
set(ENABLE_ITTI True)
set(DEBUG_PHY False)
set(MU_RECIEVER False)
set(NAS_UE False)
set(MESSAGE_CHART_GENERATOR False)
set(RRC_ASN1_VERSION "Rel14")
set(RRC_ASN1_VERSION "Rel15")
set(T_TRACER True)
include(${CMAKE_CURRENT_SOURCE_DIR}/../CMakeLists.txt)
......@@ -74,10 +74,10 @@ const char* eurecomVariablesNames[] = {
"frame_number_TX1_RU",
"frame_number_RX0_RU",
"frame_number_RX1_RU",
"subframe_number_TX0_RU",
"subframe_number_TX1_RU",
"subframe_number_RX0_RU",
"subframe_number_RX1_RU",
"tti_number_TX0_RU",
"tti_number_TX1_RU",
"tti_number_RX0_RU",
"tti_number_RX1_RU",
"runtime_TX_eNB",
"runtime_RX_eNB",
"frame_number_TX0_UE",
......@@ -196,10 +196,10 @@ const char* eurecomVariablesNames[] = {
"frame_number_TX1_gNB",
"frame_number_RX0_gNB",
"frame_number_RX1_gNB",
"subframe_number_TX0_gNB",
"subframe_number_TX1_gNB",
"subframe_number_RX0_gNB",
"subframe_number_RX1_gNB"
"slot_number_TX0_gNB",
"slot_number_TX1_gNB",
"slot_number_RX0_gNB",
"slot_number_RX1_gNB"
};
const char* eurecomFunctionsNames[] = {
......
......@@ -51,10 +51,10 @@ typedef enum {
VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX1_RU,
VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX0_RU,
VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX1_RU,
VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX0_RU,
VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX1_RU,
VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_RX0_RU,
VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_RX1_RU,
VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX0_RU,
VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX1_RU,
VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_RX0_RU,
VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_RX1_RU,
VCD_SIGNAL_DUMPER_VARIABLES_RUNTIME_TX_ENB,
VCD_SIGNAL_DUMPER_VARIABLES_RUNTIME_RX_ENB,
VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_UE,
......@@ -173,10 +173,10 @@ typedef enum {
VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX1_GNB,
VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX0_GNB,
VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX1_GNB,
VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX0_GNB,
VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX1_GNB,
VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_RX0_GNB,
VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_RX1_GNB,
VCD_SIGNAL_DUMPER_VARIABLES_SLOT_NUMBER_TX0_GNB,
VCD_SIGNAL_DUMPER_VARIABLES_SLOT_NUMBER_TX1_GNB,
VCD_SIGNAL_DUMPER_VARIABLES_SLOT_NUMBER_RX0_GNB,
VCD_SIGNAL_DUMPER_VARIABLES_SLOT_NUMBER_RX1_GNB,
VCD_SIGNAL_DUMPER_VARIABLES_END
} vcd_signal_dump_variables;
......
......@@ -1099,26 +1099,26 @@ ID = VCD_VARIABLE_FRAME_NUMBER_RX1_RU
GROUP = ALL:VCD:ENB:VCD_VARIABLE
FORMAT = ulong,value
VCD_NAME = frame_number_RX1_RU
ID = VCD_VARIABLE_SUBFRAME_NUMBER_TX0_RU
DESC = VCD variable SUBFRAME_NUMBER_TX0_RU
ID = VCD_VARIABLE_TTI_NUMBER_TX0_RU
DESC = VCD variable TTI_NUMBER_TX0_RU
GROUP = ALL:VCD:ENB:VCD_VARIABLE
FORMAT = ulong,value
VCD_NAME = subframe_number_TX0_RU
ID = VCD_VARIABLE_SUBFRAME_NUMBER_TX1_RU
DESC = VCD variable SUBFRAME_NUMBER_TX1_RU
VCD_NAME = tti_number_TX0_RU
ID = VCD_VARIABLE_TTI_NUMBER_TX1_RU
DESC = VCD variable TTI_NUMBER_TX1_RU
GROUP = ALL:VCD:ENB:VCD_VARIABLE
FORMAT = ulong,value
VCD_NAME = subframe_number_TX1_RU
ID = VCD_VARIABLE_SUBFRAME_NUMBER_RX0_RU
DESC = VCD variable SUBFRAME_NUMBER_RX0_RU
VCD_NAME = tti_number_TX1_RU
ID = VCD_VARIABLE_TTI_NUMBER_RX0_RU
DESC = VCD variable TTI_NUMBER_RX0_RU
GROUP = ALL:VCD:ENB:VCD_VARIABLE
FORMAT = ulong,value
VCD_NAME = subframe_number_RX0_RU
ID = VCD_VARIABLE_SUBFRAME_NUMBER_RX1_RU
DESC = VCD variable SUBFRAME_NUMBER_RX1_RU
VCD_NAME = tti_number_RX0_RU
ID = VCD_VARIABLE_TTI_NUMBER_RX1_RU
DESC = VCD variable TTI_NUMBER_RX1_RU
GROUP = ALL:VCD:ENB:VCD_VARIABLE
FORMAT = ulong,value
VCD_NAME = subframe_number_RX1_RU
VCD_NAME = tti_number_RX1_RU
ID = VCD_VARIABLE_RUNTIME_TX_ENB
DESC = VCD variable RUNTIME_TX_ENB
GROUP = ALL:VCD:ENB:VCD_VARIABLE
......@@ -1701,26 +1701,26 @@ ID = VCD_VARIABLE_FRAME_NUMBER_RX1_GNB
GROUP = ALL:VCD:ENB:VCD_VARIABLE
FORMAT = ulong,value
VCD_NAME = frame_number_RX1_gNB
ID = VCD_VARIABLE_SUBFRAME_NUMBER_TX0_GNB
DESC = VCD variable SUBFRAME_NUMBER_TX0_GNB
ID = VCD_VARIABLE_SLOT_NUMBER_TX0_GNB
DESC = VCD variable SLOT_NUMBER_TX0_GNB
GROUP = ALL:VCD:ENB:VCD_VARIABLE
FORMAT = ulong,value
VCD_NAME = subframe_number_TX0_gNB
ID = VCD_VARIABLE_SUBFRAME_NUMBER_TX1_GNB
DESC = VCD variable SUBFRAME_NUMBER_TX1_GNB
VCD_NAME = slot_number_TX0_gNB
ID = VCD_VARIABLE_SLOT_NUMBER_TX1_GNB
DESC = VCD variable SLOT_NUMBER_TX1_GNB
GROUP = ALL:VCD:ENB:VCD_VARIABLE
FORMAT = ulong,value
VCD_NAME = subframe_number_TX1_gNB
ID = VCD_VARIABLE_SUBFRAME_NUMBER_RX0_GNB
DESC = VCD variable SUBFRAME_NUMBER_RX0_GNB
VCD_NAME = slot_number_TX1_gNB
ID = VCD_VARIABLE_SLOT_NUMBER_RX0_GNB
DESC = VCD variable SLOT_NUMBER_RX0_GNB
GROUP = ALL:VCD:ENB:VCD_VARIABLE
FORMAT = ulong,value
VCD_NAME = subframe_number_RX0_gNB
ID = VCD_VARIABLE_SUBFRAME_NUMBER_RX1_GNB
DESC = VCD variable SUBFRAME_NUMBER_RX1_GNB
VCD_NAME = slot_number_RX0_gNB
ID = VCD_VARIABLE_SLOT_NUMBER_RX1_GNB
DESC = VCD variable SLOT_NUMBER_RX1_GNB
GROUP = ALL:VCD:ENB:VCD_VARIABLE
FORMAT = ulong,value
VCD_NAME = subframe_number_RX1_gNB
VCD_NAME = slot_number_RX1_gNB
#functions
......
......@@ -24,119 +24,119 @@
#include "PHY/impl_defs_nr.h"
/*
typedef unsigned int uint32_t;
typedef unsigned short uint16_t;
typedef unsigned char uint8_t;
typedef signed int int32_t;
typedef signed short int16_t;
typedef signed char int8_t;
typedef unsigned int uint32_t;
typedef unsigned short uint16_t;
typedef unsigned char uint8_t;
typedef signed int int32_t;
typedef signed short int16_t;
typedef signed char int8_t;
*/
typedef struct {
uint8_t identifier_dci_formats ; // 0 IDENTIFIER_DCI_FORMATS:
uint8_t carrier_ind ; // 1 CARRIER_IND: 0 or 3 bits, as defined in Subclause x.x of [5, TS38.213]
uint8_t sul_ind_0_1 ; // 2 SUL_IND_0_1:
uint8_t slot_format_ind ; // 3 SLOT_FORMAT_IND: size of DCI format 2_0 is configurable by higher layers up to 128 bits, according to Subclause 11.1.1 of [5, TS 38.213]
uint8_t pre_emption_ind ; // 4 PRE_EMPTION_IND: size of DCI format 2_1 is configurable by higher layers up to 126 bits, according to Subclause 11.2 of [5, TS 38.213]. Each pre-emption indication is 14 bits
uint8_t block_number ; // 5 BLOCK_NUMBER: starting position of a block is determined by the parameter startingBitOfFormat2_3
uint8_t close_loop_ind ; // 6 CLOSE_LOOP_IND:
uint8_t bandwidth_part_ind ; // 7 BANDWIDTH_PART_IND:
uint8_t short_message_ind ; // 8 SHORT_MESSAGE_IND:
uint8_t short_messages ; // 9 SHORT_MESSAGES:
uint16_t freq_dom_resource_assignment_UL; // 10 FREQ_DOM_RESOURCE_ASSIGNMENT_UL: PUSCH hopping with resource allocation type 1 not considered
// (NOTE 1) If DCI format 0_0 is monitored in common search space
// and if the number of information bits in the DCI format 0_0 prior to padding
// is larger than the payload size of the DCI format 1_0 monitored in common search space
// the bitwidth of the frequency domain resource allocation field in the DCI format 0_0
// is reduced such that the size of DCI format 0_0 equals to the size of the DCI format 1_0
uint16_t freq_dom_resource_assignment_DL; // 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL:
uint8_t time_dom_resource_assignment ; // 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 6.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits,
// where I the number of entries in the higher layer parameter pusch-AllocationList
uint8_t vrb_to_prb_mapping ; // 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0
uint8_t prb_bundling_size_ind ; // 14 PRB_BUNDLING_SIZE_IND:0 bit if the higher layer parameter PRB_bundling is not configured or is set to 'static', or 1 bit if the higher layer parameter PRB_bundling is set to 'dynamic' according to Subclause 5.1.2.3 of [6, TS 38.214]
uint8_t rate_matching_ind ; // 15 RATE_MATCHING_IND: 0, 1, or 2 bits according to higher layer parameter rate-match-PDSCH-resource-set
uint8_t zp_csi_rs_trigger ; // 16 ZP_CSI_RS_TRIGGER:
uint8_t freq_hopping_flag ; // 17 FREQ_HOPPING_FLAG: 0 bit if only resource allocation type 0
uint8_t tb1_mcs ; // 18 TB1_MCS:
uint8_t tb1_ndi ; // 19 TB1_NDI:
uint8_t tb1_rv ; // 20 TB1_RV:
uint8_t tb2_mcs ; // 21 TB2_MCS:
uint8_t tb2_ndi ; // 22 TB2_NDI:
uint8_t tb2_rv ; // 23 TB2_RV:
uint8_t mcs ; // 24 MCS:
uint8_t ndi ; // 25 NDI:
uint8_t rv ; // 26 RV:
uint8_t harq_process_number ; // 27 HARQ_PROCESS_NUMBER:
uint8_t dai ; // 28 DAI: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI
// 2 if one serving cell is configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 bits are the counter DAI
// 0 otherwise
uint8_t first_dai ; // 29 FIRST_DAI: (1 or 2 bits) 1 bit for semi-static HARQ-ACK
uint8_t second_dai ; // 30 SECOND_DAI: (0 or 2 bits) 2 bits for dynamic HARQ-ACK codebook with two HARQ-ACK sub-codebooks
uint8_t tb_scaling ; // 31 TB_SCALING:
uint8_t tpc_pusch ; // 32 TPC_PUSCH:
uint8_t tpc_pucch ; // 33 TPC_PUCCH:
uint8_t pucch_resource_ind ; // 34 PUCCH_RESOURCE_IND:
uint8_t pdsch_to_harq_feedback_time_ind ; // 35 PDSCH_TO_HARQ_FEEDBACK_TIME_IND:
uint8_t srs_resource_ind ; // 36 SRS_RESOURCE_IND:
uint8_t precod_nbr_layers ; // 37 PRECOD_NBR_LAYERS:
uint8_t antenna_ports ; // 38 ANTENNA_PORTS:
uint8_t tci ; // 39 TCI: 0 bit if higher layer parameter tci-PresentInDCI is not enabled; otherwise 3 bits
uint8_t srs_request ; // 40 SRS_REQUEST:
uint8_t tpc_cmd ; // 41 TPC_CMD:
uint8_t csi_request ; // 42 CSI_REQUEST:
uint8_t cbgti ; // 43 CBGTI: 0, 2, 4, 6, or 8 bits determined by higher layer parameter maxCodeBlockGroupsPerTransportBlock for the PDSCH
uint8_t cbgfi ; // 44 CBGFI: 0 or 1 bit determined by higher layer parameter codeBlockGroupFlushIndicator
uint8_t ptrs_dmrs ; // 45 PTRS_DMRS:
uint8_t beta_offset_ind ; // 46 BETA_OFFSET_IND:
uint8_t dmrs_seq_ini ; // 47 DMRS_SEQ_INI: 1 bit if the cell has two ULs and the number of bits for DCI format 1_0 before padding
// is larger than the number of bits for DCI format 0_0 before padding; 0 bit otherwise
uint8_t ul_sch_ind ; // 48 UL_SCH_IND: value of "1" indicates UL-SCH shall be transmitted on the PUSCH and a value of "0" indicates UL-SCH shall not be transmitted on the PUSCH
uint16_t padding_nr_dci ; // 49 PADDING_NR_DCI: (Note 2) If DCI format 0_0 is monitored in common search space