Commit dd4f1ab7 authored by Thomas Laurent's avatar Thomas Laurent

coarse gain cleaning

parent 7d602d5c
......@@ -185,7 +185,7 @@ set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -Wl,-rpath -Wl,${CMAKE_CU
# these changes are related to hardcoded path to include .h files
add_definitions(-DCMAKER)
set(CMAKE_C_FLAGS_DEBUG "${CMAKE_C_FLAGS} -g -DMALLOC_CHECK_=3")
set(CMAKE_C_FLAGS_RELWITHDEBINFO "${CMAKE_C_FLAGS} -g -DMALLOC_CHECK_=3 -O2")
set(CMAKE_C_FLAGS_RELWITHDEBINFO "${CMAKE_C_FLAGS} -g -DMALLOC_CHECK_=3 -O0")
set(GIT_BRANCH "UNKNOWN")
......
......@@ -782,7 +782,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
#if DISABLE_LOG_X
printf("[AbsSFN %d.%d] Slot%d Symbol %d log2_maxh %d channel_level %d: Channel Comp %5.2f \n",frame,subframe,slot,symbol,pdsch_vars[eNB_id]->log2_maxh,proc->channel_level,ue->generic_stat_bis[ue->current_thread_id[subframe]][slot].p_time/(cpuf*1000.0));
#else
LOG_I(PHY, "[AbsSFN %d.%d] Slot%d Symbol %d log2_maxh %d channel_level %d: Channel Comp %5.2f \n",frame,subframe,slot,symbol,pdsch_vars[eNB_id]->log2_maxh,proc->channel_level,ue->generic_stat_bis[ue->current_thread_id[subframe]][slot].p_time/(cpuf*1000.0));
LOG_I(PHY, "[AbsSFN %d.%d] Slot%d Symbol %d log2_maxh %d Channel Comp %5.2f \n",frame,subframe,slot,symbol,pdsch_vars[eNB_id]->log2_maxh,ue->generic_stat_bis[ue->current_thread_id[subframe]][slot].p_time/(cpuf*1000.0));
#endif
#endif
// MRC
......
......@@ -52,8 +52,8 @@ void print_meas_now(time_stats_t *ts, const char* name, FILE* file_name){
if (ts->trials>0) {
//fprintf(file_name,"Name %25s: Processing %15.3f ms for SF %d, diff_now %15.3f \n", name,(ts->diff_now/(cpu_freq_GHz*1000000.0)),subframe,ts->diff_now);
fprintf(file_name,"%15.3f us, diff_now %15.3f \n",(ts->diff_now/(cpu_freq_GHz*1000.0)),(double)ts->diff_now);
//fprintf(file_name,"Name %25s: Processing %15.3f ms for SF %d, diff_now %15.3f \n", name,(ts->p_time/(cpu_freq_GHz*1000000.0)),subframe,ts->p_time);
fprintf(file_name,"%15.3f us, diff_now %15.3f \n",(ts->p_time/(cpu_freq_GHz*1000.0)),(double)ts->p_time);
}
}
......
......@@ -40,7 +40,6 @@ typedef struct {
long long in;
long long diff;
long long diff_now;
long long p_time; /*!< \brief absolute process duration */
long long diff_square; /*!< \brief process duration square */
long long max;
......@@ -50,7 +49,6 @@ typedef struct {
#elif defined(__arm__)
typedef struct {
uint32_t in;
uint32_t diff_now;
uint32_t diff;
uint32_t p_time; /*!< \brief absolute process duration */
uint32_t diff_square; /*!< \brief process duration square */
......@@ -116,9 +114,6 @@ static inline void stop_meas(time_stats_t *ts)
if (opp_enabled) {
long long out = rdtsc_oai();
ts->diff_now = (out-ts->in);
ts->diff_now = (out-ts->in);
ts->diff += (out-ts->in);
/// process duration is the difference between two clock points
ts->p_time = (out-ts->in);
......@@ -135,7 +130,6 @@ static inline void reset_meas(time_stats_t *ts) {
ts->trials=0;
ts->diff=0;
ts->diff_now=0;
ts->p_time=0;
ts->diff_square=0;
ts->max=0;
......
......@@ -412,7 +412,7 @@ void pdsch_procedures(PHY_VARS_eNB *eNB,
&eNB->dlsch_turbo_encoding_wakeup_stats1,
&eNB->dlsch_interleaving_stats);
stop_meas(&eNB->dlsch_encoding_stats);
if(eNB->dlsch_encoding_stats.diff_now>500*3000 && opp_enabled == 1)
if(eNB->dlsch_encoding_stats.p_time>500*3000 && opp_enabled == 1)
{
print_meas_now(&eNB->dlsch_encoding_stats,"total coding",stderr);
}
......@@ -1337,7 +1337,7 @@ void pusch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc)
ret,
ulsch_harq->cqi_crc_status,
ulsch_harq->O_ACK,
eNB->ulsch_decoding_stats.diff_now, eNB->ulsch_decoding_stats.max);
eNB->ulsch_decoding_stats.p_time, eNB->ulsch_decoding_stats.max);
//compute the expected ULSCH RX power (for the stats)
ulsch_harq->delta_TF = get_hundred_times_delta_IF_eNB(eNB,i,harq_pid, 0); // 0 means bw_factor is not considered
......
......@@ -160,7 +160,7 @@ static void *feptx_thread(void *param) {
exit_fun( "ERROR pthread_cond_signal" );
return NULL;
}
/*if(opp_enabled == 1 && ru->ofdm_mod_wakeup_stats.diff_now>30*3000){
/*if(opp_enabled == 1 && ru->ofdm_mod_wakeup_stats.p_time>30*3000){
print_meas_now(&ru->ofdm_mod_wakeup_stats,"fep wakeup",stderr);
printf("delay in fep wakeup in frame_tx: %d subframe_rx: %d \n",proc->frame_tx,proc->subframe_tx);
}*/
......@@ -220,7 +220,7 @@ void feptx_ofdm_2thread(RU_t *ru) {
start_meas(&ru->ofdm_mod_wait_stats);
wait_on_busy_condition(&proc->mutex_feptx,&proc->cond_feptx,&proc->instance_cnt_feptx,"feptx thread");
stop_meas(&ru->ofdm_mod_wait_stats);
/*if(opp_enabled == 1 && ru->ofdm_mod_wait_stats.diff_now>30*3000){
/*if(opp_enabled == 1 && ru->ofdm_mod_wait_stats.p_time>30*3000){
print_meas_now(&ru->ofdm_mod_wait_stats,"fep wakeup",stderr);
printf("delay in feptx wait on codition in frame_rx: %d subframe_rx: %d \n",proc->frame_tx,proc->subframe_tx);
}*/
......@@ -467,7 +467,7 @@ static void *fep_thread(void *param) {
exit_fun( "ERROR pthread_cond_signal" );
return NULL;
}
/*if(opp_enabled == 1 && ru->ofdm_demod_wakeup_stats.diff_now>30*3000){
/*if(opp_enabled == 1 && ru->ofdm_demod_wakeup_stats.p_time>30*3000){
print_meas_now(&ru->ofdm_demod_wakeup_stats,"fep wakeup",stderr);
printf("delay in fep wakeup in frame_rx: %d subframe_rx: %d \n",proc->frame_rx,proc->subframe_rx);
}*/
......@@ -582,7 +582,7 @@ void ru_fep_full_2thread(RU_t *ru) {
start_meas(&ru->ofdm_demod_wait_stats);
wait_on_busy_condition(&proc->mutex_fep,&proc->cond_fep,&proc->instance_cnt_fep,"fep thread");
stop_meas(&ru->ofdm_demod_wait_stats);
if(opp_enabled == 1 && ru->ofdm_demod_wakeup_stats.diff_now>30*3000){
if(opp_enabled == 1 && ru->ofdm_demod_wakeup_stats.p_time>30*3000){
print_meas_now(&ru->ofdm_demod_wakeup_stats,"fep wakeup",stderr);
printf("delay in fep wait on codition in frame_rx: %d subframe_rx: %d \n",proc->frame_rx,proc->subframe_rx);
}
......
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
contributor license agreements. See the NOTICE file distributed with
this work for additional information regarding copyright ownership.
The OpenAirInterface Software Alliance licenses this file to You under
the OAI Public License, Version 1.1 (the "License"); you may not use this file
except in compliance with the License.
You may obtain a copy of the License at
http://www.openairinterface.org/?page_id=698
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
-------------------------------------------------------------------------------
For more information about the OpenAirInterface (OAI) Software Alliance:
contact@openairinterface.org
*/
/*! \file ulsim.c
\brief Top-level UL simulator
......@@ -58,21 +58,43 @@
#include "common/config/config_load_configmodule.h"
double cpuf;
#define inMicroS(a) (((double)(a))/(cpu_freq_GHz*1000.0))
//#define MCS_COUNT 23//added for PHY abstraction
static int cmpdouble(const void *p1, const void *p2) {
return *(double *)p1 > *(double *)p2;
}
double median(varArray_t *input) {
return *(double *)((uint8_t *)(input+1)+(input->size/2)*input->atomSize);
}
double q1(varArray_t *input) {
return *(double *)((uint8_t *)(input+1)+(input->size/4)*input->atomSize);
}
//#define MCS_COUNT 23//added for PHY abstraction
double q3(varArray_t *input) {
return *(double *)((uint8_t *)(input+1)+(3*input->size/4)*input->atomSize);
}
void dumpVarArray(varArray_t *input) {
double *ptr=dataArray(input);
printf("dumping size=%ld\n", input->size);
for (int i=0; i < input->size; i++)
printf("%.1f:", *ptr++);
printf("\n");
}
channel_desc_t *eNB2UE[NUMBER_OF_eNB_MAX][NUMBER_OF_UE_MAX];
channel_desc_t *UE2eNB[NUMBER_OF_UE_MAX][NUMBER_OF_eNB_MAX];
//Added for PHY abstraction
//Added for PHY abstractionopenair1/PHY/TOOLS/lte_phy_scope.h
node_desc_t *enb_data[NUMBER_OF_eNB_MAX];
node_desc_t *ue_data[NUMBER_OF_UE_MAX];
//double sinr_bler_map[MCS_COUNT][2][16];
extern uint16_t beta_ack[16],beta_ri[16],beta_cqi[16];
//extern char* namepointer_chMag ;
int xforms=0;
FD_lte_phy_scope_enb *form_enb;
char title[255];
......@@ -88,6 +110,8 @@ int nfapi_mode = 0;
extern void fep_full(RU_t *ru);
extern void ru_fep_full_2thread(RU_t *ru);
extern void eNB_fep_full(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc);
extern void eNB_fep_full_2thread(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc);
nfapi_dl_config_request_t DL_req;
nfapi_ul_config_request_t UL_req;
......@@ -122,11 +146,8 @@ fill_nfapi_ulsch_config_request(nfapi_ul_config_request_pdu_t *ul_config_pdu,
uint8_t ul_tx_mode,
uint8_t current_tx_nb,
uint8_t n_srs,
uint16_t size)
{
uint16_t size) {
memset((void *) ul_config_pdu, 0, sizeof(nfapi_ul_config_request_pdu_t));
ul_config_pdu->pdu_type = NFAPI_UL_CONFIG_ULSCH_PDU_TYPE;
ul_config_pdu->pdu_size = (uint8_t) (2 + sizeof(nfapi_ul_config_ulsch_pdu));
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.tl.tag = NFAPI_UL_CONFIG_REQUEST_ULSCH_PDU_REL8_TAG;
......@@ -189,7 +210,6 @@ void fill_ulsch_dci(PHY_VARS_eNB *eNB,
uint8_t beta_CQI,
uint8_t beta_RI,
uint8_t cqi_size) {
nfapi_ul_config_request_body_t *ul_req=&sched_resp->UL_req->ul_config_request_body;
int harq_pid = ((frame*10)+subframe)&7;
......@@ -201,72 +221,72 @@ void fill_ulsch_dci(PHY_VARS_eNB *eNB,
case 25:
if (eNB->frame_parms.frame_type == TDD) {
((DCI0_5MHz_TDD_1_6_t*)UL_dci)->type = 0;
((DCI0_5MHz_TDD_1_6_t*)UL_dci)->rballoc = computeRIV(eNB->frame_parms.N_RB_UL,first_rb,nb_rb);// 12 RBs from position 8
((DCI0_5MHz_TDD_1_6_t *)UL_dci)->type = 0;
((DCI0_5MHz_TDD_1_6_t *)UL_dci)->rballoc = computeRIV(eNB->frame_parms.N_RB_UL,first_rb,nb_rb); // 12 RBs from position 8
//printf("nb_rb %d/%d, rballoc %d (dci %x)\n",nb_rb,eNB->frame_parms.N_RB_UL,((DCI0_5MHz_TDD_1_6_t*)UL_dci)->rballoc,*(uint32_t *)UL_dci);
((DCI0_5MHz_TDD_1_6_t*)UL_dci)->mcs = mcs;
((DCI0_5MHz_TDD_1_6_t*)UL_dci)->ndi = ndi;
((DCI0_5MHz_TDD_1_6_t*)UL_dci)->TPC = 0;
((DCI0_5MHz_TDD_1_6_t*)UL_dci)->cqi_req = cqi_flag&1;
((DCI0_5MHz_TDD_1_6_t*)UL_dci)->cshift = 0;
((DCI0_5MHz_TDD_1_6_t*)UL_dci)->dai = 1;
((DCI0_5MHz_TDD_1_6_t *)UL_dci)->mcs = mcs;
((DCI0_5MHz_TDD_1_6_t *)UL_dci)->ndi = ndi;
((DCI0_5MHz_TDD_1_6_t *)UL_dci)->TPC = 0;
((DCI0_5MHz_TDD_1_6_t *)UL_dci)->cqi_req = cqi_flag&1;
((DCI0_5MHz_TDD_1_6_t *)UL_dci)->cshift = 0;
((DCI0_5MHz_TDD_1_6_t *)UL_dci)->dai = 1;
} else {
((DCI0_5MHz_FDD_t*)UL_dci)->type = 0;
((DCI0_5MHz_FDD_t*)UL_dci)->rballoc = computeRIV(eNB->frame_parms.N_RB_UL,first_rb,nb_rb);// 12 RBs from position 8
((DCI0_5MHz_FDD_t *)UL_dci)->type = 0;
((DCI0_5MHz_FDD_t *)UL_dci)->rballoc = computeRIV(eNB->frame_parms.N_RB_UL,first_rb,nb_rb); // 12 RBs from position 8
// printf("nb_rb %d/%d, rballoc %d (dci %x) (dcip %p)\n",nb_rb,eNB->frame_parms.N_RB_UL,((DCI0_5MHz_FDD_t*)UL_dci)->rballoc,*(uint32_t *)UL_dci,UL_dci);
((DCI0_5MHz_FDD_t*)UL_dci)->mcs = mcs;
((DCI0_5MHz_FDD_t*)UL_dci)->ndi = ndi;
((DCI0_5MHz_FDD_t*)UL_dci)->TPC = 0;
((DCI0_5MHz_FDD_t*)UL_dci)->cqi_req = cqi_flag&1;
((DCI0_5MHz_FDD_t*)UL_dci)->cshift = 0;
((DCI0_5MHz_FDD_t *)UL_dci)->mcs = mcs;
((DCI0_5MHz_FDD_t *)UL_dci)->ndi = ndi;
((DCI0_5MHz_FDD_t *)UL_dci)->TPC = 0;
((DCI0_5MHz_FDD_t *)UL_dci)->cqi_req = cqi_flag&1;
((DCI0_5MHz_FDD_t *)UL_dci)->cshift = 0;
}
break;
case 50:
if (eNB->frame_parms.frame_type == TDD) {
((DCI0_10MHz_TDD_1_6_t*)UL_dci)->type = 0;
((DCI0_10MHz_TDD_1_6_t*)UL_dci)->rballoc = computeRIV(eNB->frame_parms.N_RB_UL,first_rb,nb_rb);// 12 RBs from position 8
((DCI0_10MHz_TDD_1_6_t *)UL_dci)->type = 0;
((DCI0_10MHz_TDD_1_6_t *)UL_dci)->rballoc = computeRIV(eNB->frame_parms.N_RB_UL,first_rb,nb_rb); // 12 RBs from position 8
// printf("nb_rb %d/%d, rballoc %d (dci %x)\n",nb_rb,eNB->frame_parms.N_RB_UL,((DCI0_10MHz_TDD_1_6_t*)UL_dci)->rballoc,*(uint32_t *)UL_dci);
((DCI0_10MHz_TDD_1_6_t*)UL_dci)->mcs = mcs;
((DCI0_10MHz_TDD_1_6_t*)UL_dci)->ndi = ndi;
((DCI0_10MHz_TDD_1_6_t*)UL_dci)->TPC = 0;
((DCI0_10MHz_TDD_1_6_t*)UL_dci)->cqi_req = cqi_flag&1;
((DCI0_10MHz_TDD_1_6_t*)UL_dci)->cshift = 0;
((DCI0_10MHz_TDD_1_6_t*)UL_dci)->dai = 1;
((DCI0_10MHz_TDD_1_6_t *)UL_dci)->mcs = mcs;
((DCI0_10MHz_TDD_1_6_t *)UL_dci)->ndi = ndi;
((DCI0_10MHz_TDD_1_6_t *)UL_dci)->TPC = 0;
((DCI0_10MHz_TDD_1_6_t *)UL_dci)->cqi_req = cqi_flag&1;
((DCI0_10MHz_TDD_1_6_t *)UL_dci)->cshift = 0;
((DCI0_10MHz_TDD_1_6_t *)UL_dci)->dai = 1;
} else {
((DCI0_10MHz_FDD_t*)UL_dci)->type = 0;
((DCI0_10MHz_FDD_t*)UL_dci)->rballoc = computeRIV(eNB->frame_parms.N_RB_UL,first_rb,nb_rb);// 12 RBs from position 8
((DCI0_10MHz_FDD_t *)UL_dci)->type = 0;
((DCI0_10MHz_FDD_t *)UL_dci)->rballoc = computeRIV(eNB->frame_parms.N_RB_UL,first_rb,nb_rb); // 12 RBs from position 8
//printf("nb_rb %d/%d, rballoc %d (dci %x)\n",nb_rb,eNB->frame_parms.N_RB_UL,((DCI0_10MHz_FDD_t*)UL_dci)->rballoc,*(uint32_t *)UL_dci);
((DCI0_10MHz_FDD_t*)UL_dci)->mcs = mcs;
((DCI0_10MHz_FDD_t*)UL_dci)->ndi = ndi;
((DCI0_10MHz_FDD_t*)UL_dci)->TPC = 0;
((DCI0_10MHz_FDD_t*)UL_dci)->cqi_req = cqi_flag&1;
((DCI0_10MHz_FDD_t*)UL_dci)->cshift = 0;
((DCI0_10MHz_FDD_t *)UL_dci)->mcs = mcs;
((DCI0_10MHz_FDD_t *)UL_dci)->ndi = ndi;
((DCI0_10MHz_FDD_t *)UL_dci)->TPC = 0;
((DCI0_10MHz_FDD_t *)UL_dci)->cqi_req = cqi_flag&1;
((DCI0_10MHz_FDD_t *)UL_dci)->cshift = 0;
}
break;
case 100:
if (eNB->frame_parms.frame_type == TDD) {
((DCI0_20MHz_TDD_1_6_t*)UL_dci)->type = 0;
((DCI0_20MHz_TDD_1_6_t*)UL_dci)->rballoc = computeRIV(eNB->frame_parms.N_RB_UL,first_rb,nb_rb);// 12 RBs from position 8
((DCI0_20MHz_TDD_1_6_t *)UL_dci)->type = 0;
((DCI0_20MHz_TDD_1_6_t *)UL_dci)->rballoc = computeRIV(eNB->frame_parms.N_RB_UL,first_rb,nb_rb); // 12 RBs from position 8
// printf("nb_rb %d/%d, rballoc %d (dci %x)\n",nb_rb,eNB->frame_parms.N_RB_UL,((DCI0_20MHz_TDD_1_6_t*)UL_dci)->rballoc,*(uint32_t *)UL_dci);
((DCI0_20MHz_TDD_1_6_t*)UL_dci)->mcs = mcs;
((DCI0_20MHz_TDD_1_6_t*)UL_dci)->ndi = ndi;
((DCI0_20MHz_TDD_1_6_t*)UL_dci)->TPC = 0;
((DCI0_20MHz_TDD_1_6_t*)UL_dci)->cqi_req = cqi_flag&1;
((DCI0_20MHz_TDD_1_6_t*)UL_dci)->cshift = 0;
((DCI0_20MHz_TDD_1_6_t*)UL_dci)->dai = 1;
((DCI0_20MHz_TDD_1_6_t *)UL_dci)->mcs = mcs;
((DCI0_20MHz_TDD_1_6_t *)UL_dci)->ndi = ndi;
((DCI0_20MHz_TDD_1_6_t *)UL_dci)->TPC = 0;
((DCI0_20MHz_TDD_1_6_t *)UL_dci)->cqi_req = cqi_flag&1;
((DCI0_20MHz_TDD_1_6_t *)UL_dci)->cshift = 0;
((DCI0_20MHz_TDD_1_6_t *)UL_dci)->dai = 1;
} else {
((DCI0_20MHz_FDD_t*)UL_dci)->type = 0;
((DCI0_20MHz_FDD_t*)UL_dci)->rballoc = computeRIV(eNB->frame_parms.N_RB_UL,first_rb,nb_rb);// 12 RBs from position 8
((DCI0_20MHz_FDD_t *)UL_dci)->type = 0;
((DCI0_20MHz_FDD_t *)UL_dci)->rballoc = computeRIV(eNB->frame_parms.N_RB_UL,first_rb,nb_rb); // 12 RBs from position 8
// printf("nb_rb %d/%d, rballoc %d (dci %x) (UL_dci %p)\n",nb_rb,eNB->frame_parms.N_RB_UL,((DCI0_20MHz_FDD_t*)UL_dci)->rballoc,*(uint32_t *)UL_dci,(void*)UL_dci);
((DCI0_20MHz_FDD_t*)UL_dci)->mcs = mcs;
((DCI0_20MHz_FDD_t*)UL_dci)->ndi = ndi;
((DCI0_20MHz_FDD_t*)UL_dci)->TPC = 0;
((DCI0_20MHz_FDD_t*)UL_dci)->cqi_req = cqi_flag&1;
((DCI0_20MHz_FDD_t*)UL_dci)->cshift = 0;
((DCI0_20MHz_FDD_t *)UL_dci)->mcs = mcs;
((DCI0_20MHz_FDD_t *)UL_dci)->ndi = ndi;
((DCI0_20MHz_FDD_t *)UL_dci)->TPC = 0;
((DCI0_20MHz_FDD_t *)UL_dci)->cqi_req = cqi_flag&1;
((DCI0_20MHz_FDD_t *)UL_dci)->cshift = 0;
}
break;
......@@ -300,77 +320,92 @@ void fill_ulsch_dci(PHY_VARS_eNB *eNB,
0, // current_tx_nb
0, // n_srs
TBS);
sched_resp->UL_req->header.message_id = NFAPI_UL_CONFIG_REQUEST;
ul_req->number_of_pdus=1;
ul_req->tl.tag = NFAPI_UL_CONFIG_REQUEST_BODY_TAG;
}
void printStatIndent(time_stats_t *ptr, char *txt) {
printf("|__ %-50s %.2f us (%d trials)\n",
txt,
inMicroS(ptr->diff/ptr->trials),
ptr->trials);
}
extern void eNB_fep_full(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc);
extern void eNB_fep_full_2thread(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc);
void printStatIndent2(time_stats_t *ptr, char *txt, int turbo_iter) {
double timeBase=1/(1000*cpu_freq_GHz);
printf(" |__ %-45s %.2f us (cycles/block %7g, %5d trials)\n",
txt,
((double)ptr->diff)/ptr->trials*timeBase,
round(((double)ptr->diff)/turbo_iter),
ptr->trials);
}
double squareRoot(time_stats_t *ptr) {
double timeBase=1/(1000*cpu_freq_GHz);
return sqrt((double)ptr->diff_square*pow(timeBase,2)/ptr->trials -
pow((double)ptr->diff/ptr->trials*timeBase,2));
}
void printDistribution(time_stats_t *ptr, varArray_t *sortedList, char *txt) {
double timeBase=1/(1000*cpu_freq_GHz);
printf("%-50s :%.2f us (%d trials)\n",
txt,
(double)ptr->diff/ptr->trials*timeBase,
ptr->trials);
printf("|__ Statistics std: %.2f us median %.2fus q1 %.2fus q3 %.2fus \n",
squareRoot(ptr), median(sortedList),q1(sortedList),q3(sortedList));
}
int main(int argc, char **argv)
{
enum eTypes { eBool, eInt, eFloat, eText };
static int verbose,disable_bundling=0,cqi_flag=0, extended_prefix_flag=0, test_perf=0, subframe=3, transmission_m=1,n_rx=1;
char c;
int main(int argc, char **argv) {
int i,j,aa,u;
PHY_VARS_eNB *eNB;
PHY_VARS_UE *UE;
RU_t *ru;
int aarx,aatx;
double channelx,channely;
double sigma2, sigma2_dB=10,SNR,SNR2=0,snr0=-2.0,snr1,SNRmeas,rate,saving_bler=0;
double input_snr_step=.2,snr_int=30;
static double sigma2, sigma2_dB=10,SNR,SNR2=0,snr0=-2.0,snr1,SNRmeas,rate,saving_bler=0;
static double input_snr_step=.2,snr_int=30;
double blerr;
int rvidx[8]={0,2,3,1,0,2,3,1};
int rvidx[8]= {0,2,3,1,0,2,3,1};
int **txdata;
LTE_DL_FRAME_PARMS *frame_parms;
double s_re0[30720],s_im0[30720],r_re0[30720],r_im0[30720];
double s_re1[30720],s_im1[30720],r_re1[30720],r_im1[30720];
double r_re2[30720],r_im2[30720];
double r_re3[30720],r_im3[30720];
double *s_re[2]={s_re0,s_re1};
double *s_im[2]={s_im0,s_im1};
double *r_re[4]={r_re0,r_re1,r_re2,r_re3};
double *r_im[4]={r_im0,r_im1,r_im2,r_im3};
double *s_re[2]= {s_re0,s_re1};
double *s_im[2]= {s_im0,s_im1};
double *r_re[4]= {r_re0,r_re1,r_re2,r_re3};
double *r_im[4]= {r_im0,r_im1,r_im2,r_im3};
double forgetting_factor=0.0; //in [0,1] 0 means a new channel every time, 1 means keep the same channel
double iqim=0.0;
uint8_t extended_prefix_flag=0;
int cqi_flag=0,cqi_error,cqi_errors,ack_errors,cqi_crc_falsepositives,cqi_crc_falsenegatives;
int cqi_error,cqi_errors,ack_errors,cqi_crc_falsepositives,cqi_crc_falsenegatives;
int ch_realization;
int eNB_id = 0;
int chMod = 0 ;
int UE_id = 0;
unsigned char nb_rb=25,first_rb=0,mcs=0,round=0,bundling_flag=1;
static int nb_rb=25,first_rb=0,mcs=0,round=0;
//unsigned char l;
unsigned char awgn_flag = 0 ;
static int awgn_flag = 0 ;
SCM_t channel_model=Rice1;
unsigned char *input_buffer,harq_pid;
unsigned char *input_buffer=0,harq_pid;
unsigned short input_buffer_length;
unsigned int ret;
unsigned int coded_bits_per_codeword,nsymb;
int subframe=3;
unsigned int tx_lev=0,tx_lev_dB,trials,errs[4]= {0,0,0,0},round_trials[4]= {0,0,0,0};
uint8_t transmission_mode=1,n_rx=1;
FILE *bler_fd=NULL;
char bler_fname[512];
FILE *time_meas_fd=NULL;
char time_meas_fname[256];
FILE *input_fdUL=NULL,*trch_out_fdUL=NULL;
// unsigned char input_file=0;
char input_val_str[50],input_val_str2[50];
// FILE *rx_frame_file;
FILE *csv_fdUL=NULL;
/*
FILE *fperen=NULL;
char fperen_name[512];
......@@ -381,237 +416,203 @@ int main(int argc, char **argv)
FILE *flogeren=NULL;
char flogeren_name[512];
*/
/* FILE *ftxlev;
char ftxlev_name[512];
*/
char csv_fname[512];
int n_frames=5000;
int n_ch_rlz = 1;
int abstx = 0;
static int n_frames=5000;
static int n_ch_rlz = 1;
static int abstx = 0;
int hold_channel=0;
channel_desc_t *UE2eNB;
//uint8_t control_only_flag = 0;
int delay = 0;
double maxDoppler = 0.0;
uint8_t srs_flag = 0;
uint8_t N_RB_DL=25,osf=1;
static int delay = 0;
static double maxDoppler = 0.0;
static int srs_flag = 0;
static int N_RB_DL=25,osf=1;
//uint8_t cyclic_shift = 0;
uint8_t beta_ACK=0,beta_RI=0,beta_CQI=2,cqi_size=11;
uint8_t tdd_config=3,frame_type=FDD;
uint8_t N0=30;
double tx_gain=1.0;
static uint8_t beta_ACK=0,beta_RI=0,beta_CQI=2,cqi_size=11;
static uint8_t tdd_config=3,frame_type=FDD;
static int N0=30;
static double tx_gain=1.0;
double cpu_freq_GHz;
int avg_iter,iter_trials;
int iter_trials;
uint32_t UL_alloc_pdu;
int s,Kr,Kr_bytes;
int dump_perf=0;
int test_perf=0;
int dump_table =0;
static int dump_table =0;
double effective_rate=0.0;
char channel_model_input[10];
uint8_t max_turbo_iterations=4;
uint8_t parallel_flag=0;
char channel_model_input[10]= {0};
static int max_turbo_iterations=4;
static int parallel_flag=0;
int nb_rb_set = 0;
int sf;
int threequarter_fs=0;
static int threequarter_fs=0;
int ndi;
opp_enabled=1; // to enable the time meas
sched_resp.DL_req = &DL_req;
sched_resp.UL_req = &UL_req;
sched_resp.HI_DCI0_req = &HI_DCI0_req;
sched_resp.TX_req = &TX_req;
memset((void*)&DL_req,0,sizeof(DL_req));
memset((void*)&UL_req,0,sizeof(UL_req));
memset((void*)&HI_DCI0_req,0,sizeof(HI_DCI0_req));
memset((void*)&TX_req,0,sizeof(TX_req));
memset((void *)&DL_req,0,sizeof(DL_req));
memset((void *)&UL_req,0,sizeof(UL_req));
memset((void *)&HI_DCI0_req,0,sizeof(HI_DCI0_req));
memset((void *)&TX_req,0,sizeof(TX_req));
UL_req.ul_config_request_body.ul_config_pdu_list = ul_config_pdu_list;
TX_req.tx_request_body.tx_pdu_list = tx_pdu_list;
cpu_freq_GHz = (double)get_cpu_freq_GHz();
cpuf = cpu_freq_GHz;
printf("Detected cpu_freq %f GHz\n",cpu_freq_GHz);
AssertFatal(load_configmodule(argc,argv) != NULL,
"cannot load configuration module, exiting\n");
logInit();
// enable these lines if you need debug info
// however itti will catch all signals, so ctrl-c won't work anymore
// alternatively you can disable ITTI completely in CMakeLists.txt
//itti_init(TASK_MAX, THREAD_MAX, MESSAGES_ID_MAX, tasks_info, messages_info, messages_definition_xml, NULL);
//set_comp_log(PHY,LOG_DEBUG,LOG_MED,1);
//set_glog(LOG_DEBUG,LOG_MED);
while ((c = getopt (argc, argv, "hapZEbm:n:Y:X:x:s:w:e:q:d:D:O:c:r:i:f:y:c:oA:C:R:g:N:l:S:T:QB:PI:LF")) != -1) {
switch (c) {
case 'a':
channel_model = AWGN;
chMod = 1;
break;
case 'b':
bundling_flag = 0;
break;
case 'd':
delay = atoi(optarg);
break;
case 'D':
maxDoppler = atoi(optarg);
break;
case 'm':
mcs = atoi(optarg);
break;
case 'n':
n_frames = atoi(optarg);
break;
case 'Y':
n_ch_rlz = atoi(optarg);
break;
case 'X':
abstx= atoi(optarg);
break;
case 'g':
sprintf(channel_model_input,optarg,10);
switch((char)*optarg) {
case 'A':
channel_model=SCM_A;
chMod = 2;
break;
case 'B':
channel_model=SCM_B;
chMod = 3;
break;
case 'C':
channel_model=SCM_C;
chMod = 4;
break;
case 'D':
channel_model=SCM_D;
chMod = 5;
//hapZEbm:n:Y:X:x:s:w:e:q:d:D:O:c:r:i:f:y:c:oA:C:R:g:N:l:S:T:QB:PI:LF
static paramdef_t options[] = {
{ "awgn", "Additive white gaussian noise", PARAMFLAG_BOOL, strptr:NULL, defintval:0, TYPE_INT, 0, NULL, NULL },
{ "BnbRBs", "The LTE bandwith in RBs (100 is 20MHz)",0, iptr:&N_RB_DL, defintval:25, TYPE_INT, 0 },
{ "mcs", "The MCS to use", 0, iptr:&mcs, defintval:10, TYPE_INT, 0 },
{ "nb_frame", "number of frame in a test",0, iptr:&n_frames, defintval:1, TYPE_INT, 0 },
{ "snr", "starting snr", 0, dblptr:&snr0, defdblval:-2.9, TYPE_DOUBLE, 0 },
{ "w_snr_int", "snr int ?", 0, dblptr:&snr_int, defdblval:30, TYPE_DOUBLE, 0 },
{ "e_snr_step", "step increasint snr",0, dblptr:&input_snr_step, defdblval:0.2, TYPE_DOUBLE, 0 },
{ "rb_dynamic", "number of rb in dynamic allocation",0, iptr:NULL, defintval:0, TYPE_INT, 0 },
{ "first_rb", "first rb used in dynamic allocation",0, iptr:&first_rb, defintval:0, TYPE_INT, 0 },
{ "osrs", "enable srs generation",PARAMFLAG_BOOL, iptr:&srs_flag, defintval:0, TYPE_INT, 0 },
{ "gchannel", "[A:M] Use 3GPP 25.814 SCM-A/B/C/D('A','B','C','D') or 36-101 EPA('E'), EVA ('F'),ETU('G') models (ignores delay spread and Ricean factor), Rayghleigh8 ('H'), Rayleigh1('I'), Rayleigh1_corr('J'), Rayleigh1_anticorr ('K'), Rice8('L'), Rice1('M')",0, strptr:NULL, defstrval:NULL, TYPE_STRING, 0 },
{ "delay_chan", "Channel delay",0, iptr:&delay, defintval:0, TYPE_INT, 0 },
{ "Doppler", "Maximum doppler shift",0, dblptr:&maxDoppler, defdblval:0.0, TYPE_DOUBLE, 0 },
{ "Zdump", "dump table",PARAMFLAG_BOOL, iptr:&dump_table, defintval:0, TYPE_INT, 0 },
{ "Forms", "Display the soft scope", PARAMFLAG_BOOL, iptr:&xforms, defintval:0, TYPE_INT, 0 },
{ "Lparallel", "Enable parallel execution", PARAMFLAG_BOOL, iptr:&parallel_flag, defintval:0, TYPE_INT, 0 },
{ "Iterations", "Number of iterations of turbo decoder", 0, iptr:&max_turbo_iterations, defintval:4, TYPE_INT, 0 },
{ "Performance", "Display CPU perfomance of each L1 piece", PARAMFLAG_BOOL, iptr:NULL, defintval:0, TYPE_INT, 0 },
{ "Q_cqi", "Enable CQI", PARAMFLAG_BOOL, iptr:&cqi_flag, defintval:0, TYPE_INT, 0 },
{ "prefix_extended","Extended prefix", PARAMFLAG_BOOL, iptr:&extended_prefix_flag, defintval:0, TYPE_INT, 0 },
{ "RI_beta", "TBD", 0, iptr:NULL, defintval:0, TYPE_INT, 0 },
{ "CQI_beta", "TBD",0, iptr:NULL, defintval:0, TYPE_INT, 0 },
{ "ACK_beta", "TBD",0, iptr:NULL, defintval:0, TYPE_INT, 0 },
{ "input_file", "input IQ data file",0, iptr:NULL, defintval:0, TYPE_INT, 0 },
{ "N0", "N0",0, iptr:&N0, defintval:30, TYPE_INT, 0 },
{ "EsubSampling","three quarters sub-sampling",PARAMFLAG_BOOL, iptr:&threequarter_fs, defintval:0, TYPE_INT, 0 },
{ "TDD", "Enable TDD and set the tdd configuration mode",0, iptr:NULL, defintval:25, TYPE_INT, 0 },
{ "Subframe", "subframe to use",0, iptr:&subframe, defintval:3, TYPE_INT, 0 },
{ "xTransmission","transmission mode (1 or 2 are supported)",0, iptr:NULL, defintval:25, TYPE_INT, 0 },
{ "yN_rx", "TBD: n_rx",0, iptr:&n_rx, defintval:1, TYPE_INT, 0 },
{ "bundling_disable", "bundling disable",PARAMFLAG_BOOL, iptr:&disable_bundling, defintval:0, TYPE_INT, 0 },
{ "Y", "n_ch_rlz",0, iptr:&n_ch_rlz, defintval:1, TYPE_INT, 0 },
{ "X", "abstx", PARAMFLAG_BOOL, iptr:&abstx, defintval:0, TYPE_INT, 0 },
{ "Operf", "test perf mode ?",0, iptr:&test_perf, defintval:0, TYPE_INT, 0 },
{ "verbose", "display debug text", PARAMFLAG_BOOL, iptr:&verbose, defintval:0, TYPE_INT, 0 },
{ "", "",0, iptr:NULL, defintval:0, TYPE_INT, 0 },
};
int l;
for(l=0; options[l].optname[0]!=0; l++) {};
struct