Commit eccb96c4 authored by Cedric Roux's avatar Cedric Roux

bugfix: fix UL over scheduling

There is too much UL scheduling because the buffer status is
overestimated.

This commit tries to make things simpler.
parent be8d32d5
......@@ -665,7 +665,7 @@ typedef struct {
/// mcs from last UL scheduling
uint8_t mcs_UL[8];
/// TBS from last UL scheduling
uint8_t TBS_UL[8];
int TBS_UL[8];
/// Flag to indicate UL has been scheduled at least once
boolean_t ul_active;
/// Flag to indicate UE has been configured (ACK from RRCConnectionSetup received)
......@@ -720,9 +720,6 @@ typedef struct {
// Logical channel info for link with RLC
/// Last received UE BSR info for each logical channel group id
uint8_t bsr_info[MAX_NUM_LCGID];
/// LCGID mapping
long lcgidmap[11];
......@@ -749,8 +746,6 @@ typedef struct {
/// size of remaining size to send for the downlink head SDU
uint32_t dl_buffer_head_sdu_remaining_size_to_send[MAX_NUM_LCID];
/// total uplink buffer size
uint32_t ul_total_buffer;
/// uplink buffer creation time for each LCID
uint32_t ul_buffer_creation_time[MAX_NUM_LCGID];
/// maximum uplink buffer creation time across all the LCIDs
......@@ -758,6 +753,11 @@ typedef struct {
/// uplink buffer size per LCID
uint32_t ul_buffer_info[MAX_NUM_LCGID];
/// uplink bytes that are currently scheduled
int scheduled_ul_bytes;
/// estimation of the UL buffer size
int estimated_ul_buffer;
/// UE tx power
int32_t ue_tx_power;
......
......@@ -2483,14 +2483,15 @@ UE_is_to_be_scheduled(module_id_t module_idP, int CC_id, uint8_t UE_id)
LOG_D(MAC, "[eNB %d][PUSCH] Checking UL requirements UE %d/%x\n",
module_idP, UE_id, UE_RNTI(module_idP, UE_id));
if ((UE_template->bsr_info[LCGID0] > 0) || (UE_template->bsr_info[LCGID1] > 0) || (UE_template->bsr_info[LCGID2] > 0) || (UE_template->bsr_info[LCGID3] > 0) || (UE_template->ul_SR > 0) || // uplink scheduling request
if ((UE_template->scheduled_ul_bytes < UE_template->estimated_ul_buffer) ||
(UE_template->ul_SR > 0) || // uplink scheduling request
((UE_sched_ctl->ul_inactivity_timer > 20) && (UE_sched_ctl->ul_scheduled == 0)) || // every 2 frames when RRC_CONNECTED
((UE_sched_ctl->ul_inactivity_timer > 10) && (UE_sched_ctl->ul_scheduled == 0) && (mac_eNB_get_rrc_status(module_idP, UE_RNTI(module_idP, UE_id)) < RRC_CONNECTED))) // every Frame when not RRC_CONNECTED
{
LOG_D(MAC,
"[eNB %d][PUSCH] UE %d/%x should be scheduled (BSR0 %d,SR %d)\n",
"[eNB %d][PUSCH] UE %d/%x should be scheduled (SRB0 estimated size %d,SR %d)\n",
module_idP, UE_id, UE_RNTI(module_idP, UE_id),
UE_template->bsr_info[LCGID0], UE_template->ul_SR);
UE_template->ul_buffer_info[LCGID0], UE_template->ul_SR);
return (1);
} else {
return (0);
......
This diff is collapsed.
......@@ -1590,9 +1590,11 @@ assign_max_mcs_min_rb(module_id_t module_idP, int frameP,
to_prb(RC.mac[module_idP]->common_channels[CC_id].
ul_Bandwidth);
// if this UE has UL traffic
if (UE_template->ul_total_buffer > 0) {
int bytes_to_schedule = UE_template->estimated_ul_buffer - UE_template->scheduled_ul_bytes;
if (bytes_to_schedule < 0) bytes_to_schedule = 0;
int bits_to_schedule = bytes_to_schedule * 8;
if (bits_to_schedule > 0) {
tbs = get_TBS_UL(mcs, 3) << 3; // 1 or 2 PRB with cqi enabled does not work well!
rb_table_index = 2;
......@@ -1602,7 +1604,7 @@ assign_max_mcs_min_rb(module_id_t module_idP, int frameP,
Ncp, 0);
while ((((UE_template->phr_info - tx_power) < 0)
|| (tbs > UE_template->ul_total_buffer))
|| (tbs > bits_to_schedule))
&& (mcs > 3)) {
// LOG_I(MAC,"UE_template->phr_info %d tx_power %d mcs %d\n", UE_template->phr_info,tx_power, mcs);
mcs--;
......@@ -1610,7 +1612,7 @@ assign_max_mcs_min_rb(module_id_t module_idP, int frameP,
tx_power = estimate_ue_tx_power(tbs, rb_table[rb_table_index], 0, Ncp, 0); // fixme: set use_srs
}
while ((tbs < UE_template->ul_total_buffer) &&
while ((tbs < bits_to_schedule) &&
(rb_table[rb_table_index] <
(N_RB_UL - first_rb[CC_id]))
&& ((UE_template->phr_info - tx_power) > 0)
......@@ -1700,11 +1702,14 @@ static int ue_ul_compare(const void *_a, const void *_b, void *_params)
UE_list->UE_template[pCCid2][UE_id2].ul_buffer_info[LCGID0])
return 1;
if (UE_list->UE_template[pCCid1][UE_id1].ul_total_buffer >
UE_list->UE_template[pCCid2][UE_id2].ul_total_buffer)
int bytes_to_schedule1 = UE_list->UE_template[pCCid1][UE_id1].estimated_ul_buffer - UE_list->UE_template[pCCid1][UE_id1].scheduled_ul_bytes;
if (bytes_to_schedule1 < 0) bytes_to_schedule1 = 0;
int bytes_to_schedule2 = UE_list->UE_template[pCCid2][UE_id2].estimated_ul_buffer - UE_list->UE_template[pCCid2][UE_id2].scheduled_ul_bytes;
if (bytes_to_schedule2 < 0) bytes_to_schedule2 = 0;
if (bytes_to_schedule1 > bytes_to_schedule2)
return -1;
if (UE_list->UE_template[pCCid1][UE_id1].ul_total_buffer <
UE_list->UE_template[pCCid2][UE_id2].ul_total_buffer)
if (bytes_to_schedule1 < bytes_to_schedule2)
return 1;
if (UE_list->UE_template[pCCid1][UE_id1].pre_assigned_mcs_ul >
......
......@@ -217,11 +217,11 @@ int dump_eNB_l2_stats(char *buffer, int length)
UE_list->eNB_UE_stats[CC_id][UE_id].num_errors_rx);
len+= sprintf(&buffer[len],"[MAC] Received PHR PH = %d (db)\n", UE_list->UE_template[CC_id][UE_id].phr_info);
len+= sprintf(&buffer[len],"[MAC] Received BSR LCGID[0][1][2][3] = %u %u %u %u\n",
UE_list->UE_template[CC_id][UE_id].bsr_info[LCGID0],
UE_list->UE_template[CC_id][UE_id].bsr_info[LCGID1],
UE_list->UE_template[CC_id][UE_id].bsr_info[LCGID2],
UE_list->UE_template[CC_id][UE_id].bsr_info[LCGID3]
len+= sprintf(&buffer[len],"[MAC] Estimated size LCGID[0][1][2][3] = %u %u %u %u\n",
UE_list->UE_template[CC_id][UE_id].ul_buffer_info[LCGID0],
UE_list->UE_template[CC_id][UE_id].ul_buffer_info[LCGID1],
UE_list->UE_template[CC_id][UE_id].ul_buffer_info[LCGID2],
UE_list->UE_template[CC_id][UE_id].ul_buffer_info[LCGID3]
);
}
......
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