Commit faa111ec authored by knopp's avatar knopp

complete programming of Msg2/Msg4 procedures for eMTC. Addition of skeleton...

complete programming of Msg2/Msg4 procedures for eMTC. Addition of skeleton for PUCCH UCI (NFAPI) in L1. Some cleanup of eNB_scheduler.c
parent 41f864ef
......@@ -1566,7 +1566,7 @@ ${OPENAIR1_DIR}/SIMULATION/ETH_TRANSPORT/netlink_init.c
${OPENAIR1_DIR}/SIMULATION/ETH_TRANSPORT/multicast_link.c
${OPENAIR1_DIR}/SIMULATION/ETH_TRANSPORT/socket.c
${OPENAIR1_DIR}/SIMULATION/ETH_TRANSPORT/bypass_session_layer.c
${OPENAIR1_DIR}/SIMULATION/ETH_TRANSPORT/emu_transport.c
#${OPENAIR1_DIR}/SIMULATION/ETH_TRANSPORT/emu_transport.c
${OPENAIR1_DIR}/SIMULATION/ETH_TRANSPORT/pgm_link.c
)
......
......@@ -493,6 +493,73 @@ typedef struct {
int32_t delta_TF;
} LTE_UL_eNB_HARQ_t;
typedef enum {
pucch_format1=0,
pucch_format1a,
pucch_format1b,
pucch_format2,
pucch_format2a,
pucch_format2b,
pucch_format3 // PUCCH format3
} PUCCH_FMT_t;
typedef enum {
SR,
HARQ,
CQI,
HARQ_SR,
HARQ_CQI,
SR_CQI,
HARQ_SR_CQI
} UCI_type_t;
#ifdef Rel14
typedef enum {
NOCE,
CEMODEA,
CEMODEB
} UE_type_t;
#endif
typedef struct {
uint8_t active;
/// Absolute frame for this UCI
uint16_t frame;
/// Absolute subframe for this UCI
uint8_t subframe;
/// corresponding UE RNTI
uint16_t rnti;
/// Type (SR,HARQ,CQI,HARQ_SR,HARQ_CQI,SR_CQI,HARQ_SR_CQI)
UCI_type_t type;
/// PUCCH format to use
PUCCH_FMT_t pucch_fmt;
/// antenna indicator
uint8_t num_pucch_resources;
/// two antenna n1_pucch
uint16_t n_pucch_1[2];
/// two antenna n2_pucch
uint16_t n_pucch_2[2];
#ifdef Rel14
/// non BL/CE, CEmodeA, CEmodeB
UE_type_t ue_type;
/// Indicates the symbols that are left empty due to eMTC retuning.
uint8_t empty_symbols;
/// number of repetitions for BL/CE
uint16_t total_repetitions;
/// The size of the DL CQI/PMI in bits.
uint16_t dl_cqi_pmi_size2;
/// The starting PRB for the PUCCH
uint8_t starting_prb;
/// The number of PRB in PUCCH
uint8_t n_PRB;
/// Selected CDM option
uint8_t cdm_Index;
// Indicates if the resource blocks allocated for this grant overlap with the SRS configuration.
uint8_t Nsrs;
#endif
} LTE_eNB_UCI_t;
typedef struct {
/// HARQ process mask, indicates which processes are currently active
uint16_t harq_mask;
......@@ -764,15 +831,6 @@ typedef enum {
rx_SIC_dual_stream
} RX_type_t;
typedef enum {
pucch_format1=0,
pucch_format1a,
pucch_format1b,
pucch_format2,
pucch_format2a,
pucch_format2b,
pucch_format3 // PUCCH format3
} PUCCH_FMT_t;
......
......@@ -120,8 +120,6 @@ LTE_eNB_DLSCH_t *new_eNB_dlsch(unsigned char Kmimo,unsigned char Mdlharq,uint32_
unsigned char exit_flag = 0,i,j,r,aa,layer;
int re;
unsigned char bw_scaling =1;
RU_t *ru;
int ru_id;
switch (N_RB_DL) {
case 6:
......
......@@ -233,6 +233,8 @@ typedef struct DCI6_1A_20MHz DCI6_1A_20MHz_t;
/// basic DCI Format Type 6-0B (5 MHz)
struct DCI6_0B_5MHz {
/// padding to fill 32-bit word
uint32_t padding:15;
/// DCI subframe repetition
uint32_t dci_rep:2;
/// new data indicator
......@@ -240,7 +242,7 @@ struct DCI6_0B_5MHz {
/// harq id
uint32_t harq_pid:1;
/// Repetition number
uint32_t rep:2;
uint32_t rep:3;
/// Modulation and Coding Scheme and Redundancy Version
uint32_t mcs:4;
/// RB Assignment (ceil(log2(floor(N_RB_UL/6))) + 3 bits)
......@@ -250,10 +252,12 @@ struct DCI6_0B_5MHz {
} __attribute__ ((__packed__));
typedef struct DCI6_0B_5MHz DCI6_0B_5MHz_t;
#define sizeof_DCI6_0B_5MHz_t 16
#define sizeof_DCI6_0B_5MHz_t 17
/// basic DCI Format Type 6-1B (5 MHz)
struct DCI6_1B_5MHz {
/// padding to fill 32-bit word
uint32_t padding:15;
/// DCI subframe repetition number
uint32_t dci_rep:2;
/// HARQ-ACK resource offset
......@@ -263,7 +267,7 @@ struct DCI6_1B_5MHz {
/// HARQ Process
uint32_t harq_pid:1;
/// Repetition number
uint32_t rep:2;
uint32_t rep:3;
/// Resource block assignment (assignment flag = 0 for 5 MHz, ceil(log2(floor(N_RB_DL/6)))+1)
uint32_t rballoc:3;
/// Modulation and Coding Scheme and Redundancy Version
......@@ -273,12 +277,12 @@ struct DCI6_1B_5MHz {
} __attribute__ ((__packed__));
typedef struct DCI6_1B_5MHz DCI6_1B_5MHz_t;
#define sizeof_DCI6_1B_5MHz_t 16
#define sizeof_DCI6_1B_5MHz_t 17
/// basic DCI Format Type 6-0B (10 MHz)
struct DCI6_0B_10MHz {
/// padding to fill 32-bit word
uint32_t padding:15;
uint32_t padding:14;
/// DCI subframe repetition
uint32_t dci_rep:2;
/// new data indicator
......@@ -286,7 +290,7 @@ struct DCI6_0B_10MHz {
/// harq id
uint32_t harq_pid:1;
/// Repetition number
uint32_t rep:2;
uint32_t rep:3;
/// Modulation and Coding Scheme and Redundancy Version
uint32_t mcs:4;
/// RB Assignment (ceil(log2(floor(N_RB_UL/6))) + 3 bits)
......@@ -296,7 +300,7 @@ struct DCI6_0B_10MHz {
} __attribute__ ((__packed__));
typedef struct DCI6_0B_10MHz DCI6_0B_10MHz_t;
#define sizeof_DCI6_0B_10MHz_t 17
#define sizeof_DCI6_0B_10MHz_t 18
/// basic DCI Format Type 6-1B (10 MHz)
struct DCI6_1B_10MHz {
......
......@@ -2188,5 +2188,7 @@ int8_t find_dlsch(uint16_t rnti, PHY_VARS_eNB *eNB,find_type_t type);
int8_t find_ulsch(uint16_t rnti, PHY_VARS_eNB *eNB,find_type_t type);
int8_t find_uci(uint16_t rnti, int frame, int subframe, PHY_VARS_eNB *eNB,find_type_t type);
/**@}*/
#endif
......@@ -844,4 +844,21 @@ void print_CQI(void *o,UCI_format_t uci_format,unsigned char eNB_id,int N_RB_DL)
}
int8_t find_uci(uint16_t rnti, int frame, int subframe, PHY_VARS_eNB *eNB,find_type_t type) {
uint8_t i;
int8_t first_free_index=-1;
AssertFatal(eNB!=NULL,"eNB is null\n");
for (i=0; i<NUMBER_OF_UE_MAX; i++) {
if ((eNB->uci_vars[i].active >0) &&
(eNB->uci_vars[i].rnti==rnti) &&
(eNB->uci_vars[i].frame==frame) &&
(eNB->uci_vars[i].subframe==subframe)) return(i);
else if ((eNB->uci_vars[i].active == 0) && (first_free_index==-1)) first_free_index=i;
}
if (type == SEARCH_EXIST) return(-1);
else return(first_free_index);
}
......@@ -888,15 +888,9 @@ typedef struct PHY_VARS_eNB_s {
/// Ethernet parameters for fronthaul interface
eth_params_t eth_params;
int rx_total_gain_dB;
// void (*do_prach)(struct PHY_VARS_eNB_s *eNB,struct RU_t_s *ru,int frame, int subframe);
int (*td)(struct PHY_VARS_eNB_s *eNB,int UE_id,int harq_pid,int llr8_flag);
int (*te)(struct PHY_VARS_eNB_s *,uint8_t *,uint8_t,LTE_eNB_DLSCH_t *,int,uint8_t,time_stats_t *,time_stats_t *,time_stats_t *);
// void (*proc_uespec_rx)(struct PHY_VARS_eNB_s *eNB,eNB_rxtx_proc_t *proc,const relaying_type_t r_type);
// void (*proc_tx)(struct PHY_VARS_eNB_s *eNB,eNB_rxtx_proc_t *proc,relaying_type_t r_type,PHY_VARS_RN *rn);
// void (*tx_fh)(struct PHY_VARS_eNB_s *eNB,eNB_rxtx_proc_t *proc);
// void (*rx_fh)(struct PHY_VARS_eNB_s *eNB,int *frame, int *subframe);
int (*start_if)(struct RU_t_s *ru,struct PHY_VARS_eNB_s *eNB);
// void (*fh_asynch)(struct PHY_VARS_eNB_s *eNB,int *frame, int *subframe);
uint8_t local_flag;
LTE_DL_FRAME_PARMS frame_parms;
PHY_MEASUREMENTS_eNB measurements;
......@@ -921,6 +915,7 @@ typedef struct PHY_VARS_eNB_s {
LTE_eNB_PRACH prach_vars_br;
#endif
LTE_eNB_COMMON common_vars;
LTE_eNB_UCI_t uci_vars[NUMBER_OF_UE_MAX];
LTE_eNB_SRS srs_vars[NUMBER_OF_UE_MAX];
LTE_eNB_PBCH pbch;
LTE_eNB_PUSCH *pusch_vars[NUMBER_OF_UE_MAX];
......
......@@ -1065,6 +1065,10 @@ handle_nfapi_dlsch_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
#endif
}
handle_uci_harq_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,nfapi_ul_config_request_pdu_t *ul_config_pdu) {
}
handle_nfapi_ul_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
nfapi_ul_config_request_pdu_t *ul_config_pdu) {
......@@ -1072,10 +1076,32 @@ handle_nfapi_ul_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
int8_t UE_id;
// check if we have received a dci for this ue and ulsch descriptor is configured
if (ul_config_pdu == NFAPI_UL_CONFIG_ULSCH_PDU_TYPE) {
AssertFatal((UE_id = find_ulsch(rel8->rnti,eNB,SEARCH_EXIST))>=0,
"No existing UE ULSCH for rnti %x\n",rel8->rnti);
AssertFatal(eNB->ulsch[UE_id]->harq_mask > 0,
"ulsch for UE_id %d is not active\n",UE_id);
}
else if (ul_config_pdu == NFAPI_UL_CONFIG_UCI_HARQ_PDU_TYPE) {
AssertFatal((UE_id = find_uci(rel8->rnti,proc->frame_tx,proc->subframe_tx,eNB,SEARCH_EXIST))>=0,
"No existing UE UCI for rnti %x\n",rel8->rnti);
handle_uci_harq_pdu(eNB,proc,ul_config_pdu);
}
else if (ul_config_pdu == NFAPI_UL_CONFIG_UCI_CQI_PDU_TYPE) {
}
else if (ul_config_pdu == NFAPI_UL_CONFIG_UCI_CQI_HARQ_PDU_TYPE) {
}
else if (ul_config_pdu == NFAPI_UL_CONFIG_UCI_CQI_SR_PDU_TYPE) {
}
else if (ul_config_pdu == NFAPI_UL_CONFIG_UCI_SR_PDU_TYPE) {
}
else if (ul_config_pdu == NFAPI_UL_CONFIG_UCI_SR_HARQ_PDU_TYPE) {
}
}
......@@ -1227,7 +1253,8 @@ void schedule_response(Sched_Rsp_t *Sched_INFO) {
for (i=0;i<number_ul_pdu;i++) {
ul_config_pdu = &UL_req->ul_config_request_body.ul_config_pdu_list[i];
LOG_D(PHY,"NFAPI: ul_pdu %d : type %d\n",i,ul_config_pdu->pdu_type);
AssertFatal(ul_config_pdu->pdu_type == NFAPI_UL_CONFIG_ULSCH_PDU_TYPE,
AssertFatal(ul_config_pdu->pdu_type == NFAPI_UL_CONFIG_ULSCH_PDU_TYPE ||
ul_config_pdu->pdu_type == NFAPI_UL_CONFIG_UCI_HARQ_PDU_TYPE,
"Optional UL_PDU type %d not supported\n",ul_config_pdu->pdu_type);
handle_nfapi_ul_pdu(eNB,proc,ul_config_pdu);
}
......@@ -1524,6 +1551,8 @@ void process_HARQ_feedback(uint8_t UE_id,
int subframe = proc->subframe_rx;
int harq_pid = subframe2harq_pid( fp,frame,subframe);
nfapi_harq_indication_pdu_t *pdu;
if (fp->frame_type == FDD) { //FDD
subframe_m4 = (subframe<4) ? subframe+6 : subframe-4;
......@@ -1546,6 +1575,9 @@ void process_HARQ_feedback(uint8_t UE_id,
*/
}
// fill ACK/NAK Indication
pdu = &eNB->UL_INFO.harq_ind.harq_pdu_list[eNB->UL_INFO.harq_ind.number_of_harqs];
eNB->UL_INFO.harq_ind.number_of_harqs++;
#if defined(MESSAGE_CHART_GENERATOR_PHY)
MSC_LOG_RX_MESSAGE(
......@@ -1578,6 +1610,7 @@ void process_HARQ_feedback(uint8_t UE_id,
?eNB->ulsch[(uint8_t)UE_id]->harq_processes[harq_pid]->o_ACK[0]:eNB->ulsch[(uint8_t)UE_id]->harq_processes[harq_pid]->o_ACK[1];
}
else { // PUCCH ACK/NAK
if ((SR_payload == 1)&&(pucch_sel!=2)) { // decode Table 7.3 if multiplexing and SR=1
nb_ACK = 0;
......@@ -2752,8 +2785,6 @@ void phy_procedures_eNB_uespec_RX(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,const
frame,subframe, i,
ulsch_harq->round-1);
dump_ulsch(eNB,proc,i);
exit(-1);
LOG_D(PHY,"[eNB %d][PUSCH %d] frame %d subframe %d RNTI %x RX power (%d,%d) RSSI (%d,%d) N0 (%d,%d) dB ACK (%d,%d), decoding iter %d\n",
eNB->Mod_id,harq_pid,
......@@ -2768,46 +2799,6 @@ void phy_procedures_eNB_uespec_RX(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,const
ulsch_harq->o_ACK[0],
ulsch_harq->o_ACK[1],
ret);
/*
if (ulsch_harq->round ==
fp->maxHARQ_Msg3Tx) {
LOG_D(PHY,"[eNB %d][RAPROC] maxHARQ_Msg3Tx reached, abandoning RA procedure for UE %d\n",
eNB->Mod_id, i);
eNB->UE_stats[i].mode = PRACH;
// if (eNB->mac_enabled==1) {
// mac_xface->cancel_ra_proc(eNB->Mod_id,
// eNB->CC_id,
// frame,
// eNB->UE_stats[i].crnti);
//
// }
// mac_phy_remove_ue(eNB->Mod_id,eNB->UE_stats[i].crnti);
eNB->ulsch[(uint32_t)i]->Msg3_active = 0;
//ulsch_harq->phich_active = 0;
} else {
// activate retransmission for Msg3 (signalled to UE PHY by PHICH (not MAC/DCI)
eNB->ulsch[(uint32_t)i]->Msg3_active = 1;
get_Msg3_alloc_ret(fp,
subframe,
frame,
&ulsch_harq->frame,
&ulsch_harq->subframe);
//mac_xface->set_msg3_subframe(eNB->Mod_id, eNB->CC_id, frame, subframe, eNB->ulsch[i]->rnti,
// eNB->ulsch[i]->Msg3_frame, eNB->ulsch[i]->Msg3_subframe);
T(T_ENB_PHY_MSG3_ALLOCATION, T_INT(eNB->Mod_id), T_INT(frame), T_INT(subframe),
T_INT(i), T_INT(ulsch->rnti), T_INT(0
// 0 is for retransmission
),
T_INT(eNB->ulsch[i]->Msg3_frame), T_INT(eNB->ulsch[i]->Msg3_subframe));
}
*/
LOG_D(PHY,"[eNB] Frame %d, Subframe %d: Msg3 in error, i = %d \n", frame,subframe,i);
} // This is Msg3 error
......@@ -2842,23 +2833,6 @@ void phy_procedures_eNB_uespec_RX(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,const
eNB->UE_stats[i].ulsch_errors[harq_pid]++;
eNB->UE_stats[i].ulsch_consecutive_errors++;
/*if (ulsch_harq->nb_rb > 20) {
dump_ulsch(eNB,proc,i);
exit(-1);
}*/
// indicate error to MAC
if (eNB->mac_enabled == 1) {
/*
mac_xface->rx_sdu(eNB->Mod_id,
eNB->CC_id,
frame,subframe,
ulsch->rnti,
NULL,
0,
harq_pid,
&eNB->ulsch[i]->Msg3_flag);
*/
}
}
}
} // ulsch in error
......@@ -2920,29 +2894,11 @@ void phy_procedures_eNB_uespec_RX(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,const
eNB->Mod_id,
frame,harq_pid,i);
if (eNB->mac_enabled) {
/*
mac_xface->rx_sdu(eNB->Mod_id,
eNB->CC_id,
frame,subframe,
eNB->ulsch[i]->rnti,
ulsch_harq->b,
ulsch_harq->TBS>>3,
harq_pid,
&ulsch->Msg3_flag);
*/
// Fill UL info
}
// one-shot msg3 detection by MAC: empty PDU (e.g. CRNTI)
if (ulsch_harq->Msg3_flag == 0 ) {
eNB->UE_stats[i].mode = PRACH;
/*
mac_xface->cancel_ra_proc(eNB->Mod_id,
eNB->CC_id,
frame,
eNB->UE_stats[i].crnti);
mac_phy_remove_ue(eNB->Mod_id,eNB->UE_stats[i].crnti);
*/
eNB->ulsch[(uint32_t)i]->Msg3_active = 0;
} // Msg3_flag == 0
......@@ -2984,26 +2940,12 @@ void phy_procedures_eNB_uespec_RX(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,const
harq_pid,ulsch_harq->TBS>>3);
for (j=0; j<ulsch_harq->TBS>>3; j++)
LOG_T(PHY,"%x.",eNB->ulsch[i]->harq_processesyy[harq_pid]->b[j]);
LOG_T(PHY,"%x.",eNB->ulsch[i]->harq_processes[harq_pid]->b[j]);
LOG_T(PHY,"\n");
#endif
#endif
if (eNB->mac_enabled==1) {
/*
mac_xface->rx_sdu(eNB->Mod_id,
eNB->CC_id,
frame,subframe,
ulsch->rnti,
eNB->ulsch[i]->harq_processes[harq_pid]->b,
eNB->ulsch[i]->harq_processes[harq_pid]->TBS>>3,
harq_pid,
NULL);*/
// Fill UL_INFO
} // mac_enabled==1
} // Msg3_flag == 0
......
......@@ -827,15 +827,15 @@ typedef struct {
/// Subframe where Msg2 is to be sent
uint8_t Msg2_subframe;
/// Frame where Msg2 is to be sent
uint8_t Msg2_frame;
frame_t Msg2_frame;
/// Subframe where Msg3 is to be sent
uint8_t Msg3_subframe;
sub_frame_t Msg3_subframe;
/// Frame where Msg3 is to be sent
uint8_t Msg3_frame;
frame_t Msg3_frame;
/// Subframe where Msg4 is to be sent
uint8_t Msg4_subframe;
sub_frame_t Msg4_subframe;
/// Frame where Msg4 is to be sent
uint8_t Msg4_frame;
frame_t Msg4_frame;
/// Flag to indicate the eNB should generate Msg4 upon reception of SDU from RRC. This is triggered by first ULSCH reception at eNB for new user.
uint8_t generate_Msg4;
/// Flag to indicate that eNB is waiting for ACK that UE has received Msg3.
......@@ -854,6 +854,10 @@ typedef struct {
int16_t RRC_timer;
/// Round of Msg3 HARQ
uint8_t msg3_round;
/// TBS used for Msg4
int Msg4_TBsize;
/// MCS used for Msg4
int Msg4_mcs;
#ifdef Rel14
uint8_t rach_resource_type;
uint8_t msg2_mpdcch_repetition_cnt;
......
This diff is collapsed.
......@@ -143,7 +143,10 @@ schedule_SIB1_BR(
switch (N_RB_DL) {
case 6:
case 15:
m=1;
n_NB=0;
N_S_NB=0;
Sj=NULL;
break;
case 25:
m=2;
......@@ -305,11 +308,8 @@ schedule_SI_BR(
nfapi_dl_config_request_pdu_t *dl_config_pdu;
nfapi_tx_request_pdu_t *TX_req;
nfapi_dl_config_request_body_t *dl_req;
int m,i,N_S_NB;
int *Sj;
int n_NB = 0;
int TBS;
int k,rvidx;
int i;
int rvidx;
......@@ -378,7 +378,7 @@ schedule_SI_BR(
if (bcch_sdu_length > 0) {
AssertFatal(bcch_sdu_length <= (si_TBS_r13>>3),
"RRC provided bcch with length %d > %d\n",
bcch_sdu_length,(si_TBS_r13>>3));
bcch_sdu_length,(int)(si_TBS_r13>>3));
LOG_D(MAC,"[eNB %d] Frame %d : BCCH_BR %d->DLSCH CC_id %d, Received %d bytes \n",module_idP,frameP,i,CC_id,bcch_sdu_length);
// allocate all 6 PRBs in narrowband for SIB1_BR
......
......@@ -98,10 +98,10 @@ uint16_t mac_computeRIV(uint16_t N_RB_DL,uint16_t RBstart,uint16_t Lcrbs) {
}
void get_Msg3alloc(COMMON_channels_t *cc,
unsigned char current_subframe,
unsigned int current_frame,
unsigned int *frame,
unsigned char *subframe)
sub_frame_t current_subframe,
frame_t current_frame,
frame_t *frame,
sub_frame_t *subframe)
{
// Fill in other TDD Configuration!!!!
......@@ -211,10 +211,10 @@ void get_Msg3alloc(COMMON_channels_t *cc,
void get_Msg3allocret(COMMON_channels_t *cc,
unsigned char current_subframe,
unsigned int current_frame,
unsigned int *frame,
unsigned char *subframe)
sub_frame_t current_subframe,
frame_t current_frame,
frame_t *frame,
sub_frame_t *subframe)
{
if (cc->tdd_Config == NULL) { //FDD
/* always retransmit in n+8 */
......@@ -249,7 +249,7 @@ void get_Msg3allocret(COMMON_channels_t *cc,
}
}
uint8_t subframe2harqpid(COMMON_channels_t *cc,uint32_t frame,uint8_t subframe)
uint8_t subframe2harqpid(COMMON_channels_t *cc,frame_t frame,sub_frame_t subframe)
{
uint8_t ret = 255;
......@@ -317,8 +317,8 @@ uint8_t subframe2harqpid(COMMON_channels_t *cc,uint32_t frame,uint8_t subframe)
}
uint8_t get_Msg3harqpid(COMMON_channels_t *cc,
uint32_t frame,
unsigned char current_subframe)
frame_t frame,
sub_frame_t current_subframe)
{
uint8_t ul_subframe=0;
......@@ -403,7 +403,7 @@ uint8_t get_Msg3harqpid(COMMON_channels_t *cc,
}
int is_UL_sf(COMMON_channels_t *ccP,uint8_t subframeP)
int is_UL_sf(COMMON_channels_t *ccP,sub_frame_t subframeP)
{
// if FDD return dummy value
......
......@@ -403,7 +403,7 @@ void rx_sdu(const module_id_t enb_mod_idP,
RA_template->generate_Msg4 = 1;
RA_template->wait_ack_Msg4 = 0;
// Program Msg4 PDCCH+DLSCH/MPDCCH transmission 4 subframes from now
// Program Msg4 PDCCH+DLSCH/MPDCCH transmission 4 subframes from now, // Check if this is ok for BL/CE, or if the rule is different
RA_template->Msg4_frame = frameP + ((subframeP>5) ? 1 : 0);
RA_template->Msg4_subframe = (subframeP+4)%10;
......
......@@ -230,6 +230,17 @@ unsigned short fill_rar(
const uint8_t input_buffer_length
);
#ifdef Rel14
unsigned short fill_rar_br(eNB_MAC_INST *eNB,
int CC_id,
RA_TEMPLATE *RA_template,
const frame_t frameP,
const sub_frame_t subframeP,
uint8_t* const dlsch_buffer,
const uint8_t ce_level
);
#endif
/* \brief Function to indicate a failed RA response. It removes all temporary variables related to the initial connection of a UE
@param Mod_id Instance ID of eNB
@param preamble_index index of the received RA request.
......@@ -857,19 +868,18 @@ uint16_t getRIV(uint16_t N_RB_DL,uint16_t RBstart,uint16_t Lcrbs);
int get_subbandsize(uint8_t dl_bandwidth);
uint8_t subframe2harqpid(COMMON_channels_t *cc,uint32_t frame,uint8_t subframe);
void get_Msg3allocret(COMMON_channels_t *cc,
unsigned char current_subframe,
unsigned int current_frame,
unsigned int *frame,
unsigned char *subframe);
sub_frame_t current_subframe,
frame_t current_frame,
frame_t *frame,
sub_frame_t *subframe);
void get_Msg3alloc(COMMON_channels_t *cc,
unsigned char current_subframe,
unsigned int current_frame,
unsigned int *frame,
unsigned char *subframe);
sub_frame_t current_subframe,
frame_t current_frame,
frame_t *frame,
sub_frame_t *subframe);
uint16_t mac_computeRIV(uint16_t N_RB_DL,uint16_t RBstart,uint16_t Lcrbs);
......@@ -880,8 +890,23 @@ int to_rbg(int dl_Bandwidth);
int to_prb(int dl_Bandwidth);
uint8_t get_Msg3harqpid(COMMON_channels_t *cc,
uint32_t frame,
unsigned char current_subframe);
frame_t frame,
sub_frame_t current_subframe);
int is_UL_sf(COMMON_channels_t *ccP,sub_frame_t subframeP);
uint8_t subframe2harqpid(COMMON_channels_t *cc,frame_t frame,sub_frame_t subframe);
#ifdef Rel14
int get_numnarrowbandbits(long dl_Bandwidth);
int mpdcch_sf_condition(eNB_MAC_INST *eNB,int CC_id, frame_t frameP,sub_frame_t subframeP,int rmax,MPDCCH_TYPES_t mpdcch_type);
int get_numnarrowbands(long dl_Bandwidth);
#endif
#endif
/** @}*/
......@@ -132,8 +132,8 @@ unsigned short fill_rar(
#ifdef Rel14
//------------------------------------------------------------------------------
unsigned short fill_rar_br(eNB_MAC_INST *eNB,
const int CC_id,
const int ra_idx,
int CC_id,
RA_TEMPLATE *RA_template,
const frame_t frameP,
const sub_frame_t subframeP,
uint8_t* const dlsch_buffer,
......@@ -143,44 +143,41 @@ unsigned short fill_rar_br(eNB_MAC_INST *eNB,
{
RA_HEADER_RAPID *rarh = (RA_HEADER_RAPID *)dlsch_buffer;
COMMON_channels_t *cc = &eNB->common_channels[CC_id];
uint8_t *rar = (uint8_t *)(dlsch_buffer+1);
int i;
uint8_t nb,rballoc,reps;
uint8_t mcs,TPC,ULdelay,cqireq;
COMMON_channels_t *cc = &eNB->common_channels[CC_id];
int input_buffer_length;
AssertFatal(CC_id < MAX_NUM_CCs, "CC_id %u < MAX_NUM_CCs %u", CC_id, MAX_NUM_CCs);
AssertFatal(ra_idx >= 0 && ra_idx < 4, "RA index not in [0..3]\n");
AssertFatal(RA_template != NULL, "RA is null \n");
// subheader fixed
rarh->E = 0; // First and last RAR
rarh->T = 1; // 0 for E/T/R/R/BI subheader, 1 for E/T/RAPID subheader
rarh->RAPID = cc->RA_template[ra_idx].preamble_index; // Respond to Preamble 0 only for the moment
cc->RA_template[ra_idx].timing_offset /= 16; //T_A = N_TA/16, where N_TA should be on a 30.72Msps
rar[0] = (uint8_t)(cc->RA_template[ra_idx].timing_offset>>(2+4)); // 7 MSBs of timing advance + divide by 4
rar[1] = (uint8_t)(cc->RA_template[ra_idx].timing_offset<<(4-2))&0xf0; // 4 LSBs of timing advance + divide by 4
rarh->RAPID = RA_template->preamble_index; // Respond to Preamble 0 only for the moment
RA_template->timing_offset /= 16; //T_A = N_TA/16, where N_TA should be on a 30.72Msps
rar[0] = (uint8_t)(RA_template->timing_offset>>(2+4)); // 7 MSBs of timing advance + divide by 4
rar[1] = (uint8_t)(RA_template->timing_offset<<(4-2))&0xf0; // 4 LSBs of timing advance + divide by 4
int N_NB_index;
AssertFatal(1==0,"RAR for BL/CE Still to be finished ...\n");
// Copy the Msg2 narrowband
cc->RA_template[ra_idx].msg34_narrowband = cc->RA_template[ra_idx].msg2_narrowband;
RA_template->msg34_narrowband = RA_template->msg2_narrowband;
if (ce_level<2) { //CE Level 0,1, CEmodeA
input_buffer_length =6;
N_NB_index = get_numnarrowbandbits(cc->mib->message.dl_Bandwidth);
rar[4] = (uint8_t)(cc->RA_template[ra_idx].rnti>>8);
rar[5] = (uint8_t)(cc->RA_template[ra_idx].rnti&0xff);
rar[4] = (uint8_t)(RA_template->rnti>>8);
rar[5] = (uint8_t)(RA_template->rnti&0xff);
//cc->RA_template[ra_idx].timing_offset = 0;
nb = 0;
rballoc = mac_computeRIV(6,1+ra_idx,1); // one PRB only for UL Grant in position 1+ra_idx within Narrowband
rballoc = mac_computeRIV(6,1+ce_level,1); // one PRB only for UL Grant in position 1+ce_level within Narrowband
rar[1] |= (rballoc&15)<<(4-N_NB_index); // Hopping = 0 (bit 3), 3 MSBs of rballoc
reps = 4;
......@@ -195,27 +192,26 @@ unsigned short fill_rar_br(eNB_MAC_INST *eNB,
input_buffer_length =5;
rar[3] = (uint8_t)(cc->RA_