Commit 218aec00 authored by Remi Hardy's avatar Remi Hardy
Browse files

integration_2021_wk28

MR !1197 : dongzhanyi-zte-develop1
function nr_generate_dci_top and nr_generate_dci has the frame_parms parameter, whose type is the structure NR_DL_FRAME_PARMS.
The better way is to pass the parameter as a pointer. 

MR !1176 : NR_phytest_bugfixes
This fixes a bug for configurations with less than 50 PRBs in phy-test mode.

MR !1142 : nr-dl-mimo-2layer
parents c97bb972 042e45ef
......@@ -1101,7 +1101,9 @@
(Test16: 11 PTRS, 0 Interpolated Symbols),
(Test17: Mapping type A, 2 DMRS Symbols),
(Test18: Mapping type A, 3 DMRS Symbols),
(Test19: Mapping type B, 4 DMRS Symbols)</desc>
(Test19: Mapping type B, 4 DMRS Symbols),
(Test20: 4x4 MIMO, 1 Layer),
(Test21: 4x4 MIMO, 2 Layers)</desc>
<pre_compile_prog></pre_compile_prog>
<compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</compile_prog>
<compile_prog_args> --phy_simulators -c </compile_prog_args>
......@@ -1126,8 +1128,10 @@
-n100 -s5 -T 2 0 4
-n100 -s2 -U 2 0 1
-n100 -s2 -U 2 0 2
-n100 -s2 -U 2 1 3</main_exec_args>
<tags>nr_dlsim.test1 nr_dlsim.test2 nr_dlsim.test3 nr_dlsim.test4 nr_dlsim.test5 nr_dlsim.test6 nr_dlsim.test7 nr_dlsim.test8 nr_dlsim.test9 nr_dlsim.test10 nr_dlsim.test11 nr_dlsim.test12 nr_dlsim.test13 nr_dlsim.test14 nr_dlsim.test15 nr_dlsim.test16 nr_dlsim.test17 nr_dlsim.test18 nr_dlsim.test19</tags>
-n100 -s2 -U 2 1 3
-n10 -s20 -U 3 0 0 2 -gR -x1 -y4 -z4
-n10 -s20 -U 3 0 0 2 -gR -x2 -y4 -z4</main_exec_args>
<tags>nr_dlsim.test1 nr_dlsim.test2 nr_dlsim.test3 nr_dlsim.test4 nr_dlsim.test5 nr_dlsim.test6 nr_dlsim.test7 nr_dlsim.test8 nr_dlsim.test9 nr_dlsim.test10 nr_dlsim.test11 nr_dlsim.test12 nr_dlsim.test13 nr_dlsim.test14 nr_dlsim.test15 nr_dlsim.test16 nr_dlsim.test17 nr_dlsim.test18 nr_dlsim.test19 nr_dlsim.test20 nr_dlsim.test21</tags>
<search_expr_true>PDSCH test OK</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
<nruns>3</nruns>
......@@ -1314,11 +1318,11 @@
-n100 -s5 -T 2 1 2 -U 2 0 2
-n100 -s5 -T 2 2 2 -U 2 1 2
-n100 -s5 -a4 -b8 -T 2 1 2 -U 2 1 3
-n100 -s2 -Z
-n100 -s2 -Z -r75
-n100 -s2 -Z -r216 -R217
-n100 -s2 -Z -r270 -R273
-n100 -s2 -Z -U 2 0 2
-n100 -s5 -Z
-n100 -s5 -Z -r75
-n50 -s5 -Z -r216 -R217
-n50 -s5 -Z -r270 -R273
-n100 -s5 -Z -U 2 0 2
-n100 -m16 -s10 -z2</main_exec_args>
 
<tags>nr_ulsim.test1 nr_ulsim.test2 nr_ulsim.test3 nr_ulsim.test4 nr_ulsim.test5 nr_ulsim.test6 nr_ulsim.test7 nr_ulsim.test8 nr_ulsim.test9 nr_ulsim.test10 nr_ulsim.test11 nr_ulsim.test12 nr_ulsim.test13 nr_ulsim.test14 nr_ulsim.test15</tags>
......
......@@ -257,7 +257,7 @@ The following features are valid for the gNB and the 5G-NR UE.
* FDD
* Normal CP
* 30 kHz subcarrier spacing
* Bandwidths up to 80MHz (217 Physical Resource Blocks)
* Bandwidths: 10, 20, 40, 80, 100MHz (273 Physical Resource Blocks)
* Intermediate downlink and uplink frequencies to interface with IF equipment
* Single antenna port (single beam)
* Slot format: 14 OFDM symbols in UL or DL
......@@ -277,10 +277,20 @@ The following features are valid for the gNB and the 5G-NR UE.
- user-specific search space configured by RRC
- DCI formats: 00, 10 (01 and 11 **under integration**)
* Generation of NR-PDSCH (including Segmentation, LDPC encoding, rate matching, scrambling, modulation, RB mapping, etc).
- Single symbol DMRS, DMRS-TypeA-Position Pos2, DMRS configuration type 1
- PDSCH mapping type A
- PDSCH mapping type A and B
- DMRS configuration type 1 and 2
- Single and multiple DMRS symbols
- PTRS support
- Support for 1, 2 and 4 TX antennas
- Support for up to 2 layers (currently limited to DMRS configuration type 2)
* NR-CSI Generation of sequence at PHY (**under integration**)
* NR-PUSCH (including Segmentation, LDPC encoding, rate matching, scrambling, modulation, RB mapping, etc).
- PUSCH mapping type A and B
- DMRS configuration type 1 and 2
- Single and multiple DMRS symbols
- PTRS support
- Support for 1 RX antenna
- Support for 1 layer
* NR-PUCCH
- Format 0 (2 bits, mainly for ACK/NACK)
- Format 2 (up to 64 bits, mainly for CSI feedback)
......@@ -320,27 +330,33 @@ The following features are valid for the gNB and the 5G-NR UE.
- Creates TUN interface to PDCP to inject and receive user-place traffic
- Will only work with OAI gNB configured in the same mode
## UE PHY Layer ##
## NR UE PHY Layer ##
* Initial synchronization
* Time tracking based on PBCH DMRS
* Time tracking based on PBCH DMRS
* Frequency offset estimation
* PBCH RX
* PDCCH RX
* PDSCH RX, including a first version of dual stream receiver for PDSCH
* 30KHz SCS for FR1 and 120 KHz SCS for FR2
* Generation of NR-PSS/NR-SSS
* Reception of NR-PSS/NR-SSS
* NR-PBCH supports multiple SSBs and flexible periodicity
* Generation of NR-PDCCH for SIB1 (including generation of DCI, polar encoding, scrambling, modulation, RB mapping, etc)
* Reception of NR-PDCCH for SIB1 (including reception of DCI, polar decoding, de-scrambling, de-modulation, RB de-mapping, etc)
- common search space configured by MIB
- user-specific search space configured by RRC
- DCI formats: 00, 10 (01 and 11 **under integration**)
* Generation of NR-PDSCH (including Segmentation, LDPC encoding, rate matching, scrambling, modulation, RB mapping, etc).
- Single symbol DMRS, DMRS-TypeA-Position Pos2, DMRS configuration type 1
- PDSCH mapping type A
* Reception of NR-PDSCH (including Segmentation, LDPC decoding, rate de-matching, de-scrambling, de-modulation, RB de-mapping, etc).
- PDSCH mapping type A and B
- DMRS configuration type 1 and 2
- Single and multiple DMRS symbols
- PTRS support
- Support for 1, 2 and 4 RX antennas
- Support for up to 2 layers (currently limited to DMRS configuration type 2)
* NR-CSI Generation of sequence at PHY (**under integration**)
* NR-PUSCH (including Segmentation, LDPC encoding, rate matching, scrambling, modulation, RB mapping, etc).
- PUSCH mapping type A and B
- DMRS configuration type 1 and 2
- Single and multiple DMRS symbols
- PTRS support
- Support for 1 TX antenna
- Support for 1 layer
* NR-PUCCH
- Format 0 (2 bits, mainly for ACK/NACK)
- Format 2 (up to 64 bits, mainly for CSI feedback)
......@@ -351,7 +367,7 @@ The following features are valid for the gNB and the 5G-NR UE.
* Encoder and decoder for short block
## UE Higher Layers ##
## NR UE Higher Layers ##
**UE MAC**
* Minimum system information (MSI)
......
......@@ -69,6 +69,7 @@
#define CONFIG_HLP_EXMCAL "Calibrate the EXMIMO borad, available files: exmimo2_2arxg.lime exmimo2_2brxg.lime \n"
#define CONFIG_HLP_ITTIL "Generate ITTI analyzser logs (similar to wireshark logs but with more details)\n"
#define CONFIG_HLP_DLMCS_PHYTEST "Set the downlink MCS for PHYTEST mode\n"
#define CONFIG_HLP_DLNL_PHYTEST "Set the downlink nrOfLayers for PHYTEST mode\n"
#define CONFIG_HLP_STMON "Enable processing timing measurement of lte softmodem on per subframe basis \n"
#define CONFIG_HLP_PRB "Set the PRB, valid values: 6, 25, 50, 100 \n"
#define CONFIG_HLP_MSLOTS "Skip the missed slots/subframes \n"
......
......@@ -22,6 +22,7 @@
{"A" , CONFIG_HLP_TADV, 0, uptr:&timing_advance, defintval:0, TYPE_UINT, 0}, \
{"E" , CONFIG_HLP_TQFS, PARAMFLAG_BOOL, i8ptr:&threequarter_fs, defintval:0, TYPE_INT8, 0}, \
{"m" , CONFIG_HLP_DLMCS_PHYTEST,0, uptr:&target_dl_mcs, defintval:0, TYPE_UINT, 0}, \
{"l" , CONFIG_HLP_DLNL_PHYTEST,0, uptr:&target_dl_Nl, defintval:0, TYPE_UINT, 0}, \
{"t" , CONFIG_HLP_ULMCS_PHYTEST,0, uptr:&target_ul_mcs, defintval:0, TYPE_UINT, 0}, \
{"M" , CONFIG_HLP_DLBW_PHYTEST,0, uptr:&target_dl_bw, defintval:0, TYPE_UINT, 0}, \
{"T" , CONFIG_HLP_ULBW_PHYTEST,0, uptr:&target_ul_bw, defintval:0, TYPE_UINT, 0}, \
......@@ -34,6 +35,7 @@
#include "threads_t.h"
extern threads_t threads;
extern uint32_t target_dl_mcs;
extern uint32_t target_dl_Nl;
extern uint32_t target_ul_mcs;
extern uint32_t target_dl_bw;
extern uint32_t target_ul_bw;
......
......@@ -364,8 +364,8 @@ void init_openair0(void) {
openair0_cfg[card].num_rb_dl = frame_parms->N_RB_DL;
openair0_cfg[card].clock_source = get_softmodem_params()->clock_source;
openair0_cfg[card].time_source = get_softmodem_params()->timing_source;
openair0_cfg[card].tx_num_channels = min(2, frame_parms->nb_antennas_tx);
openair0_cfg[card].rx_num_channels = min(2, frame_parms->nb_antennas_rx);
openair0_cfg[card].tx_num_channels = min(4, frame_parms->nb_antennas_tx);
openair0_cfg[card].rx_num_channels = min(4, frame_parms->nb_antennas_rx);
LOG_I(PHY, "HW: Configuring card %d, sample_rate %f, tx/rx num_channels %d/%d, duplex_mode %s\n",
card,
......
......@@ -595,27 +595,6 @@ void init_nr_transport(PHY_VARS_gNB *gNB) {
exit(-1);
}
/*
LOG_I(PHY,"Initializing nFAPI for ULSCH, UE %d\n",i);
// [hna] added here for RT implementation
uint8_t harq_pid = 0;
nfapi_nr_ul_config_ulsch_pdu *rel15_ul = &gNB->ulsch[i+1][j]->harq_processes[harq_pid]->ulsch_pdu;
// --------- setting rel15_ul parameters ----------
rel15_ul->rnti = 0x1234;
rel15_ul->ulsch_pdu_rel15.start_rb = 0;
rel15_ul->ulsch_pdu_rel15.number_rbs = 50;
rel15_ul->ulsch_pdu_rel15.start_symbol = 2;
rel15_ul->ulsch_pdu_rel15.number_symbols = 12;
rel15_ul->ulsch_pdu_rel15.length_dmrs = gNB->dmrs_UplinkConfig.pusch_maxLength;
rel15_ul->ulsch_pdu_rel15.Qm = 2;
rel15_ul->ulsch_pdu_rel15.R = 679;
rel15_ul->ulsch_pdu_rel15.mcs = 9;
rel15_ul->ulsch_pdu_rel15.rv = 0;
rel15_ul->ulsch_pdu_rel15.n_layers = 1;
///////////////////////////////////////////////////
*/
}
}
......
......@@ -131,15 +131,15 @@ int nr_phy_init_RU(RU_t *ru) {
}
AssertFatal(ru->nb_bfw==(beam_count*ru->nb_tx),"Number of beam weights from config file is %d while the expected number is %d",ru->nb_bfw,(beam_count*ru->nb_tx));
int l_ind = 0;
for (i=0; i<ru->num_gNB; i++) {
int l_ind = 0;
for (p=0;p<ru->nb_log_antennas;p++) {
//if ((fp->L_ssb >> (63-p)) & 0x01) {
ru->beam_weights[i][p] = (int32_t **)malloc16_clear(ru->nb_tx*sizeof(int32_t*));
for (j=0; j<ru->nb_tx; j++) {
ru->beam_weights[i][p][j] = (int32_t *)malloc16_clear(fp->ofdm_symbol_size*sizeof(int32_t));
for (re=0; re<fp->ofdm_symbol_size; re++)
ru->beam_weights[i][p][j][re] = ru->bw_list[j][l_ind];
ru->beam_weights[i][p][j][re] = ru->bw_list[i][l_ind];
//printf("Beam Weight %08x for beam %d and tx %d\n",ru->bw_list[i][l_ind],p,j);
l_ind++;
} // for j
......
......@@ -143,8 +143,6 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
uint16_t N_n_scid[2] = {0,1}; // [HOTFIX] This is a temporary implementation of scramblingID0 and scramblingID1 which are given by DMRS-UplinkConfig
int n_scid;
abstraction_flag = 0;
// dmrs_UplinkConfig_t *dmrs_Uplink_Config = &ue->pusch_config.dmrs_UplinkConfig;
// ptrs_UplinkConfig_t *ptrs_Uplink_Config = &ue->pusch_config.dmrs_UplinkConfig.ptrs_UplinkConfig;
LOG_I(PHY, "Initializing UE vars (abstraction %u) for gNB TXant %u, UE RXant %u\n", abstraction_flag, fp->nb_antennas_tx, fp->nb_antennas_rx);
//LOG_D(PHY,"[MSC_NEW][FRAME 00000][PHY_UE][MOD %02u][]\n", ue->Mod_id+NB_gNB_INST);
phy_init_nr_top(ue);
......@@ -188,29 +186,6 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
/////////////////////////PUSCH DMRS init/////////////////////////
///////////
// default values until overwritten by RRCConnectionReconfiguration
for (i=0; i<MAX_NR_OF_UL_ALLOCATIONS; i++) {
ue->pusch_config.pusch_TimeDomainResourceAllocation[i] = (PUSCH_TimeDomainResourceAllocation_t *)malloc16(sizeof(PUSCH_TimeDomainResourceAllocation_t));
ue->pusch_config.pusch_TimeDomainResourceAllocation[i]->mappingType = typeB;
}
for (i=0;i<MAX_NR_OF_DL_ALLOCATIONS;i++){
ue->PDSCH_Config.pdsch_TimeDomainResourceAllocation[i] = (PDSCH_TimeDomainResourceAllocation_t *)malloc16(sizeof(PDSCH_TimeDomainResourceAllocation_t));
ue->PDSCH_Config.pdsch_TimeDomainResourceAllocation[i]->mappingType = typeA;
}
//------------- config DMRS parameters--------------//
// dmrs_Uplink_Config->pusch_dmrs_type = pusch_dmrs_type1;
// dmrs_Uplink_Config->pusch_dmrs_AdditionalPosition = pusch_dmrs_pos0;
// dmrs_Uplink_Config->pusch_maxLength = pusch_len1;
//-------------------------------------------------//
ue->dmrs_DownlinkConfig.pdsch_dmrs_type = pdsch_dmrs_type1;
ue->dmrs_DownlinkConfig.pdsch_dmrs_AdditionalPosition = pdsch_dmrs_pos0;
ue->dmrs_DownlinkConfig.pdsch_maxLength = pdsch_len1;
//-------------------------------------------------//
ue->nr_gold_pusch_dmrs = (uint32_t ****)malloc16(fp->slots_per_frame*sizeof(uint32_t ***));
pusch_dmrs = ue->nr_gold_pusch_dmrs;
n_scid = 0; // This quantity is indicated by higher layer parameter dmrs-SeqInitialization
......
......@@ -111,9 +111,10 @@ int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue,
int32_t *output,
unsigned short p,
unsigned char lp,
unsigned short nb_pdsch_rb)
unsigned short nb_pdsch_rb,
uint8_t config_type)
{
int8_t w,config_type;
int8_t w;
short *mod_table;
unsigned char idx=0;
......@@ -121,18 +122,16 @@ int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue,
array_of_w *wf;
array_of_w *wt;
config_type = ue->dmrs_DownlinkConfig.pdsch_dmrs_type;
wf = (config_type==pdsch_dmrs_type1) ? wf1 : wf2;
wt = (config_type==pdsch_dmrs_type1) ? wt1 : wt2;
wf = (config_type==NFAPI_NR_DMRS_TYPE1) ? wf1 : wf2;
wt = (config_type==NFAPI_NR_DMRS_TYPE1) ? wt1 : wt2;
if (config_type > 1)
LOG_E(PHY,"Bad PDSCH DMRS config type %d\n", config_type);
if ((p>=1000) && (p<((config_type==pdsch_dmrs_type1) ? 1008 : 1012))) {
if ((p>=1000) && (p<((config_type==NFAPI_NR_DMRS_TYPE1) ? 1008 : 1012))) {
if (ue->frame_parms.Ncp == NORMAL) {
for (int i=0; i<nb_pdsch_rb*((config_type==pdsch_dmrs_type1) ? 6:4); i++) {
for (int i=0; i<nb_pdsch_rb*((config_type==NFAPI_NR_DMRS_TYPE1) ? 6:4); i++) {
w = (wf[p-1000][i&1])*(wt[p-1000][lp]);
mod_table = (w==1) ? nr_rx_mod_table : nr_rx_nmod_table;
......
......@@ -52,7 +52,8 @@ int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue,
int32_t *output,
unsigned short p,
unsigned char lp,
unsigned short nb_pdsch_rb);
unsigned short nb_pdsch_rb,
uint8_t config_type);
void nr_gold_pbch(PHY_VARS_NR_UE* ue);
......
......@@ -70,7 +70,7 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
uint32_t **gold_pdcch_dmrs,
int32_t *txdataF,
int16_t amp,
NR_DL_FRAME_PARMS frame_parms) {
NR_DL_FRAME_PARMS *frame_parms) {
int16_t mod_dmrs[NR_MAX_CSET_DURATION][NR_MAX_PDCCH_DMRS_LENGTH>>1] __attribute__((aligned(16))); // 3 for the max coreset duration
uint16_t cset_start_sc;
......@@ -85,7 +85,7 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
// compute rb_offset and n_prb based on frequency allocation
nr_fill_cce_list(gNB,0,pdcch_pdu_rel15);
get_coreset_rballoc(pdcch_pdu_rel15->FreqDomainResource,&n_rb,&rb_offset);
cset_start_sc = frame_parms.first_carrier_offset + (pdcch_pdu_rel15->BWPStart + rb_offset) * NR_NB_SC_PER_RB;
cset_start_sc = frame_parms->first_carrier_offset + (pdcch_pdu_rel15->BWPStart + rb_offset) * NR_NB_SC_PER_RB;
for (int d=0;d<pdcch_pdu_rel15->numDlDci;d++) {
/*The coreset is initialised
......@@ -165,8 +165,8 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
/// Resource mapping
if (cset_start_sc >= frame_parms.ofdm_symbol_size)
cset_start_sc -= frame_parms.ofdm_symbol_size;
if (cset_start_sc >= frame_parms->ofdm_symbol_size)
cset_start_sc -= frame_parms->ofdm_symbol_size;
// Get cce_list indices by reg_idx in ascending order
int reg_list_index = 0;
......@@ -191,8 +191,8 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
k = cset_start_sc + gNB->cce_list[d][cce_idx].reg_list[reg_in_cce_idx].start_sc_idx;
if (k >= frame_parms.ofdm_symbol_size)
k -= frame_parms.ofdm_symbol_size;
if (k >= frame_parms->ofdm_symbol_size)
k -= frame_parms->ofdm_symbol_size;
l = cset_start_symb + symbol_idx;
......@@ -206,26 +206,26 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
for (int m = 0; m < NR_NB_SC_PER_RB; m++) {
if (m == (k_prime << 2) + 1) { // DMRS if not already mapped
((int16_t *) txdataF)[(l * frame_parms.ofdm_symbol_size + k) << 1] =
((int16_t *) txdataF)[(l * frame_parms->ofdm_symbol_size + k) << 1] =
(amp * mod_dmrs[l][dmrs_idx << 1]) >> 15;
((int16_t *) txdataF)[((l * frame_parms.ofdm_symbol_size + k) << 1) + 1] =
((int16_t *) txdataF)[((l * frame_parms->ofdm_symbol_size + k) << 1) + 1] =
(amp * mod_dmrs[l][(dmrs_idx << 1) + 1]) >> 15;
#ifdef DEBUG_PDCCH_DMRS
printf("PDCCH DMRS: l %d position %d => (%d,%d)\n",l,k,((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1],
((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1)+1]);
printf("PDCCH DMRS: l %d position %d => (%d,%d)\n",l,k,((int16_t *)txdataF)[(l*frame_parms->ofdm_symbol_size + k)<<1],
((int16_t *)txdataF)[((l*frame_parms->ofdm_symbol_size + k)<<1)+1]);
#endif
dmrs_idx++;
k_prime++;
} else { // DCI payload
((int16_t *) txdataF)[(l * frame_parms.ofdm_symbol_size + k) << 1] = (amp * mod_dci[dci_idx << 1]) >> 15;
((int16_t *) txdataF)[((l * frame_parms.ofdm_symbol_size + k) << 1) + 1] =
((int16_t *) txdataF)[(l * frame_parms->ofdm_symbol_size + k) << 1] = (amp * mod_dci[dci_idx << 1]) >> 15;
((int16_t *) txdataF)[((l * frame_parms->ofdm_symbol_size + k) << 1) + 1] =
(amp * mod_dci[(dci_idx << 1) + 1]) >> 15;
#ifdef DEBUG_DCI
printf("PDCCH: l %d position %d => (%d,%d)\n",l,k,((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1],
((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1)+1]);
printf("PDCCH: l %d position %d => (%d,%d)\n",l,k,((int16_t *)txdataF)[(l*frame_parms->ofdm_symbol_size + k)<<1],
((int16_t *)txdataF)[((l*frame_parms->ofdm_symbol_size + k)<<1)+1]);
#endif
dci_idx++;
......@@ -233,8 +233,8 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
k++;
if (k >= frame_parms.ofdm_symbol_size)
k -= frame_parms.ofdm_symbol_size;
if (k >= frame_parms->ofdm_symbol_size)
k -= frame_parms->ofdm_symbol_size;
} // m
} // reg_in_cce_idx
......@@ -254,17 +254,15 @@ void nr_generate_dci_top(PHY_VARS_gNB *gNB,
uint32_t **gold_pdcch_dmrs,
int32_t *txdataF,
int16_t amp,
NR_DL_FRAME_PARMS frame_parms) {
NR_DL_FRAME_PARMS *frame_parms) {
AssertFatal(pdcch_pdu!=NULL || ul_dci_pdu!=NULL,"At least one pointer has to be !NULL\n");
if (pdcch_pdu && ul_dci_pdu) {
if (pdcch_pdu) {
nr_generate_dci(gNB,&pdcch_pdu->pdcch_pdu_rel15,gold_pdcch_dmrs,txdataF,amp,frame_parms);
nr_generate_dci(gNB,&ul_dci_pdu->pdcch_pdu_rel15,gold_pdcch_dmrs,txdataF,amp,frame_parms);
}
else if (pdcch_pdu)
nr_generate_dci(gNB,&pdcch_pdu->pdcch_pdu_rel15,gold_pdcch_dmrs,txdataF,amp,frame_parms);
else
if (ul_dci_pdu) {
nr_generate_dci(gNB,&ul_dci_pdu->pdcch_pdu_rel15,gold_pdcch_dmrs,txdataF,amp,frame_parms);
}
}
......@@ -35,7 +35,7 @@ void nr_generate_dci_top(PHY_VARS_gNB *gNB,
uint32_t **gold_pdcch_dmrs,
int32_t *txdataF,
int16_t amp,
NR_DL_FRAME_PARMS frame_parms);
NR_DL_FRAME_PARMS *frame_parms);
void nr_pdcch_scrambling(uint32_t *in,
uint32_t size,
......
......@@ -448,7 +448,7 @@ uint8_t nr_generate_pdsch(PHY_VARS_gNB *gNB,
(void*)&txdataF_precoding[ap][2*(l*frame_parms->ofdm_symbol_size + txdataF_offset+ k)],
NR_NB_SC_PER_RB*sizeof(int32_t));
else
memset((void*)&txdataF[ap][rel15->StartSymbolIndex*frame_parms->ofdm_symbol_size + txdataF_offset +k],
memset((void*)&txdataF[ap][l*frame_parms->ofdm_symbol_size + txdataF_offset + k],
0,
NR_NB_SC_PER_RB*sizeof(int32_t));
k += NR_NB_SC_PER_RB;
......
......@@ -192,14 +192,15 @@ NR_gNB_DLSCH_t *new_gNB_dlsch(NR_DL_FRAME_PARMS *frame_parms,
AssertFatal(harq->d[r], "cannot allocate harq->d[%d]\n", r); // max size for coded output
bzero(harq->c[r], 8448);
bzero(harq->d[r], (3 * 8448));
harq->e = malloc16(14 * N_RB * 12 * 8);
AssertFatal(harq->e, "cannot allocate harq->e\n");
bzero(harq->e, 14 * N_RB * 12 * 8);
harq->f = malloc16(14 * N_RB * 12 * 8);
AssertFatal(harq->f, "cannot allocate harq->f\n");
bzero(harq->f, 14 * N_RB * 12 * 8);
}
harq->e = malloc16(N_RB * NR_SYMBOLS_PER_SLOT * NR_NB_SC_PER_RB * 8 * NR_MAX_NB_LAYERS);
AssertFatal(harq->e, "cannot allocate harq->e\n");
bzero(harq->e, N_RB * NR_SYMBOLS_PER_SLOT * NR_NB_SC_PER_RB * 8 * NR_MAX_NB_LAYERS);
harq->f = malloc16(N_RB * NR_SYMBOLS_PER_SLOT * NR_NB_SC_PER_RB * 8 * NR_MAX_NB_LAYERS);
AssertFatal(harq->f, "cannot allocate harq->f\n");
bzero(harq->f, N_RB * NR_SYMBOLS_PER_SLOT * NR_NB_SC_PER_RB * 8 * NR_MAX_NB_LAYERS);
return(dlsch);
}
......
......@@ -36,7 +36,7 @@
int nr_pbch_dmrs_correlation(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t eNB_offset,
uint8_t gNB_id,
unsigned char Ns,
unsigned char symbol,
int dmrss,
......@@ -70,7 +70,7 @@ int nr_pbch_dmrs_correlation(PHY_VARS_NR_UE *ue,
k = nushift;
#ifdef DEBUG_CH
printf("PBCH DMRS Correlation : ThreadId %d, eNB_offset %d , OFDM size %d, Ncp=%d, Ns=%d, k=%d symbol %d\n",proc->thread_id, eNB_offset,ue->frame_parms.ofdm_symbol_size,
printf("PBCH DMRS Correlation : ThreadId %d, gNB_id %d , OFDM size %d, Ncp=%d, Ns=%d, k=%d symbol %d\n",proc->thread_id, gNB_id,ue->frame_parms.ofdm_symbol_size,
ue->frame_parms.Ncp,Ns,k, symbol);
#endif
......@@ -198,7 +198,7 @@ int nr_pbch_dmrs_correlation(PHY_VARS_NR_UE *ue,
int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t eNB_offset,
uint8_t gNB_id,
unsigned char Ns,
unsigned char symbol,
int dmrss,
......@@ -213,10 +213,8 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
int ch_offset,symbol_offset;
//int slot_pbch;
//uint16_t Nid_cell = (eNB_offset == 0) ? ue->frame_parms.Nid_cell : ue->measurements.adj_cell_id[eNB_offset-1];
uint8_t nushift;
int **dl_ch_estimates =ue->pbch_vars[eNB_offset]->dl_ch_estimates;
int **dl_ch_estimates =ue->pbch_vars[gNB_id]->dl_ch_estimates;
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[proc->thread_id].rxdataF;
nushift = ue->frame_parms.Nid_cell%4;
......@@ -239,7 +237,7 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
k = nushift;
#ifdef DEBUG_CH
printf("PBCH Channel Estimation : ThreadId %d, eNB_offset %d ch_offset %d, OFDM size %d, Ncp=%d, Ns=%d, k=%d symbol %d\n",proc->thread_id, eNB_offset,ch_offset,ue->frame_parms.ofdm_symbol_size,
printf("PBCH Channel Estimation : ThreadId %d, gNB_id %d ch_offset %d, OFDM size %d, Ncp=%d, Ns=%d, k=%d symbol %d\n",proc->thread_id, gNB_id,ch_offset,ue->frame_parms.ofdm_symbol_size,
ue->frame_parms.Ncp,Ns,k, symbol);
#endif
......@@ -456,12 +454,12 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
// do ifft of channel estimate
for (aarx=0; aarx<ue->frame_parms.nb_antennas_rx; aarx++)
for (p=0; p<ue->frame_parms.nb_antenna_ports_gNB; p++) {
if (ue->pbch_vars[eNB_offset]->dl_ch_estimates[(p*ue->frame_parms.nb_antennas_rx)+aarx])
if (ue->pbch_vars[gNB_id]->dl_ch_estimates[(p*ue->frame_parms.nb_antennas_rx)+aarx])
{
LOG_D(PHY,"Channel Impulse Computation Slot %d ThreadId %d Symbol %d ch_offset %d\n", Ns, proc->thread_id, symbol, ch_offset);
idft(idftsizeidx,
(int16_t*) &ue->pbch_vars[eNB_offset]->dl_ch_estimates[(p*ue->frame_parms.nb_antennas_rx)+aarx][ch_offset],
(int16_t*) ue->pbch_vars[eNB_offset]->dl_ch_estimates_time[(p*ue->frame_parms.nb_antennas_rx)+aarx],1);
(int16_t*) &ue->pbch_vars[gNB_id]->dl_ch_estimates[(p*ue->frame_parms.nb_antennas_rx)+aarx][ch_offset],
(int16_t*) ue->pbch_vars[gNB_id]->dl_ch_estimates_time[(p*ue->frame_parms.nb_antennas_rx)+aarx],1);
}
}
}
......@@ -474,7 +472,7 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t eNB_offset,
uint8_t gNB_id,
unsigned char Ns,
unsigned char symbol,
unsigned short coreset_start_subcarrier,
......@@ -487,9 +485,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
int16_t ch[2],*pil,*rxF,*dl_ch,*fl,*fm,*fr;
int ch_offset,symbol_offset;
//uint16_t Nid_cell = (eNB_offset == 0) ? ue->frame_parms.Nid_cell : ue->measurements.adj_cell_id[eNB_offset-1];
int **dl_ch_estimates =ue->pdcch_vars[proc->thread_id][eNB_offset]->dl_ch_estimates;
int **dl_ch_estimates =ue->pdcch_vars[proc->thread_id][gNB_id]->dl_ch_estimates;
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[proc->thread_id].rxdataF;
......@@ -500,10 +496,9 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
symbol_offset = ue->frame_parms.ofdm_symbol_size*symbol;
k = coreset_start_subcarrier;
#ifdef DEBUG_PDCCH
printf("PDCCH Channel Estimation : ThreadId %d, eNB_offset %d ch_offset %d, OFDM size %d, Ncp=%d, Ns=%d, k=%d symbol %d\n",proc->thread_id, eNB_offset,ch_offset,ue->frame_parms.ofdm_symbol_size,
printf("PDCCH Channel Estimation : ThreadId %d, gNB_id %d ch_offset %d, OFDM size %d, Ncp=%d, Ns=%d, k=%d symbol %d\n",proc->thread_id, gNB_id,ch_offset,ue->frame_parms.ofdm_symbol_size,
ue->frame_parms.Ncp,Ns,k, symbol);
#endif
......@@ -521,11 +516,12 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
// generate pilot
int pilot[nb_rb_coreset * 3] __attribute__((aligned(16)));
nr_pdcch_dmrs_rx(ue,eNB_offset,Ns,ue->nr_gold_pdcch[eNB_offset][Ns][symbol], &pilot[0],2000,nb_rb_coreset);
nr_pdcch_dmrs_rx(ue,gNB_id,Ns,ue->nr_gold_pdcch[gNB_id][Ns][symbol], &pilot[0],2000,nb_rb_coreset);
for (aarx=0; aarx<ue->frame_parms.nb_antennas_rx; aarx++) {
k = coreset_start_subcarrier;
pil = (int16_t *)&pilot[0];
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+k+1)];
dl_ch = (int16_t *)&dl_ch_estimates[aarx][ch_offset];
......@@ -656,7 +652,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t eNB_offset,
uint8_t gNB_id,
bool is_SI,
unsigned char Ns,
unsigned short p,
......@@ -673,10 +669,12 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
int16_t *fl,*fm,*fr,*fml,*fmr,*fmm,*fdcl,*fdcr,*fdclh,*fdcrh, *frl, *frr;
int ch_offset,symbol_offset;
//uint16_t Nid_cell = (eNB_offset == 0) ? ue->frame_parms.Nid_cell : ue->measurements.adj_cell_id[eNB_offset-1];
NR_UE_DLSCH_t **dlsch = ue->dlsch[proc->thread_id][gNB_id];
const unsigned char harq_pid = dlsch[0]->current_harq_pid;
NR_DL_UE_HARQ_t *dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
uint8_t nushift;
int **dl_ch_estimates =ue->pdsch_vars[proc->thread_id][eNB_offset]->dl_ch_estimates;
int **dl_ch_estimates =ue->pdsch_vars[proc->thread_id][gNB_id]->dl_ch_estimates;
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[proc->thread_id].rxdataF;
if (ue->high_speed_flag == 0)
......@@ -690,7 +688,7 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
int re_offset = k;
#ifdef DEBUG_CH
printf("PDSCH Channel Estimation : ThreadId %d, eNB_offset %d ch_offset %d, symbol_offset %d OFDM size %d, Ncp=%d, Ns=%d, k=%d symbol %d\n",proc->thread_id, eNB_offset,ch_offset,symbol_offset,ue->frame_parms.ofdm_symbol_size,
printf("PDSCH Channel Estimation : ThreadId %d, gNB_id %d ch_offset %d, symbol_offset %d OFDM size %d, Ncp=%d, Ns=%d, k=%d symbol %d\n",proc->thread_id, gNB_id,ch_offset,symbol_offset,ue->frame_parms.ofdm_symbol_size,
ue->frame_parms.Ncp,Ns,k, symbol);
#endif
......@@ -699,19 +697,19 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
if (is_SI) {
rb_offset -= BWPStart;
}
uint8_t config_type = ue->dmrs_DownlinkConfig.pdsch_dmrs_type;
uint8_t config_type = dlsch0_harq->dmrsConfigType;
int8_t delta = get_delta(p, config_type);