Commit 56c6c3ee authored by knopp's avatar knopp
Browse files

unitary simulators all compile

parent 6b8c8a3b
......@@ -2627,12 +2627,14 @@ target_link_libraries(nr_dlsim
add_executable(nr_prachsim
${OPENAIR1_DIR}/SIMULATION/NR_PHY/prachsim.c
${OPENAIR_DIR}/common/utils/backtrace.c
${OPENAIR_DIR}/common/utils/system.c
${OPENAIR_DIR}/common/utils/nr/nr_common.c
${OPENAIR1_DIR}/SCHED_NR/phy_procedures_nr_common.c
${T_SOURCE})
target_link_libraries(nr_prachsim -Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR_COMMON PHY_NR PHY_RU PHY_NR_UE SCHED_NR_LIB SCHED_NR_UE_LIB CONFIG_LIB -Wl,--end-group m pthread ${ATLAS_LIBRARIES} ${T_LIB} dl)
${UTIL_SRC}
${T_SOURCE}
${SHLIB_LOADER_SOURCES})
target_link_libraries(nr_prachsim
-Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR_COMMON PHY_NR PHY_RU PHY_NR_UE MAC_NR_COMMON SCHED_NR_LIB SCHED_NR_UE_LIB RRC_LIB NR_RRC_LIB L2_NR CONFIG_LIB -Wl,--end-group m pthread ${ATLAS_LIBRARIES} ${T_LIB} ${ITTI_LIB} dl)
add_executable(nr_ulschsim
${OPENAIR1_DIR}/SIMULATION/NR_PHY/ulschsim.c
......
......@@ -51,8 +51,8 @@
#define FAPI_NR_UL_CONFIG_LIST_NUM 10
#define FAPI_NR_UL_CONFIG_TYPE_PRACH 0x01
#define FAPI_NR_UL_CONFIG_TYPE_UCI 0x02
#define FAPI_NR_UL_CONFIG_TYPE_ULSCH 0x03
#define FAPI_NR_UL_CONFIG_TYPE_PUCCH 0x02
#define FAPI_NR_UL_CONFIG_TYPE_PUSCH 0x03
#define FAPI_NR_UL_CONFIG_TYPE_SRS 0x04
......
/*
* Copyright 2017 Cisco Systems, Inc.
/*Copyright 2017 Cisco Systems, Inc.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
......@@ -197,11 +196,11 @@ typedef struct {
} fapi_nr_rx_indication_body_t;
///
#define FAPI_RX_IND_MAX_PDU 100
#define NFAPI_RX_IND_MAX_PDU 100
typedef struct {
uint32_t sfn_slot;
uint16_t number_pdus;
fapi_nr_rx_indication_body_t rx_indication_body[FAPI_RX_IND_MAX_PDU];
fapi_nr_rx_indication_body_t rx_indication_body[NFAPI_RX_IND_MAX_PDU];
} fapi_nr_rx_indication_t;
typedef struct {
......@@ -224,22 +223,22 @@ typedef struct {
fapi_nr_tx_request_body_t *tx_request_body;
} fapi_nr_tx_request_t;
typedef struct {
uint8_t preamble_index;
uint8_t prach_configuration_index;
uint16_t preamble_length;
uint8_t power_ramping_step;
uint16_t preamble_received_target_power;
uint8_t msg1_fdm;
uint8_t msg1_frequency_start;
uint8_t zero_correlation_zone_config;
uint8_t subcarrier_spacing;
uint8_t restrictedset_config;
uint16_t root_sequence_index;
uint16_t rsrp_threshold_ssb;
uint16_t rsrp_threshold_sul;
uint16_t prach_freq_offset;
} fapi_nr_ul_config_prach_pdu;
typedef struct {
uint8_t preamble_index;
uint8_t prach_configuration_index;
uint16_t preamble_length;
uint8_t power_ramping_step;
uint16_t preamble_received_target_power;
uint8_t msg1_fdm;
uint8_t msg1_frequency_start;
uint8_t zero_correlation_zone_config;
uint8_t subcarrier_spacing;
uint8_t restrictedset_config;
uint16_t root_sequence_index;
uint16_t rsrp_threshold_ssb;
uint16_t rsrp_threshold_sul;
uint16_t prach_freq_offset;
} fapi_nr_ul_config_prach_pdu;
typedef struct {
......@@ -322,7 +321,7 @@ typedef struct {
// pathlossReferenceRSs SEQUENCE (SIZE (1..maxNrofPUCCH-PathlossReferenceRSs)) OF PUCCH-PathlossReferenceRS OPTIONAL, -- Need M
int8_t twoPUCCH_PC_AdjustmentStates;
} fapi_nr_ul_config_uci_pdu;
} fapi_nr_ul_config_pucch_pdu;
typedef enum {pusch_freq_hopping_disabled = 0 , pusch_freq_hopping_enabled = 1}pusch_freq_hopping_t;
typedef struct{
......@@ -352,39 +351,23 @@ typedef struct {
uint8_t maxCodeBlockGroupsPerTransportBlock;
uint8_t ptrs_dmrs_association_port;
uint8_t beta_offset_ind;
} fapi_nr_ul_config_ulsch_pdu_rel15_t;
} fapi_nr_ul_config_pusch_pdu_rel15_t;
typedef struct {
uint16_t rnti;
fapi_nr_ul_config_ulsch_pdu_rel15_t ulsch_pdu_rel15;
} fapi_nr_ul_config_ulsch_pdu;
fapi_nr_ul_config_pusch_pdu_rel15_t ulsch_pdu_rel15;
} fapi_nr_ul_config_pusch_pdu;
typedef struct {
} fapi_nr_ul_config_srs_pdu;
// nFAPI enums
typedef enum {
FAPI_NR_DL_CONFIG_DCI_DL_PDU_TYPE = 0,
FAPI_NR_DL_CONFIG_BCH_PDU_TYPE,
FAPI_NR_DL_CONFIG_DLSCH_PDU_TYPE,
FAPI_NR_DL_CONFIG_PCH_PDU_TYPE,
} fapi_nr_dl_config_pdu_type_e;
// nFAPI enums
typedef enum {
FAPI_NR_UL_CONFIG_PRACH_PDU_TYPE = 0,
FAPI_NR_UL_CONFIG_ULSCH_PDU_TYPE,
FAPI_NR_UL_CONFIG_UCI_PDU_TYPE,
FAPI_NR_UL_CONFIG_SRS_PDU_TYPE,
} fapi_nr_ul_config_pdu_type_e;
typedef struct {
uint8_t pdu_type;
union {
fapi_nr_ul_config_prach_pdu prach_config_pdu;
fapi_nr_ul_config_uci_pdu uci_config_pdu;
fapi_nr_ul_config_ulsch_pdu ulsch_config_pdu;
fapi_nr_ul_config_pucch_pdu pucch_config_pdu;
fapi_nr_ul_config_pusch_pdu ulsch_config_pdu;
fapi_nr_ul_config_srs_pdu srs_config_pdu;
};
} fapi_nr_ul_config_request_pdu_t;
......@@ -452,20 +435,6 @@ typedef struct {
// to be check the fields needed to L1 with NR_DL_UE_HARQ_t and NR_UE_DLSCH_t
} fapi_nr_dl_config_dlsch_pdu_rel15_t;
typedef struct {
uint8_t subcarrier_spacing_common;
uint8_t ssb_subcarrier_offset;
uint8_t dmrs_type_a_position;
uint8_t pdcch_config_sib1;
uint8_t cell_barred;
uint8_t intra_frequency_reselection;
uint16_t system_frame_number;
uint8_t ssb_index;
uint8_t half_frame_bit;
} fapi_nr_dl_config_bch_pdu;
typedef struct {
uint16_t rnti;
fapi_nr_dl_config_dlsch_pdu_rel15_t dlsch_config_rel15;
......@@ -474,7 +443,6 @@ typedef struct {
typedef struct {
uint8_t pdu_type;
union {
fapi_nr_dl_config_bch_pdu bch_config_pdu;
fapi_nr_dl_config_dci_pdu dci_config_pdu;
fapi_nr_dl_config_dlsch_pdu dlsch_config_pdu;
};
......@@ -492,154 +460,6 @@ typedef struct {
//
typedef struct {
uint8_t numerology_index_mu;
uint8_t duplex_mode;
uint8_t dl_cyclic_prefix_type;
uint8_t ul_cyclic_prefix_type;
} fapi_nr_subframe_config_t;
typedef struct {
uint16_t dl_carrier_bandwidth;
uint16_t ul_carrier_bandwidth;
uint16_t dl_absolutefrequencypointA;
uint16_t ul_absolutefrequencypointA;
uint16_t dl_offsettocarrier;
uint16_t ul_offsettocarrier;
uint16_t dl_subcarrierspacing;
uint16_t ul_subcarrierspacing;
uint16_t dl_specificcarrier_k0;
uint16_t ul_specificcarrier_k0;
uint16_t NIA_subcarrierspacing;
} fapi_nr_rf_config_t;
typedef struct {
uint16_t physical_cell_id;
uint8_t half_frame_index;
uint16_t ssb_subcarrier_offset;
uint16_t ssb_sib1_position_in_burst; // in sib1
uint64_t ssb_scg_position_in_burst; // in servingcellconfigcommon
uint8_t ssb_periodicity;
uint16_t ss_pbch_block_power;
uint16_t n_ssb_crb;
} fapi_nr_sch_config_t;
typedef struct {
uint16_t dl_bandwidth;
uint16_t ul_bandwidth;
uint16_t dl_offset;
uint16_t ul_offset;
uint8_t dl_subcarrierSpacing;
uint8_t ul_subcarrierSpacing;
} fapi_nr_initialBWP_config_t;
#define FAPI_NR_PDSCH_CONFIG_MAXALLOCATIONS 16
#define FAPI_NR_PUSCH_CONFIG_MAXALLOCATIONS 16
typedef struct {
uint16_t dmrs_TypeA_Position;
uint16_t num_PDSCHTimeDomainResourceAllocations;
uint16_t PDSCHTimeDomainResourceAllocation_k0[FAPI_NR_PDSCH_CONFIG_MAXALLOCATIONS];
uint16_t PDSCHTimeDomainResourceAllocation_mappingType[FAPI_NR_PDSCH_CONFIG_MAXALLOCATIONS];
uint16_t PDSCHTimeDomainResourceAllocation_startSymbolAndLength[FAPI_NR_PDSCH_CONFIG_MAXALLOCATIONS];
} fapi_nr_pdsch_config_t;
typedef struct {
uint16_t prach_RootSequenceIndex; ///// L1 parameter 'PRACHRootSequenceIndex'
uint16_t prach_msg1_SubcarrierSpacing; ///// L1 parameter 'prach-Msg1SubcarrierSpacing'
uint16_t restrictedSetConfig;
uint16_t msg3_transformPrecoding; ///// L1 parameter 'msg3-tp'
uint16_t ssb_perRACH_OccasionAndCB_PreamblesPerSSB;
uint16_t ra_ContentionResolutionTimer;
uint16_t rsrp_ThresholdSSB;
/////////////////--------------------NR RACH-ConfigGeneric--------------------/////////////////
uint16_t prach_ConfigurationIndex; ///// L1 parameter 'PRACHConfigurationIndex'
uint16_t prach_msg1_FDM; ///// L1 parameter 'prach-FDM'
uint16_t prach_msg1_FrequencyStart; ///// L1 parameter 'prach-frequency-start'
uint16_t zeroCorrelationZoneConfig;
uint16_t preambleReceivedTargetPower;
uint16_t preambleTransMax;
uint16_t powerRampingStep;
uint16_t ra_ResponseWindow;
} fapi_nr_rach_config_t;
typedef struct {
uint16_t groupHoppingEnabledTransformPrecoding; ///// L1 parameter 'Group-hopping-enabled-Transform-precoding'
uint16_t msg3_DeltaPreamble; ///// L1 parameter 'Delta-preamble-msg3'
uint16_t p0_NominalWithGrant; ///// L1 parameter 'p0-nominal-pusch-withgrant'
uint16_t dmrs_TypeA_Position;
uint16_t num_PUSCHTimeDomainResourceAllocations;
uint16_t PUSCHTimeDomainResourceAllocation_k2[FAPI_NR_PUSCH_CONFIG_MAXALLOCATIONS]; ///// L1 parameter 'K2'
uint16_t PUSCHTimeDomainResourceAllocation_mappingType[FAPI_NR_PUSCH_CONFIG_MAXALLOCATIONS]; ///// L1 parameter 'Mapping-type'
uint16_t PUSCHTimeDomainResourceAllocation_startSymbolAndLength[FAPI_NR_PUSCH_CONFIG_MAXALLOCATIONS];
} fapi_nr_pusch_config_t;
typedef struct {
uint8_t pucch_resource_common;
uint16_t pucch_GroupHopping; ///// L1 parameter 'PUCCH-GroupHopping'
uint8_t hopping_id;
uint16_t p0_nominal; ///// L1 parameter 'p0-nominal-pucch'
} fapi_nr_pucch_config_t;
typedef struct {
uint8_t controlResourceSetZero;
uint8_t searchSpaceZero;
// fapi_nr_SearchSpace_t sib1searchSpace;
// fapi_nr_SearchSpace_t sibssearchSpace;
// fapi_nr_SearchSpace_t ra_SearchSpace;
} fapi_nr_pdcch_config_t;
typedef struct {
//NR TDD-UL-DL-ConfigCommon ///// L1 parameter 'UL-DL-configuration-common'
uint16_t referenceSubcarrierSpacing; ///// L1 parameter 'reference-SCS'
uint16_t dl_ul_periodicity; ///// L1 parameter 'DL-UL-transmission-periodicity'
uint16_t nrofDownlinkSlots; ///// L1 parameter 'number-of-DL-slots'
uint16_t nrofDownlinkSymbols; ///// L1 parameter 'number-of-DL-symbols-common'
uint16_t nrofUplinkSlots; ///// L1 parameter 'number-of-UL-slots'
uint16_t nrofUplinkSymbols; ///// L1 parameter 'number-of-UL-symbols-common'
uint16_t Pattern2Present;
uint16_t Pattern2_dl_ul_periodicity; ///// L1 parameter 'DL-UL-transmission-periodicity'
uint16_t Pattern2_nrofDownlinkSlots; ///// L1 parameter 'number-of-DL-slots'
uint16_t Pattern2_nrofDownlinkSymbols; ///// L1 parameter 'number-of-DL-symbols-common'
uint16_t Pattern2_nrofUplinkSlots; ///// L1 parameter 'number-of-UL-slots'
uint16_t Pattern2_nrofUplinkSymbols; ///// L1 parameter 'number-of-UL-symbols-common'
} fapi_nr_tdd_ul_dl_config_t;
#define FAPI_MAX_NUM_RF_BANDS 16
typedef struct {
uint16_t number_rf_bands;
uint16_t rf_band[FAPI_MAX_NUM_RF_BANDS];
} fapi_rf_bands_t;
typedef struct
{
fapi_rf_bands_t rf_bands;
uint32_t nrarfcn;
// nfapi_nmm_frequency_bands_t nmm_gsm_frequency_bands;
// nfapi_nmm_frequency_bands_t nmm_umts_frequency_bands;
// nfapi_nmm_frequency_bands_t nmm_lte_frequency_bands;
// nfapi_uint8_tlv_t nmm_uplink_rssi_supported;
} fapi_nr_fapi_t;
typedef struct {
fapi_nr_fapi_t fapi_config;
fapi_nr_subframe_config_t subframe_config;
fapi_nr_rf_config_t rf_config;
fapi_nr_sch_config_t sch_config;
fapi_nr_initialBWP_config_t initialBWP_config;
fapi_nr_pdsch_config_t pdsch_config;
fapi_nr_rach_config_t rach_config;
fapi_nr_pusch_config_t pusch_config;
fapi_nr_pucch_config_t pucch_config;
fapi_nr_pdcch_config_t pdcch_config;
fapi_nr_tdd_ul_dl_config_t tdd_ul_dl_config;
// fapi_nr_ratematchpattern_t ratematchpattern;
// fapi_nr_ratematchpattern_lte_crs_t ratematchpattern_lte_crs;
} fapi_nr_config_request_t;
typedef struct {
fapi_nr_coreset_t coreset;
......@@ -723,6 +543,19 @@ typedef struct {
uint8_t p0_nominal;
} fapi_nr_pucch_config_common_t;
typedef struct {
uint8_t subcarrier_spacing_common;
uint8_t ssb_subcarrier_offset;
uint8_t dmrs_type_a_position;
uint8_t pdcch_config_sib1;
uint8_t cell_barred;
uint8_t intra_frequency_reselection;
uint16_t system_frame_number;
uint8_t ssb_index;
uint8_t half_frame_bit;
} fapi_nr_pbch_config_t;
typedef struct {
......@@ -859,6 +692,7 @@ typedef struct {
fapi_nr_pdsch_config_dedicated_t pdsch_config_dedicated;
fapi_nr_sps_config_t sps_config;
fapi_nr_radio_link_monitoring_config_t radio_link_monitoring_config;
} fapi_nr_dl_bwp_dedicated_config_t;
typedef struct {
......@@ -1072,4 +906,18 @@ typedef struct {
#define FAPI_NR_CONFIG_REQUEST_MASK_DL_BWP_DEDICATED 0x08
#define FAPI_NR_CONFIG_REQUEST_MASK_UL_BWP_DEDICATED 0x10
typedef struct {
uint32_t config_mask;
fapi_nr_pbch_config_t pbch_config; // MIB
fapi_nr_dl_bwp_common_config_t dl_bwp_common;
fapi_nr_dl_bwp_dedicated_config_t dl_bwp_dedicated;
fapi_nr_ul_bwp_common_config_t ul_bwp_common;
fapi_nr_ul_bwp_dedicated_config_t ul_bwp_dedicated;
} fapi_nr_config_request_t;
#endif
......@@ -121,10 +121,7 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t e
@param r_type indicates the relaying operation: 0: no_relaying, 1: unicast relaying type 1, 2: unicast relaying type 2, 3: multicast relaying
@param phy_vars_rn pointer to RN variables
*/
int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,
uint8_t do_pdcch_flag,runmode_t mode,
fapi_nr_dl_config_request_t *DLconfigreq);
int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t do_pdcch_flag,runmode_t mode);
int phy_procedures_slot_parallelization_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag,uint8_t do_pdcch_flag,runmode_t mode,relaying_type_t r_type);
......@@ -373,11 +370,10 @@ void nr_compute_srs_pos(lte_frame_type_t frameType,uint16_t isrs,uint16_t *psrsP
void set_tx_harq_id(NR_UE_ULSCH_t *ulsch, int harq_pid, int slot_tx);
int get_tx_harq_id(NR_UE_ULSCH_t *ulsch, int slot_tx);
fapi_nr_dl_config_bch_pdu *is_pbch_in_slot(fapi_nr_dl_config_request_t *DLconfigreq, int frame, int slot, int periodicity, uint16_t slots_per_frame);
int is_pbch_in_slot(fapi_nr_pbch_config_t *pbch_config, int frame, int slot, int periodicity, uint16_t slots_per_frame);
/*@}*/
#endif
......@@ -136,54 +136,55 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response)
if(scheduled_response->ul_config != NULL){
fapi_nr_ul_config_request_t *ul_config = scheduled_response->ul_config;
for(i=0; i<ul_config->number_pdus; ++i){
if(ul_config->ul_config_list[i].pdu_type == FAPI_NR_UL_CONFIG_TYPE_ULSCH){
if(ul_config->ul_config_list[i].pdu_type == FAPI_NR_UL_CONFIG_TYPE_PUSCH){
// pusch config pdu
fapi_nr_ul_config_ulsch_pdu_rel15_t *ulsch_config_pdu = &ul_config->ul_config_list[i].ulsch_config_pdu.ulsch_pdu_rel15;
uint8_t current_harq_pid = ulsch_config_pdu->harq_process_nbr;
ulsch0->harq_processes[current_harq_pid]->nb_rb = ulsch_config_pdu->number_rbs;
ulsch0->harq_processes[current_harq_pid]->first_rb = ulsch_config_pdu->start_rb;
ulsch0->harq_processes[current_harq_pid]->number_of_symbols = ulsch_config_pdu->number_symbols;
ulsch0->harq_processes[current_harq_pid]->start_symbol = ulsch_config_pdu->start_symbol;
ulsch0->harq_processes[current_harq_pid]->mcs = ulsch_config_pdu->mcs;
ulsch0->harq_processes[current_harq_pid]->DCINdi = ulsch_config_pdu->ndi;
ulsch0->harq_processes[current_harq_pid]->rvidx = ulsch_config_pdu->rv;
ulsch0->f_pusch = ulsch_config_pdu->absolute_delta_PUSCH;
fapi_nr_ul_config_pusch_pdu_rel15_t *pusch_config_pdu = &ul_config->ul_config_list[i].ulsch_config_pdu.ulsch_pdu_rel15;
uint8_t current_harq_pid = pusch_config_pdu->harq_process_nbr;
ulsch0->harq_processes[current_harq_pid]->nb_rb = pusch_config_pdu->number_rbs;
ulsch0->harq_processes[current_harq_pid]->first_rb = pusch_config_pdu->start_rb;
ulsch0->harq_processes[current_harq_pid]->number_of_symbols = pusch_config_pdu->number_symbols;
ulsch0->harq_processes[current_harq_pid]->start_symbol = pusch_config_pdu->start_symbol;
ulsch0->harq_processes[current_harq_pid]->mcs = pusch_config_pdu->mcs;
ulsch0->harq_processes[current_harq_pid]->DCINdi = pusch_config_pdu->ndi;
ulsch0->harq_processes[current_harq_pid]->rvidx = pusch_config_pdu->rv;
ulsch0->harq_processes[current_harq_pid]->Nl = pusch_config_pdu->n_layers;
ulsch0->f_pusch = pusch_config_pdu->absolute_delta_PUSCH;
}
if(ul_config->ul_config_list[i].pdu_type == FAPI_NR_UL_CONFIG_TYPE_UCI){
if(ul_config->ul_config_list[i].pdu_type == FAPI_NR_UL_CONFIG_TYPE_PUCCH){
// pucch config pdu
fapi_nr_ul_config_uci_pdu *uci_config_pdu = &ul_config->ul_config_list[i].uci_config_pdu;
fapi_nr_ul_config_pucch_pdu *pucch_config_pdu = &ul_config->ul_config_list[i].pucch_config_pdu;
uint8_t pucch_resource_id = 0; //FIXME!!!
uint8_t format = 1; // FIXME!!!
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.initialCyclicShift = uci_config_pdu->initialCyclicShift;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.nrofSymbols = uci_config_pdu->nrofSymbols;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.startingSymbolIndex = uci_config_pdu->startingSymbolIndex;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.nrofPRBs = uci_config_pdu->nrofPRBs;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->startingPRB = uci_config_pdu->startingPRB;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.timeDomainOCC = uci_config_pdu->timeDomainOCC;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.occ_length = uci_config_pdu->occ_length;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.occ_Index = uci_config_pdu->occ_Index;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->intraSlotFrequencyHopping = uci_config_pdu->intraSlotFrequencyHopping;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->secondHopPRB = uci_config_pdu->secondHopPRB; // Not sure this parameter is used
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].formatConfig[format-1]->additionalDMRS = uci_config_pdu->additionalDMRS; // At this point we need to know which format is going to be used
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].formatConfig[format-1]->pi2PBSK = uci_config_pdu->pi2PBSK;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0].pucch_GroupHopping = uci_config_pdu->pucch_GroupHopping;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0].hoppingId = uci_config_pdu->hoppingId;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0].p0_nominal = uci_config_pdu->p0_nominal;
/* pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.initialCyclicShift = uci_config_pdu->initialCyclicShift;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.nrofSymbols = uci_config_pdu->nrofSymbols;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.startingSymbolIndex = uci_config_pdu->startingSymbolIndex;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.nrofPRBs = uci_config_pdu->nrofPRBs;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->startingPRB = uci_config_pdu->startingPRB;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.timeDomainOCC = uci_config_pdu->timeDomainOCC;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.occ_length = uci_config_pdu->occ_length;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.occ_Index = uci_config_pdu->occ_Index;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->intraSlotFrequencyHopping = uci_config_pdu->intraSlotFrequencyHopping;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->secondHopPRB = uci_config_pdu->secondHopPRB; // Not sure this parameter is used
pucch_config_dedicated->formatConfig[format-1]->additionalDMRS = uci_config_pdu->additionalDMRS; // At this point we need to know which format is going to be used
pucch_config_dedicated->formatConfig[format-1]->pi2PBSK = uci_config_pdu->pi2PBSK;
pucch_config_common->pucch_GroupHopping = uci_config_pdu->pucch_GroupHopping;
pucch_config_common->hoppingId = uci_config_pdu->hoppingId;
pucch_config_common->p0_nominal = uci_config_pdu->p0_nominal;*/
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.initialCyclicShift = pucch_config_pdu->initialCyclicShift;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.nrofSymbols = pucch_config_pdu->nrofSymbols;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.startingSymbolIndex = pucch_config_pdu->startingSymbolIndex;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.nrofPRBs = pucch_config_pdu->nrofPRBs;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->startingPRB = pucch_config_pdu->startingPRB;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.timeDomainOCC = pucch_config_pdu->timeDomainOCC;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.occ_length = pucch_config_pdu->occ_length;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.occ_Index = pucch_config_pdu->occ_Index;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->intraSlotFrequencyHopping = pucch_config_pdu->intraSlotFrequencyHopping;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->secondHopPRB = pucch_config_pdu->secondHopPRB; // Not sure this parameter is used
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].formatConfig[format-1]->additionalDMRS = pucch_config_pdu->additionalDMRS; // At this point we need to know which format is going to be used
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].formatConfig[format-1]->pi2PBSK = pucch_config_pdu->pi2PBSK;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0].pucch_GroupHopping = pucch_config_pdu->pucch_GroupHopping;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0].hoppingId = pucch_config_pdu->hoppingId;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0].p0_nominal = pucch_config_pdu->p0_nominal;
/* pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.initialCyclicShift = pucch_config_pdu->initialCyclicShift;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.nrofSymbols = pucch_config_pdu->nrofSymbols;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.startingSymbolIndex = pucch_config_pdu->startingSymbolIndex;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.nrofPRBs = pucch_config_pdu->nrofPRBs;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->startingPRB = pucch_config_pdu->startingPRB;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.timeDomainOCC = pucch_config_pdu->timeDomainOCC;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.occ_length = pucch_config_pdu->occ_length;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.occ_Index = pucch_config_pdu->occ_Index;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->intraSlotFrequencyHopping = pucch_config_pdu->intraSlotFrequencyHopping;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->secondHopPRB = pucch_config_pdu->secondHopPRB; // Not sure this parameter is used
pucch_config_dedicated->formatConfig[format-1]->additionalDMRS = pucch_config_pdu->additionalDMRS; // At this point we need to know which format is going to be used
pucch_config_dedicated->formatConfig[format-1]->pi2PBSK = pucch_config_pdu->pi2PBSK;
pucch_config_common->pucch_GroupHopping = pucch_config_pdu->pucch_GroupHopping;
pucch_config_common->hoppingId = pucch_config_pdu->hoppingId;
pucch_config_common->p0_nominal = pucch_config_pdu->p0_nominal;*/
}
if(ul_config->ul_config_list[i].pdu_type == FAPI_NR_UL_CONFIG_TYPE_PRACH){
// prach config pdu
......@@ -255,3 +256,4 @@ int8_t nr_ue_phy_config_request(nr_phy_config_t *phy_config){
return 0;
}
This diff is collapsed.
......@@ -103,7 +103,7 @@ int16_t get_pucch_tx_power_ue(PHY_VARS_NR_UE *ue,
int P_O_PUCCH = P_O_NOMINAL_PUCCH + P_O_UE_PUCCH;
int16_t PL = get_nr_PL(ue,gNB_id); /* LTE function because NR path loss not yet implemented FFS TODO NR */
int16_t PL = 100;//get_PL(ue->Mod_id, ue->CC_id, gNB_id); /* LTE function because NR path loss not yet implemented FFS TODO NR */
int16_t delta_F_PUCCH = power_config->deltaF_PUCCH_f[pucch_format];
......@@ -214,3 +214,4 @@ int16_t get_pucch_tx_power_ue(PHY_VARS_NR_UE *ue,
return (pucch_power);
}
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
/* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
......@@ -53,6 +52,8 @@
uint8_t is_cqi_TXOp(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t gNB_id);
uint8_t is_ri_TXOp(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t gNB_id);
/*
void nr_generate_pucch0(int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms,
......@@ -109,9 +110,8 @@ void nr_generate_pucch3_4(int32_t **txdataF,
/**************** functions **************************************/
uint8_t is_nr_cqi_TXOp(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id) { return(0); }
uint8_t is_nr_ri_TXOp(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id) { return(0);}
//extern uint8_t is_cqi_TXOp(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id);
//extern uint8_t is_ri_TXOp(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id);
/*******************************************************************
*
* NAME : pucch_procedures_ue_nr
......@@ -226,10 +226,10 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
&n_HARQ_ACK, reset_harq); // 1 to reset ACK/NACK status : 0 otherwise
cqi_status = ((ue->cqi_report_config[gNB_id].CQI_ReportPeriodic.cqi_PMI_ConfigIndex>0) &&
(is_nr_cqi_TXOp(ue,proc,gNB_id) == 1));
(is_cqi_TXOp(ue,proc,gNB_id) == 1));
ri_status = ((ue->cqi_report_config[gNB_id].CQI_ReportPeriodic.ri_ConfigIndex>0) &&
(is_nr_ri_TXOp(ue,proc,gNB_id) == 1));
(is_ri_TXOp(ue,proc,gNB_id) == 1));
csi_status = get_csi_nr(ue, gNB_id, &csi_payload);
......@@ -1214,3 +1214,4 @@ void set_csi_nr(int csi_status, uint32_t csi_payload)
}
}
......@@ -59,43 +59,6 @@ double cpuf;
int nfapi_mode = 0;
uint16_t NB_UE_INST = 1;
int oai_nfapi_hi_dci0_req(nfapi_hi_dci0_request_t *hi_dci0_req) {
return (0);
}
int oai_nfapi_tx_req(nfapi_tx_request_t *tx_req) {
return (0);
}
int oai_nfapi_dl_config_req(nfapi_dl_config_request_t *dl_config_req) {
return (0);
}
int oai_nfapi_ul_config_req(nfapi_ul_config_request_t *ul_config_req) {
return (0);
}
int oai_nfapi_nr_dl_config_req(nfapi_nr_dl_config_request_t *dl_config_req) {
return (0);
}
uint32_t from_nrarfcn(int nr_bandP, uint32_t dl_earfcn) {
return (0);
}
int32_t get_nr_uldl_offset(int eutra_bandP) {
return (0);