Commit 7b242076 authored by Raphael Defosseux's avatar Raphael Defosseux
Browse files

Merge remote-tracking branch 'origin/NR_UE_reworking_UCI_procedures' into integration_2021_w32

parents efc696cc 39307247
......@@ -1506,7 +1506,6 @@ set(SCHED_SRC_NR_UE
${OPENAIR1_DIR}/SCHED_NR_UE/phy_frame_config_nr_ue.c
${OPENAIR1_DIR}/SCHED_NR_UE/harq_nr.c
${OPENAIR1_DIR}/SCHED_NR_UE/pucch_uci_ue_nr.c
${OPENAIR1_DIR}/SCHED_NR_UE/pucch_power_control_ue_nr.c
)
add_library(SCHED_NR_UE_LIB ${SCHED_SRC_NR_UE})
......
......@@ -220,7 +220,6 @@ static void UE_synch(void *arg) {
LOG_I(PHY, "[UE thread Synch] Running Initial Synch (mode %d)\n",UE->mode);
uint64_t dl_carrier, ul_carrier;
double rx_gain_off = 0;
nr_get_carrier_frequencies(&UE->frame_parms, &dl_carrier, &ul_carrier);
if (nr_initial_sync(&syncD->proc, UE, 2) == 0) {
......@@ -230,7 +229,7 @@ static void UE_synch(void *arg) {
// rerun with new cell parameters and frequency-offset
// todo: the freq_offset computed on DL shall be scaled before being applied to UL
nr_rf_card_config(&openair0_cfg[UE->rf_map.card], rx_gain_off, ul_carrier, dl_carrier, freq_offset);
nr_rf_card_config_freq(&openair0_cfg[UE->rf_map.card], ul_carrier, dl_carrier, freq_offset);
LOG_I(PHY,"Got synch: hw_slot_offset %d, carrier off %d Hz, rxgain %f (DL %f Hz, UL %f Hz)\n",
hw_slot_offset,
......@@ -264,7 +263,7 @@ static void UE_synch(void *arg) {
freq_offset *= -1;
nr_rf_card_config(&openair0_cfg[UE->rf_map.card], rx_gain_off, ul_carrier, dl_carrier, freq_offset);
nr_rf_card_config_freq(&openair0_cfg[UE->rf_map.card], ul_carrier, dl_carrier, freq_offset);
LOG_I(PHY, "Initial sync failed: trying carrier off %d Hz\n", freq_offset);
......@@ -307,11 +306,12 @@ void processSlotTX(void *arg) {
ul_indication.frame_tx = proc->frame_tx;
ul_indication.slot_tx = proc->nr_slot_tx;
ul_indication.thread_id = proc->thread_id;
ul_indication.ue_sched_mode = rxtxD->ue_sched_mode;
UE->if_inst->ul_indication(&ul_indication);
}
if (UE->mode != loop_through_memory) {
if ((UE->mode != loop_through_memory) && (rxtxD->ue_sched_mode != NOT_PUSCH)) {
phy_procedures_nrUE_TX(UE,proc,0);
}
}
......@@ -358,6 +358,9 @@ void processSlotRX(void *arg) {
nr_pdcp_tick(proc->frame_rx, proc->nr_slot_rx / UE->frame_parms.slots_per_subframe);
}
}
// calling UL_indication to schedule things other than PUSCH (eg, PUCCH)
rxtxD->ue_sched_mode = NOT_PUSCH;
processSlotTX(rxtxD);
// Wait for PUSCH processing to finish
notifiedFIFO_elt_t *res;
......@@ -365,6 +368,7 @@ void processSlotRX(void *arg) {
delNotifiedFIFO_elt(res);
} else {
rxtxD->ue_sched_mode = SCHED_ALL;
processSlotTX(rxtxD);
}
......@@ -373,8 +377,7 @@ void processSlotRX(void *arg) {
if (get_softmodem_params()->usim_test==0) {
pucch_procedures_ue_nr(UE,
gNB_id,
proc,
FALSE);
proc);
}
LOG_D(PHY, "Sending Uplink data \n");
......
......@@ -372,7 +372,8 @@ void init_openair0(void) {
nr_get_carrier_frequencies(frame_parms, &dl_carrier, &ul_carrier);
nr_rf_card_config(&openair0_cfg[card], rx_gain_off, ul_carrier, dl_carrier, freq_off);
nr_rf_card_config_freq(&openair0_cfg[card], ul_carrier, dl_carrier, freq_off);
nr_rf_card_config_gain(&openair0_cfg[card], rx_gain_off);
openair0_cfg[card].configFilename = get_softmodem_params()->rf_config_file;
......
......@@ -181,6 +181,16 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
}
}
/////////////////////////PUCCH init/////////////////////////
///////////
for (th_id = 0; th_id < RX_NB_TH_MAX; th_id++) {
for (gNB_id = 0; gNB_id < ue->n_connected_gNB; gNB_id++) {
ue->pucch_vars[th_id][gNB_id] = (NR_UE_PUCCH *)malloc16(sizeof(NR_UE_PUCCH));
for (i=0; i<2; i++)
ue->pucch_vars[th_id][gNB_id]->active[i] = false;
}
}
///////////
////////////////////////////////////////////////////////////////////////////////////////////
......
......@@ -129,8 +129,10 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
//------------------generate DMRS------------------//
if (pusch_pdu->transform_precoding == transform_precoder_disabled) {
nr_pusch_dmrs_rx(gNB, Ns, gNB->nr_gold_pusch_dmrs[pusch_pdu->scid][Ns][symbol], &pilot[0], 1000, 0, nb_rb_pusch, (pusch_pdu->bwp_start + pusch_pdu->rb_start)*NR_NB_SC_PER_RB, pusch_pdu->dmrs_config_type);
// transform precoding = 1 means disabled
if (pusch_pdu->transform_precoding == 1) {
nr_pusch_dmrs_rx(gNB, Ns, gNB->nr_gold_pusch_dmrs[pusch_pdu->scid][Ns][symbol], &pilot[0], 1000, 0, nb_rb_pusch,
(pusch_pdu->bwp_start + pusch_pdu->rb_start)*NR_NB_SC_PER_RB, pusch_pdu->dmrs_config_type);
}
else { // if transform precoding or SC-FDMA is enabled in Uplink
......
......@@ -1317,7 +1317,8 @@ int nr_rx_pusch(PHY_VARS_gNB *gNB,
rel15_ul->rb_size);
stop_meas(&gNB->ulsch_mrc_stats);
if (rel15_ul->transform_precoding == transform_precoder_enabled) {
// transform precoding = 0 means enabled
if (rel15_ul->transform_precoding == 0) {
#ifdef __AVX2__
// For odd number of resource blocks need byte alignment to multiple of 8
......
......@@ -963,7 +963,8 @@ uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
currentPtrDCI);
n_rnti = rel15->rnti;
LOG_D(PHY, "(%i.%i) dci indication (rnti %x,dci format %s,n_CCE %d,payloadSize %d)\n", proc->frame_rx, proc->nr_slot_rx,n_rnti,nr_dci_format_string[rel15->dci_format_options[k]],CCEind,dci_length);
LOG_D(PHY, "(%i.%i) dci indication (rnti %x,dci format %s,n_CCE %d,payloadSize %d)\n",
proc->frame_rx, proc->nr_slot_rx,n_rnti,nr_dci_format_string[rel15->dci_format_options[k]],CCEind,dci_length);
if (crc == n_rnti) {
LOG_D(PHY, "(%i.%i) Received dci indication (rnti %x,dci format %s,n_CCE %d,payloadSize %d,payload %llx)\n",
proc->frame_rx, proc->nr_slot_rx,n_rnti,nr_dci_format_string[rel15->dci_format_options[k]],CCEind,dci_length,*(unsigned long long*)dci_estimation);
......@@ -978,6 +979,7 @@ uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
dci_ind->slot = proc->nr_slot_rx;
dci_ind->dci_list[dci_ind->number_of_dcis].rnti = n_rnti;
dci_ind->dci_list[dci_ind->number_of_dcis].n_CCE = CCEind;
dci_ind->dci_list[dci_ind->number_of_dcis].N_CCE = L;
dci_ind->dci_list[dci_ind->number_of_dcis].dci_format = rel15->dci_format_options[k];
dci_ind->dci_list[dci_ind->number_of_dcis].payloadSize = dci_length;
memcpy((void*)dci_ind->dci_list[dci_ind->number_of_dcis].payloadBits,(void*)dci_estimation,8);
......
......@@ -625,9 +625,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
LOG_D(PHY,"[UE %d] DLSCH: Setting NAK for SFN/SF %d/%d (pid %d, status %d, round %d, TBS %d, mcs %d) Kr %d r %d harq_process->round %d\n",
phy_vars_ue->Mod_id, frame, nr_slot_rx, harq_pid,harq_process->status, harq_process->round,harq_process->TBS,harq_process->mcs,Kr,r,harq_process->round);
harq_process->harq_ack.ack = 0;
harq_process->harq_ack.harq_id = harq_pid;
harq_process->harq_ack.send_harq_status = 1;
harq_process->ack = 0;
harq_process->errors[harq_process->round]++;
if (harq_process->round >= dlsch->Mlimit) {
......@@ -650,9 +648,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
harq_process->status = SCH_IDLE;
harq_process->round = 0;
harq_process->harq_ack.ack = 1;
harq_process->harq_ack.harq_id = harq_pid;
harq_process->harq_ack.send_harq_status = 1;
harq_process->ack = 1;
//LOG_D(PHY,"[UE %d] DLSCH: Setting ACK for SFN/SF %d/%d (pid %d, status %d, round %d, TBS %d, mcs %d)\n",
// phy_vars_ue->Mod_id, frame, subframe, harq_pid, harq_process->status, harq_process->round,harq_process->TBS,harq_process->mcs);
......@@ -1170,9 +1166,7 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
if (LOG_DEBUGFLAG(DEBUG_DLSCH_DECOD))
LOG_I(PHY,"[UE %d] DLSCH: Setting NAK for SFN/SF %d/%d (pid %d, status %d, round %d, TBS %d, mcs %d) Kr %d r %d harq_process->round %d\n",
phy_vars_ue->Mod_id, frame, nr_slot_rx, harq_pid,harq_process->status, harq_process->round,harq_process->TBS,harq_process->mcs,Kr,r,harq_process->round);
harq_process->harq_ack.ack = 0;
harq_process->harq_ack.harq_id = harq_pid;
harq_process->harq_ack.send_harq_status = 1;
harq_process->ack = 0;
harq_process->errors[harq_process->round]++;
harq_process->round++;
......@@ -1194,9 +1188,7 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
harq_process->status = SCH_IDLE;
harq_process->round = 0;
harq_process->harq_ack.ack = 1;
harq_process->harq_ack.harq_id = harq_pid;
harq_process->harq_ack.send_harq_status = 1;
harq_process->ack = 1;
//LOG_I(PHY,"[UE %d] DLSCH: Setting ACK for SFN/SF %d/%d (pid %d, status %d, round %d, TBS %d, mcs %d)\n",
// phy_vars_ue->Mod_id, frame, subframe, harq_pid, harq_process->status, harq_process->round,harq_process->TBS,harq_process->mcs);
......
......@@ -607,7 +607,7 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
uint16_t number_pdus = 1;
nr_fill_dl_indication(&dl_indication, NULL, &rx_ind, proc, ue, gNB_id);
nr_fill_rx_indication(&rx_ind, FAPI_NR_RX_PDU_TYPE_SSB, gNB_id, ue, NULL, number_pdus);
nr_fill_rx_indication(&rx_ind, FAPI_NR_RX_PDU_TYPE_SSB, gNB_id, ue, NULL, NULL, number_pdus);
if (ue->if_inst && ue->if_inst->dl_indication)
ue->if_inst->dl_indication(&dl_indication, NULL);
......
......@@ -1475,8 +1475,10 @@ void nr_get_carrier_frequencies(NR_DL_FRAME_PARMS *fp,
@param dl_Carrier DL carrier to be set
@param freq_offset Freq offset to be set
*/
void nr_rf_card_config(openair0_config_t *openair0_cfg,
double rx_gain_off,
void nr_rf_card_config_gain(openair0_config_t *openair0_cfg,
double rx_gain_off);
void nr_rf_card_config_freq(openair0_config_t *openair0_cfg,
uint64_t ul_Carrier,
uint64_t dl_Carrier,
int freq_offset);
......
......@@ -56,34 +56,6 @@ typedef enum {
RETRANSMISSION_HARQ
} harq_result_t;
//#if defined(UPGRADE_RAT_NR)
#if 1
typedef struct {
/// HARQ process id
uint8_t harq_id;
/// HARQ rx status
harq_result_t rx_status;
/// ACK bits (after decoding) 0:NACK / 1:ACK / 2:DTX
uint8_t ack;
/// send status (for PUCCH)
uint8_t send_harq_status;
/// nCCE (for PUCCH)
uint8_t nCCE;
/// DAI value detected from DCI1/1a/1b/1d/2/2a/2b/2c. 0xff indicates not touched
uint8_t vDAI_DL;
/// DAI value detected from DCI0/4. 0xff indicates not touched
uint8_t vDAI_UL;
/// allow to define pucch parameters TS 38.213 9.2.3 UE procedure for reporting HARQ-ACK
uint8_t pucch_resource_indicator;
/// slot on which feedback ack should be send to network
uint16_t slot_for_feedback_ack;
/// index of a first CCE for the PDCCH reception
uint8_t n_CCE;
/// number of CCEs in a control resource set of a PDCCH reception conveying DCI format 1_0
uint8_t N_CCE;
} NR_UE_HARQ_STATUS_t;
#endif
typedef struct {
/// NDAPI struct for UE
nfapi_nr_ue_pusch_pdu_t pusch_pdu;
......@@ -319,7 +291,7 @@ typedef struct {
/// codeword this transport block is mapped to
uint8_t codeword;
/// HARQ-ACKs
NR_UE_HARQ_STATUS_t harq_ack;
uint8_t ack;
/// PTRS Frequency Density
uint8_t PTRSFreqDensity;
/// PTRS Time Density
......
......@@ -48,8 +48,38 @@ void nr_get_carrier_frequencies(NR_DL_FRAME_PARMS *fp, uint64_t *dl_carrier, uin
}
void nr_rf_card_config(openair0_config_t *openair0_cfg,
double rx_gain_offset,
void nr_rf_card_config_gain(openair0_config_t *openair0_cfg,
double rx_gain_off){
uint8_t mod_id = 0;
uint8_t cc_id = 0;
PHY_VARS_NR_UE *ue = PHY_vars_UE_g[mod_id][cc_id];
int rf_chain = ue->rf_map.chain;
double rx_gain = ue->rx_total_gain_dB;
double tx_gain = ue->tx_total_gain_dB;
for (int i = rf_chain; i < rf_chain + 4; i++) {
if (tx_gain)
openair0_cfg->tx_gain[i] = tx_gain;
if (rx_gain)
openair0_cfg->rx_gain[i] = rx_gain - rx_gain_off;
openair0_cfg->autocal[i] = 1;
if (i < openair0_cfg->rx_num_channels) {
LOG_I(PHY, "HW: Configuring channel %d (rf_chain %d): setting tx_gain %f, rx_gain %f\n",
i,
rf_chain,
openair0_cfg->tx_gain[i],
openair0_cfg->rx_gain[i]);
}
}
}
void nr_rf_card_config_freq(openair0_config_t *openair0_cfg,
uint64_t ul_carrier,
uint64_t dl_carrier,
int freq_offset){
......@@ -58,8 +88,6 @@ void nr_rf_card_config(openair0_config_t *openair0_cfg,
uint8_t cc_id = 0;
PHY_VARS_NR_UE *ue = PHY_vars_UE_g[mod_id][cc_id];
int rf_chain = ue->rf_map.chain;
double rx_gain = ue->rx_total_gain_dB;
double tx_gain = ue->tx_total_gain_dB;
for (int i = rf_chain; i < rf_chain + 4; i++) {
......@@ -73,19 +101,12 @@ void nr_rf_card_config(openair0_config_t *openair0_cfg,
else
openair0_cfg->tx_freq[i] = 0.0;
if (tx_gain)
openair0_cfg->tx_gain[i] = tx_gain;
if (rx_gain)
openair0_cfg->rx_gain[i] = rx_gain - rx_gain_offset;
openair0_cfg->autocal[i] = 1;
if (i < openair0_cfg->rx_num_channels) {
LOG_I(PHY, "HW: Configuring channel %d (rf_chain %d): setting tx_gain %f, rx_gain %f, tx_freq %f Hz, rx_freq %f Hz\n",
LOG_I(PHY, "HW: Configuring channel %d (rf_chain %d): setting tx_freq %f Hz, rx_freq %f Hz\n",
i,
rf_chain,
openair0_cfg->tx_gain[i],
openair0_cfg->rx_gain[i],
openair0_cfg->tx_freq[i],
openair0_cfg->rx_freq[i]);
}
......
......@@ -252,7 +252,8 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
uint8_t u = 0, v = 0;
int16_t *dmrs_seq = NULL;
if (pusch_pdu->transform_precoding == transform_precoder_enabled) {
// if transform precoding is enbaled (value 0)
if (pusch_pdu->transform_precoding == 0) {
uint32_t nb_re_pusch=nb_rb * NR_NB_SC_PER_RB;
uint32_t y_offset = 0;
......@@ -353,8 +354,8 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
if ((ul_dmrs_symb_pos >> l) & 0x01) {
is_dmrs_sym = 1;
if (pusch_pdu->transform_precoding == transform_precoder_disabled){
// transform precoding disabled (value 1)
if (pusch_pdu->transform_precoding == 1){
if (dmrs_type == pusch_dmrs_type1)
dmrs_idx = (pusch_pdu->bwp_start + start_rb)*6;
......@@ -373,7 +374,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
} else if (pusch_pdu->pdu_bit_map & PUSCH_PDU_BITMAP_PUSCH_PTRS) {
AssertFatal(pusch_pdu->transform_precoding == transform_precoder_disabled, "PTRS NOT SUPPORTED IF TRANSFORM PRECODING IS ENABLED\n");
AssertFatal(pusch_pdu->transform_precoding == 1, "PTRS NOT SUPPORTED IF TRANSFORM PRECODING IS ENABLED\n");
if(is_ptrs_symbol(l, ulsch_ue->ptrs_symbols)) {
is_ptrs_sym = 1;
......@@ -404,8 +405,8 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
}
if (is_dmrs == 1) {
if (pusch_pdu->transform_precoding == transform_precoder_enabled) {
// if transform precoding is enabled
if (pusch_pdu->transform_precoding == 0) {
((int16_t*)txdataF[ap])[(sample_offsetF)<<1] = (Wt[l_prime[0]]*Wf[k_prime]*AMP*dmrs_seq[2*dmrs_idx]) >> 15;
((int16_t*)txdataF[ap])[((sample_offsetF)<<1) + 1] = (Wt[l_prime[0]]*Wf[k_prime]*AMP*dmrs_seq[(2*dmrs_idx) + 1]) >> 15;
......
This diff is collapsed.
......@@ -49,65 +49,30 @@
void nr_generate_pucch0(PHY_VARS_NR_UE *ue,
int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms,
long pucch_GroupHopping,
long hoppingId,
int16_t amp,
int nr_slot_tx,
uint8_t m0,
uint8_t mcs,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint16_t startingPRB,
uint16_t secondHopPRB);
fapi_nr_ul_config_pucch_pdu *pucch_pdu);
void nr_generate_pucch1(PHY_VARS_NR_UE *ue,
int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
int nr_slot_tx,
uint8_t m0,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint16_t startingPRB,
uint16_t startingPRB_intraSlotHopping,
uint8_t timeDomainOCC,
uint8_t nr_bit);
fapi_nr_ul_config_pucch_pdu *pucch_pdu);
void nr_generate_pucch2(PHY_VARS_NR_UE *ue,
uint16_t crnti,
uint32_t dmrs_scrambling_id,
uint32_t data_scrambling_id,
int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
int nr_slot_tx,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint8_t nrofPRB,
uint16_t startingPRB,
uint8_t nr_bit);
fapi_nr_ul_config_pucch_pdu *pucch_pdu);
void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
uint16_t crnti,
int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms,
pucch_format_nr_t fmt,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
int nr_slot_tx,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint8_t nrofPRB,
uint16_t startingPRB,
uint16_t startingPRB_intraSlotHopping,
uint8_t nr_bit,
uint8_t occ_length_format4,
uint8_t occ_index_format4);
fapi_nr_ul_config_pucch_pdu *pucch_pdu);
// tables for mcs values for different payloads
static const uint8_t table1_mcs[]={0,6,3,9};
......
......@@ -235,6 +235,11 @@ typedef struct {
int32_t *txdataF_layers[NR_MAX_NB_LAYERS];
} NR_UE_PUSCH;
typedef struct {
bool active[2];
fapi_nr_ul_config_pucch_pdu pucch_pdu[2];
} NR_UE_PUCCH;
typedef struct {
/// \brief Holds the transmit data in time domain.
/// For IFFT_FPGA this points to the same memory as PHY_vars->tx_vars[a].TX_DMA_BUFFER.
......@@ -810,6 +815,7 @@ typedef struct {
NR_UE_PDCCH *pdcch_vars[RX_NB_TH_MAX][NUMBER_OF_CONNECTED_gNB_MAX];
NR_UE_PRACH *prach_vars[NUMBER_OF_CONNECTED_gNB_MAX];
NR_UE_PUSCH *pusch_vars[RX_NB_TH_MAX][NUMBER_OF_CONNECTED_gNB_MAX];
NR_UE_PUCCH *pucch_vars[RX_NB_TH_MAX][NUMBER_OF_CONNECTED_gNB_MAX];
NR_UE_DLSCH_t *dlsch[RX_NB_TH_MAX][NUMBER_OF_CONNECTED_gNB_MAX][NR_MAX_NB_CODEWORDS]; // two RxTx Threads
NR_UE_ULSCH_t *ulsch[RX_NB_TH_MAX][NUMBER_OF_CONNECTED_gNB_MAX][NR_MAX_NB_CODEWORDS]; // two code words
NR_UE_DLSCH_t *dlsch_SI[NUMBER_OF_CONNECTED_gNB_MAX];
......@@ -957,15 +963,10 @@ typedef struct {
/// PUSCH contention-based access vars
PUSCH_CA_CONFIG_DEDICATED pusch_ca_config_dedicated[NUMBER_OF_eNB_MAX]; // lola
/// PUCCH variables
PUCCH_CONFIG_DEDICATED pucch_config_dedicated[NUMBER_OF_CONNECTED_gNB_MAX];
//#if defined(UPGRADE_RAT_NR)
#if 1
SystemInformationBlockType1_nr_t systemInformationBlockType1_nr;
PUCCH_ConfigCommon_nr_t pucch_config_common_nr[NUMBER_OF_CONNECTED_gNB_MAX];
PUCCH_Config_t pucch_config_dedicated_nr[NUMBER_OF_CONNECTED_gNB_MAX];
#endif
uint8_t ncs_cell[20][7];
......@@ -1068,6 +1069,7 @@ typedef struct {
typedef struct nr_rxtx_thread_data_s {
UE_nr_rxtx_proc_t proc;
PHY_VARS_NR_UE *UE;
NR_UE_SCHED_MODE_t ue_sched_mode;
notifiedFIFO_t txFifo;
} nr_rxtx_thread_data_t;
......
......@@ -427,23 +427,10 @@ typedef struct {
*
************************************************************************/
#define MAX_NR_OF_PUCCH_P0_PER_SET (8)
#define NUMBER_PUCCH_FORMAT_NR (5)
typedef int8_t power_level_t; /* INTEGER (-16..15) */
typedef struct {
uint8_t p0_PUCCH_Id; /* INTEGER (1..8) */
power_level_t p0_PUCCH_Value;
} P0_PUCCH_t;
typedef struct {
power_level_t deltaF_PUCCH_f[NUMBER_PUCCH_FORMAT_NR];
P0_PUCCH_t *p0_Set[MAX_NR_OF_PUCCH_P0_PER_SET];
// pathlossReferenceRSs SEQUENCE (SIZE (1..maxNrofPUCCH-PathlossReferenceRSs)) OF PUCCH-PathlossReferenceRS OPTIONAL, -- Need M
int8_t twoPUCCH_PC_AdjustmentStates;
} PUCCH_PowerControl_t;
/***********************************************************************
*
......@@ -633,9 +620,10 @@ typedef struct {
PUCCH_FormatConfig_t *formatConfig[NUMBER_PUCCH_FORMAT_NR-1]; /* format 0 is not there */
uint8_t dl_DataToUL_ACK[NB_DL_DATA_TO_UL_ACK]; /* table TS 38.213 Table 9.2.3-1: Mapping of PSDCH-to-HARQ_feedback timing indicator field values to numbers of slots */
void *spatial_Relation_Info[MAX_NR_OF_SPATIAL_RELATION_INFOS];
PUCCH_PowerControl_t pucch_PowerControl;
} PUCCH_Config_t;
/***********************************************************************
*
* FUNCTIONALITY : Scheduling Request Configuration (SR)
......
......@@ -417,6 +417,7 @@ void nr_fill_rx_indication(fapi_nr_rx_indication_t *rx_ind,
uint8_t gNB_id,
PHY_VARS_NR_UE *ue,
NR_UE_DLSCH_t *dlsch0,
NR_UE_DLSCH_t *dlsch1,
uint16_t n_pdus);
......
......@@ -47,6 +47,7 @@ const char *ul_pdu_type[]={"PRACH", "PUCCH", "PUSCH", "SRS"};
int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
bool found = false;
if(scheduled_response != NULL){
module_id_t module_id = scheduled_response->module_id;
......@@ -59,7 +60,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
NR_UE_DLSCH_t *dlsch0 = NULL;
NR_UE_PDCCH *pdcch_vars = PHY_vars_UE_g[module_id][cc_id]->pdcch_vars[thread_id][0];
NR_UE_ULSCH_t *ulsch0 = PHY_vars_UE_g[module_id][cc_id]->ulsch[thread_id][0][0];
NR_DL_FRAME_PARMS frame_parms = PHY_vars_UE_g[module_id][cc_id]->frame_parms;
NR_UE_PUCCH *pucch_vars = PHY_vars_UE_g[module_id][cc_id]->pucch_vars[thread_id][0];
if(scheduled_response->dl_config != NULL){
fapi_nr_dl_config_request_t *dl_config = scheduled_response->dl_config;
......@@ -118,26 +119,19 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
dlsch0_harq->mcs = dlsch_config_pdu->mcs;
dlsch0_harq->rvidx = dlsch_config_pdu->rv;
dlsch0->g_pucch = dlsch_config_pdu->accumulated_delta_PUCCH;
dlsch0_harq->harq_ack.pucch_resource_indicator = dlsch_config_pdu->pucch_resource_id;
dlsch0_harq->harq_ack.slot_for_feedback_ack = (slot+dlsch_config_pdu->pdsch_to_harq_feedback_time_ind)%frame_parms.slots_per_frame;
//get nrOfLayers from DCI info
uint8_t Nl = 0;
for (i = 0; i < 4; i++) {
if (dlsch_config_pdu->dmrs_ports[i] >= i) Nl += 1;
}
dlsch0_harq->Nl = Nl;
dlsch0_harq->mcs_table=dlsch_config_pdu->mcs_table;
dlsch0_harq->harq_ack.rx_status = downlink_harq_process(dlsch0_harq, dlsch0->current_harq_pid, dlsch_config_pdu->ndi, dlsch0->rnti_type);
downlink_harq_process(dlsch0_harq, dlsch0->current_harq_pid, dlsch_config_pdu->ndi, dlsch0->rnti_type);
if (dlsch0_harq->status != ACTIVE) {
// dlsch0_harq->status not ACTIVE may be due to false retransmission. Reset the
// following flag to skip PDSCH procedures in that case.
dlsch0->active = 0;
dlsch0_harq->harq_ack.ack = 1;
dlsch0_harq->harq_ack.send_harq_status = 1;
}
dlsch0_harq->harq_ack.vDAI_DL = dlsch_config_pdu->dai;
/* PTRS */
dlsch0_harq->PTRSFreqDensity = dlsch_config_pdu->PTRSFreqDensity;
dlsch0_harq->PTRSTimeDensity = dlsch_config_pdu->PTRSTimeDensity;
......@@ -145,7 +139,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
dlsch0_harq->nEpreRatioOfPDSCHToPTRS = dlsch_config_pdu->nEpreRatioOfPDSCHToPTRS;
dlsch0_harq->PTRSReOffset = dlsch_config_pdu->PTRSReOffset;
dlsch0_harq->pduBitmap = dlsch_config_pdu->pduBitmap;
LOG_D(MAC, ">>>> \tdlsch0->g_pucch = %d\tdlsch0_harq.mcs = %d\tpdsch_to_harq_feedback_time_ind = %d\tslot_for_feedback_ack = %d\n", dlsch0->g_pucch, dlsch0_harq->mcs, dlsch_config_pdu->pdsch_to_harq_feedback_time_ind, dlsch0_harq->harq_ack.slot_for_feedback_ack);
LOG_D(MAC, ">>>> \tdlsch0->g_pucch = %d\tdlsch0_harq.mcs = %d\n", dlsch0->g_pucch, dlsch0_harq->mcs);
}
}
}
......@@ -161,7 +155,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
AssertFatal(ul_config->ul_config_list[i].pdu_type <= FAPI_NR_UL_CONFIG_TYPES,"pdu_type %d out of bounds\n",ul_config->ul_config_list[i].pdu_type);
LOG_D(PHY, "In %s: processing %s PDU of %d total UL PDUs (ul_config %p) \n", __FUNCTION__, ul_pdu_type[ul_config->ul_config_list[i].pdu_type - 1], ul_config->number_pdus, ul_config);
uint8_t pdu_type = ul_config->ul_config_list[i].pdu_type, pucch_resource_id, current_harq_pid, format, gNB_id = 0;
uint8_t pdu_type = ul_config->ul_config_list[i].pdu_type, current_harq_pid, gNB_id = 0;
/* PRACH */
//NR_PRACH_RESOURCES_t *prach_resources;
fapi_nr_ul_config_prach_pdu *prach_config_pdu;
......@@ -169,9 +163,6 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu;