Commit fad5fbda authored by hardy's avatar hardy
Browse files

Merge remote-tracking branch 'origin/NR_CSIRS_tomerge' into integration_2021_wk30

parents d7839d8a 618e33ac
......@@ -283,7 +283,7 @@ The following features are valid for the gNB and the 5G-NR UE.
- PTRS support
- Support for 1, 2 and 4 TX antennas
- Support for up to 2 layers (currently limited to DMRS configuration type 2)
* NR-CSI Generation of sequence at PHY (**under integration**)
* NR-CSIRS Generation of sequence at PHY
* NR-PUSCH (including Segmentation, LDPC encoding, rate matching, scrambling, modulation, RB mapping, etc).
- PUSCH mapping type A and B
- DMRS configuration type 1 and 2
......@@ -319,6 +319,7 @@ The following features are valid for the gNB and the 5G-NR UE.
- MAC <-> PHY data interface using FAPI P7 interface for BCH PDU, DCI PDU, PDSCH PDU
- Scheduler procedures for SIB1
- Scheduler procedures for RA
- Scheduler procedures for CSI-RS
- MAC downlink scheduler (fixed allocations)
- MAC header generation (including timing advance)
- ACK / NACK handling and HARQ procedures for downlink
......@@ -349,7 +350,6 @@ The following features are valid for the gNB and the 5G-NR UE.
- PTRS support
- Support for 1, 2 and 4 RX antennas
- Support for up to 2 layers (currently limited to DMRS configuration type 2)
* NR-CSI Generation of sequence at PHY (**under integration**)
* NR-PUSCH (including Segmentation, LDPC encoding, rate matching, scrambling, modulation, RB mapping, etc).
- PUSCH mapping type A and B
- DMRS configuration type 1 and 2
......
......@@ -1571,8 +1571,7 @@ typedef struct
{
uint8_t csi_part1_crc;
uint16_t csi_part1_bit_len;
//! fixme
uint8_t* csi_part1_payload;//uint8_t[ceil(csiPart1BitLen/8)]
uint8_t* csi_part1_payload;
} nfapi_nr_csi_part1_pdu_t;
......@@ -1581,8 +1580,7 @@ typedef struct
{
uint8_t csi_part2_crc;
uint16_t csi_part2_bit_len;
//! fixme
uint8_t* csi_part2_payload;//uint8_t[ceil(csiPart2BitLen/8)]
uint8_t* csi_part2_payload;
} nfapi_nr_csi_part2_pdu_t;
//table 3-63
......
......@@ -227,16 +227,14 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
}
}
nr_init_csi_rs(gNB, cfg->cell_config.phy_cell_id.value);
/* Generate low PAPR type 1 sequences for PUSCH DMRS, these are used if transform precoding is enabled. */
generate_lowpapr_typ1_refsig_sequences(SHRT_MAX);
nr_init_csi_rs(gNB, 0); // TODO scramblingID currently hardcoded to 0, to be taken from higher layer parameter scramblingID when implemented
/// Transport init necessary for NR synchro
init_nr_transport(gNB);
gNB->first_run_I0_measurements = 1;
common_vars->rxdata = (int32_t **)malloc16(Prx*sizeof(int32_t*));
......
......@@ -145,7 +145,7 @@ void nr_init_csi_rs(PHY_VARS_gNB* gNB, uint32_t Nid)
reset = 1;
x2 = ((1<<10) * (fp->symbols_per_slot*slot+symb+1) * ((Nid<<1)+1) + (Nid));
for (uint32_t n=0; n<NR_MAX_PDCCH_DMRS_INIT_LENGTH_DWORD; n++) {
for (uint32_t n=0; n<NR_MAX_CSI_RS_INIT_LENGTH_DWORD; n++) {
csi_rs[slot][symb][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
......
......@@ -22,17 +22,22 @@
#include "PHY/NR_TRANSPORT/nr_transport_proto.h"
#include "PHY/MODULATION/nr_modulation.h"
#include "PHY/NR_REFSIG/nr_refsig.h"
//#define NR_CSIRS_DEBUG
int nr_generate_csi_rs(uint32_t **gold_csi_rs,
int32_t** txdataF,
int16_t amp,
NR_DL_FRAME_PARMS frame_parms,
nfapi_nr_dl_tti_csi_rs_pdu_rel15_t csi_params)
{
int16_t mod_csi[frame_parms.symbols_per_slot][NR_MAX_CSI_RS_LENGTH>>1];
void nr_generate_csi_rs(PHY_VARS_gNB *gNB,
int16_t amp,
nfapi_nr_dl_tti_csi_rs_pdu_rel15_t csi_params,
uint16_t cell_id,
int slot){
NR_DL_FRAME_PARMS frame_parms=gNB->frame_parms;
int32_t **txdataF = gNB->common_vars.txdataF;
int txdataF_offset = (slot%2)*frame_parms.samples_per_slot_wCP;
uint32_t **gold_csi_rs = gNB->nr_gold_csi_rs[slot];
int16_t mod_csi[frame_parms.symbols_per_slot][NR_MAX_CSI_RS_LENGTH>>1] __attribute__((aligned(16)));;
uint16_t b = csi_params.freq_domain;
uint16_t n, csi_bw, csi_start, p, k, l, mprime, na, kpn, csi_length;
uint8_t size, ports, kprime, lprime, i, gs;
......@@ -45,6 +50,22 @@ int nr_generate_csi_rs(uint32_t **gold_csi_rs,
AssertFatal(b!=0, "Invalid CSI frequency domain mapping: no bit selected in bitmap\n");
// pre-computed for scrambling id equel to cell id
// if the scrambling id is not the cell id we need to re-initialize the rs
if (csi_params.scramb_id != cell_id) {
uint8_t reset;
uint32_t x1, x2;
uint32_t Nid = csi_params.scramb_id;
for (uint8_t symb=0; symb<frame_parms.symbols_per_slot; symb++) {
reset = 1;
x2 = ((1<<10) * (frame_parms.symbols_per_slot*slot+symb+1) * ((Nid<<1)+1) + (Nid));
for (uint32_t n=0; n<NR_MAX_CSI_RS_INIT_LENGTH_DWORD; n++) {
gold_csi_rs[symb][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
}
}
switch (csi_params.row) {
// implementation of table 7.4.1.5.3-1 of 38.211
// lprime and kprime are the max value of l' and k'
......@@ -495,12 +516,12 @@ int nr_generate_csi_rs(uint32_t **gold_csi_rs,
if (rho < 1) {
if (csi_params.freq_density == 0)
csi_length = (((csi_bw + csi_start)>>1)<<kprime)<<1;
csi_length = (((csi_bw + csi_start)>>1)<<kprime)<<1;
else
csi_length = ((((csi_bw + csi_start)>>1)<<kprime)+1)<<1;
}
else
csi_length = (((uint16_t) rho*(csi_bw + csi_start))<<kprime)<<1;
csi_length = (((uint16_t) rho*(csi_bw + csi_start))<<kprime)<<1;
#ifdef NR_CSIRS_DEBUG
printf(" start rb %d, n. rbs %d, csi length %d\n",csi_start,csi_bw,csi_length);
......@@ -514,41 +535,36 @@ int nr_generate_csi_rs(uint32_t **gold_csi_rs,
// NZP CSI RS
if (csi_params.csi_type == 1) {
// assuming amp is the amplitude of SSB channels
switch (csi_params.power_control_offset_ss) {
case 0:
beta = (amp*ONE_OVER_SQRT2_Q15)>>15;
break;
case 1:
beta = amp;
break;
case 2:
beta = (amp*ONE_OVER_SQRT2_Q15)>>14;
break;
case 3:
beta = amp<<1;
break;
default:
AssertFatal(0==1, "Invalid SS power offset density index for CSI\n");
}
for (lp=0; lp<=lprime; lp++){
symb = csi_params.symb_l0;
nr_modulation(gold_csi_rs[symb+lp], csi_length, DMRS_MOD_ORDER, mod_csi[symb+lp]);
if ((csi_params.row == 5) || (csi_params.row == 7) || (csi_params.row == 11) || (csi_params.row == 13) || (csi_params.row == 16))
nr_modulation(gold_csi_rs[symb+1], csi_length, DMRS_MOD_ORDER, mod_csi[symb+1]);
if ((csi_params.row == 14) || (csi_params.row == 13) || (csi_params.row == 16) || (csi_params.row == 17)) {
symb = csi_params.symb_l1;
nr_modulation(gold_csi_rs[symb+lp], csi_length, DMRS_MOD_ORDER, mod_csi[symb+lp]);
if ((csi_params.row == 13) || (csi_params.row == 16))
nr_modulation(gold_csi_rs[symb+1], csi_length, DMRS_MOD_ORDER, mod_csi[symb+1]);
}
}
// assuming amp is the amplitude of SSB channels
switch (csi_params.power_control_offset_ss) {
case 0:
beta = (amp*ONE_OVER_SQRT2_Q15)>>15;
break;
case 1:
beta = amp;
break;
case 2:
beta = (amp*ONE_OVER_SQRT2_Q15)>>14;
break;
case 3:
beta = amp<<1;
break;
default:
AssertFatal(0==1, "Invalid SS power offset density index for CSI\n");
}
for (lp=0; lp<=lprime; lp++){
symb = csi_params.symb_l0;
nr_modulation(gold_csi_rs[symb+lp], csi_length, DMRS_MOD_ORDER, mod_csi[symb+lp]);
if ((csi_params.row == 5) || (csi_params.row == 7) || (csi_params.row == 11) || (csi_params.row == 13) || (csi_params.row == 16))
nr_modulation(gold_csi_rs[symb+1], csi_length, DMRS_MOD_ORDER, mod_csi[symb+1]);
if ((csi_params.row == 14) || (csi_params.row == 13) || (csi_params.row == 16) || (csi_params.row == 17)) {
symb = csi_params.symb_l1;
nr_modulation(gold_csi_rs[symb+lp], csi_length, DMRS_MOD_ORDER, mod_csi[symb+lp]);
if ((csi_params.row == 13) || (csi_params.row == 16))
nr_modulation(gold_csi_rs[symb+1], csi_length, DMRS_MOD_ORDER, mod_csi[symb+1]);
}
}
}
uint16_t start_sc = frame_parms.first_carrier_offset;
......@@ -586,16 +602,17 @@ int nr_generate_csi_rs(uint32_t **gold_csi_rs,
}
// ZP CSI RS
if (csi_params.csi_type == 2) {
((int16_t*)txdataF[p])[(l*frame_parms.ofdm_symbol_size + k)<<1] = 0;
((int16_t*)txdataF[p])[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = 0;
((int16_t*)txdataF[p])[((l*frame_parms.ofdm_symbol_size + k)<<1)+(2*txdataF_offset)] = 0;
((int16_t*)txdataF[p])[((l*frame_parms.ofdm_symbol_size + k)<<1)+1+(2*txdataF_offset)] = 0;
}
else {
((int16_t*)txdataF[p])[(l*frame_parms.ofdm_symbol_size + k)<<1] = (beta*wt*wf*mod_csi[l][mprime<<1]) >> 15;
((int16_t*)txdataF[p])[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (beta*wt*wf*mod_csi[l][(mprime<<1) + 1]) >> 15;
((int16_t*)txdataF[p])[((l*frame_parms.ofdm_symbol_size + k)<<1)+(2*txdataF_offset)] = (beta*wt*wf*mod_csi[l][mprime<<1]) >> 15;
((int16_t*)txdataF[p])[((l*frame_parms.ofdm_symbol_size + k)<<1)+1+(2*txdataF_offset)] = (beta*wt*wf*mod_csi[l][(mprime<<1) + 1]) >> 15;
}
#ifdef NR_CSIRS_DEBUG
printf("l,k (%d %d) seq. index %d \t port %d \t (%d,%d)\n",l,k-start_sc,mprime,p+3000,((int16_t*)txdataF[p])[(l*frame_parms.ofdm_symbol_size + k)<<1],
((int16_t*)txdataF[p])[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1]);
printf("l,k (%d %d) seq. index %d \t port %d \t (%d,%d)\n",l,k,mprime,p+3000,
((int16_t*)txdataF[p])[((l*frame_parms.ofdm_symbol_size + k)<<1)+(2*txdataF_offset)],
((int16_t*)txdataF[p])[((l*frame_parms.ofdm_symbol_size + k)<<1)+1+(2*txdataF_offset)]);
#endif
}
}
......@@ -603,6 +620,4 @@ int nr_generate_csi_rs(uint32_t **gold_csi_rs,
}
}
}
return 0;
}
......@@ -326,11 +326,11 @@ void init_prach_list(PHY_VARS_gNB *gNB);
void init_prach_ru_list(RU_t *ru);
void free_nr_ru_prach_entry(RU_t *ru, int prach_id);
int nr_generate_csi_rs(uint32_t **gold_csi_rs,
int32_t **txdataF,
int16_t amp,
NR_DL_FRAME_PARMS frame_parms,
nfapi_nr_dl_tti_csi_rs_pdu_rel15_t csi_params);
void nr_generate_csi_rs(PHY_VARS_gNB *gNB,
int16_t amp,
nfapi_nr_dl_tti_csi_rs_pdu_rel15_t csi_params,
uint16_t cell_id,
int slot);
void free_nr_prach_entry(PHY_VARS_gNB *gNB, int prach_id);
......
......@@ -289,7 +289,7 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB,
int32_t corr_re[2];
int32_t corr_im[2];
//int32_t no_corr = 0;
int seq_index;
int64_t temp;
int64_t av_corr=0;
......@@ -1375,7 +1375,7 @@ void nr_decode_pucch2(PHY_VARS_gNB *gNB,
rp2_im[aa] = (__m256i*)r_im_ext2[aa];
}
__m256i prod_re[Prx2],prod_im[Prx2];
int64_t corr=0;
uint64_t corr=0;
int cw_ML=0;
......@@ -1389,7 +1389,7 @@ void nr_decode_pucch2(PHY_VARS_gNB *gNB,
}
printf("\n");
#endif
int64_t corr_tmp = 0;
uint64_t corr_tmp = 0;
for (int group=0;group<ngroup;group++) {
// do complex correlation
......@@ -1421,8 +1421,8 @@ void nr_decode_pucch2(PHY_VARS_gNB *gNB,
prod_im[aa] = _mm256_hadds_epi16(prod_im[aa],prod_im[aa]);
}
int64_t corr_re=0,corr_im=0;
for (int aa=0;aa<Prx;aa++) {
LOG_D(PHY,"pucch2 cw %d group %d aa %d: (%d,%d)+(%d,%d) = (%d,%d)\n",cw,group,aa,
corr32_re[group][aa],corr32_im[group][aa],
......@@ -1499,11 +1499,11 @@ void nr_decode_pucch2(PHY_VARS_gNB *gNB,
if (cw==0) corr += ((int64_t)corr32_re[half_prb>>2][aa]*corr32_re[half_prb>>2][aa])+
((int64_t)corr32_im[half_prb>>2][aa]*corr32_im[half_prb>>2][aa]);
corr_re = ( corr32_re[half_prb>>2][aa]/(2*nc_group_size*4/2)+((int16_t*)(&prod_re[aa]))[0]);
corr_im = ( corr32_im[half_prb>>2][aa]/(2*nc_group_size*4/2)+((int16_t*)(&prod_im[aa]))[0]);
corr_tmp += corr_re*corr_re + corr_im*corr_im;
/*
LOG_D(PHY,"pucch2 half_prb %d cw %d (%d,%d) aa %d: (%d,%d,%d,%d,%d,%d,%d,%d)x(%d,%d,%d,%d,%d,%d,%d,%d) (%d,%d)+(%d,%d) = (%d,%d) => %d\n",
half_prb,cw,cw&15,cw>>4,aa,
((int16_t*)&pucch2_polar_4bit[cw&15])[0],((int16_t*)&pucch2_polar_4bit[cw>>4])[0],
......@@ -1520,15 +1520,15 @@ void nr_decode_pucch2(PHY_VARS_gNB *gNB,
corr_re,
corr_im,
corr_tmp);
*/
}
corr16 = _mm_set1_epi16((int16_t)(corr_tmp>>8));
/*
LOG_D(PHY,"half_prb %d cw %d corr16 %d\n",half_prb,cw,corr_tmp>>8);
*/
llr_num = _mm_max_epi16(_mm_mullo_epi16(corr16,pucch2_polar_llr_num_lut[cw]),llr_num);
llr_den = _mm_max_epi16(_mm_mullo_epi16(corr16,pucch2_polar_llr_den_lut[cw]),llr_den);
/*
LOG_D(PHY,"lut_num (%d,%d,%d,%d,%d,%d,%d,%d)\n",
((int16_t*)&pucch2_polar_llr_num_lut[cw])[0],
((int16_t*)&pucch2_polar_llr_num_lut[cw])[1],
......@@ -1538,7 +1538,7 @@ void nr_decode_pucch2(PHY_VARS_gNB *gNB,
((int16_t*)&pucch2_polar_llr_num_lut[cw])[5],
((int16_t*)&pucch2_polar_llr_num_lut[cw])[6],
((int16_t*)&pucch2_polar_llr_num_lut[cw])[7]);
LOG_D(PHY,"llr_num (%d,%d,%d,%d,%d,%d,%d,%d)\n",
((int16_t*)&llr_num)[0],
((int16_t*)&llr_num)[1],
......@@ -1557,7 +1557,7 @@ void nr_decode_pucch2(PHY_VARS_gNB *gNB,
((int16_t*)&llr_den)[5],
((int16_t*)&llr_den)[6],
((int16_t*)&llr_den)[7]);
*/
}
// compute llrs
llrs[half_prb] = _mm_subs_epi16(llr_num,llr_den);
......
......@@ -120,6 +120,13 @@ typedef struct {
nfapi_nr_dl_tti_pdcch_pdu pdcch_pdu;
} NR_gNB_PDCCH_t;
typedef struct {
uint8_t active;
int frame;
int slot;
nfapi_nr_dl_tti_csi_rs_pdu csirs_pdu;
} NR_gNB_CSIRS_t;
typedef struct {
int frame;
int slot;
......@@ -760,6 +767,7 @@ typedef struct PHY_VARS_gNB_s {
NR_gNB_PUSCH *pusch_vars[NUMBER_OF_NR_ULSCH_MAX];
NR_gNB_PUCCH_t *pucch[NUMBER_OF_NR_PUCCH_MAX];
NR_gNB_PDCCH_t pdcch_pdu[NUMBER_OF_NR_PDCCH_MAX];
NR_gNB_CSIRS_t csirs_pdu[NUMBER_OF_NR_CSIRS_MAX];
NR_gNB_UL_PDCCH_t ul_pdcch_pdu[NUMBER_OF_NR_PDCCH_MAX];
NR_gNB_DLSCH_t *dlsch[NUMBER_OF_NR_DLSCH_MAX][2]; // Nusers times two spatial streams
NR_gNB_ULSCH_t *ulsch[NUMBER_OF_NR_ULSCH_MAX][2]; // [Nusers times][2 codewords]
......
......@@ -111,10 +111,9 @@ void handle_nfapi_nr_pdcch_pdu(PHY_VARS_gNB *gNB,
nr_fill_dci(gNB,frame,slot,pdcch_pdu);
}
void handle_nfapi_nr_ul_dci_pdu(PHY_VARS_gNB *gNB,
int frame, int slot,
nfapi_nr_ul_dci_request_pdus_t *ul_dci_request_pdu) {
......@@ -128,6 +127,30 @@ void handle_nfapi_nr_ul_dci_pdu(PHY_VARS_gNB *gNB,
}
void handle_nfapi_nr_csirs_pdu(PHY_VARS_gNB *gNB,
int frame, int slot,
nfapi_nr_dl_tti_csi_rs_pdu *csirs_pdu) {
int found = 0;
for (int id=0; id<NUMBER_OF_NR_CSIRS_MAX; id++) {
NR_gNB_CSIRS_t *csirs = &gNB->csirs_pdu[id];
if (csirs->active == 0) {
LOG_D(PHY,"Frame %d Slot %d CSI_RS with ID %d is now active\n",frame,slot,id);
csirs->frame = frame;
csirs->slot = slot;
csirs->active = 1;
memcpy((void*)&csirs->csirs_pdu, (void*)csirs_pdu, sizeof(nfapi_nr_dl_tti_csi_rs_pdu));
found = 1;
break;
}
}
if (found == 0)
LOG_E(MAC,"CSI-RS list is full\n");
}
void handle_nr_nfapi_pdsch_pdu(PHY_VARS_gNB *gNB,int frame,int slot,
nfapi_nr_dl_tti_pdsch_pdu *pdsch_pdu,
uint8_t *sdu)
......@@ -195,6 +218,12 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
pdcch_received = 1;
break;
case NFAPI_NR_DL_TTI_CSI_RS_PDU_TYPE:
LOG_D(PHY,"frame %d, slot %d, Got NFAPI_NR_DL_TTI_CSI_RS_PDU_TYPE for %d.%d\n",frame,slot,DL_req->SFN,DL_req->Slot);
handle_nfapi_nr_csirs_pdu(gNB,
frame, slot,
&dl_tti_pdu->csi_rs_pdu);
break;
case NFAPI_NR_DL_TTI_PDSCH_PDU_TYPE:
{
......
......@@ -43,6 +43,10 @@ void handle_nr_nfapi_ssb_pdu(PHY_VARS_gNB *gNB,
void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO);
void handle_nfapi_nr_csirs_pdu(PHY_VARS_gNB *gNB,
int frame, int slot,
nfapi_nr_dl_tti_csi_rs_pdu *csirs_pdu);
void handle_nfapi_nr_pdcch_pdu(PHY_VARS_gNB *gNB,
int frame, int subframe,
nfapi_nr_dl_tti_pdcch_pdu *dcl_dl_pdu);
......
......@@ -194,6 +194,18 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_GENERATE_DLSCH,0);
}
for (int i=0;i<NUMBER_OF_NR_CSIRS_MAX;i++){
NR_gNB_CSIRS_t *csirs = &gNB->csirs_pdu[i];
if ((csirs->active == 1) &&
(csirs->frame == frame) &&
(csirs->slot == slot) ) {
LOG_D(PHY, "CSI-RS generation started in frame %d.%d\n",frame,slot);
nfapi_nr_dl_tti_csi_rs_pdu_rel15_t csi_params = csirs->csirs_pdu.csi_rs_pdu_rel15;
nr_generate_csi_rs(gNB, AMP, csi_params, gNB->gNB_config.cell_config.phy_cell_id.value, slot);
csirs->active = 0;
}
}
if (do_meas==1) stop_meas(&gNB->phy_proc_tx);
if ((frame&127) == 0) dump_pdsch_stats(gNB);
......@@ -202,7 +214,7 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
for (aa=0; aa<cfg->carrier_config.num_tx_ant.value; aa++) {
apply_nr_rotation(fp,(int16_t*) &gNB->common_vars.txdataF[aa][txdataF_offset],slot,0,fp->Ncp==EXTENDED?12:14,fp->ofdm_symbol_size);
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_gNB_TX+offset,0);
}
......
......@@ -430,6 +430,9 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
// This schedule SR
nr_sr_reporting(module_idP, frame, slot);
// Schedule CSI-RS transmission
nr_csirs_scheduling(module_idP, frame, slot, nr_slots_per_frame[*scc->ssbSubcarrierSpacing]);
// Schedule CSI measurement reporting: check in slot 0 for the whole frame
if (slot == 0)
nr_csi_meas_reporting(module_idP, frame, slot);
......
......@@ -2043,6 +2043,205 @@ void get_pdsch_to_harq_feedback(int Mod_idP,
}
void nr_csirs_scheduling(int Mod_idP,
frame_t frame,
sub_frame_t slot,
int n_slots_frame){
int CC_id = 0;
NR_UE_info_t *UE_info = &RC.nrmac[Mod_idP]->UE_info;
NR_list_t *UE_list = &UE_info->list;
gNB_MAC_INST *gNB_mac = RC.nrmac[Mod_idP];
uint16_t *vrb_map = gNB_mac->common_channels[CC_id].vrb_map;
for (int UE_id = UE_list->head; UE_id >= 0; UE_id = UE_list->next[UE_id]) {
NR_NZP_CSI_RS_Resource_t *nzpcsi;
int period, offset;
NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
NR_CellGroupConfig_t *CellGroup = UE_info->CellGroup[UE_id];
if (!CellGroup || !CellGroup->spCellConfig || !CellGroup->spCellConfig->spCellConfigDedicated ||
!CellGroup->spCellConfig->spCellConfigDedicated->csi_MeasConfig) continue;
NR_CSI_MeasConfig_t *csi_measconfig = CellGroup->spCellConfig->spCellConfigDedicated->csi_MeasConfig->choice.setup;
nfapi_nr_dl_tti_request_body_t *dl_req = &gNB_mac->DL_req[CC_id].dl_tti_request_body;
NR_BWP_Downlink_t *bwp=CellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[sched_ctrl->active_bwp->bwp_Id-1];
AssertFatal(csi_measconfig->nzp_CSI_RS_ResourceToAddModList->list.count>0,"NO CSI report configuration available");
for (int id = 0; id < csi_measconfig->nzp_CSI_RS_ResourceToAddModList->list.count; id++){
nzpcsi = csi_measconfig->nzp_CSI_RS_ResourceToAddModList->list.array[id];
NR_CSI_RS_ResourceMapping_t resourceMapping = nzpcsi->resourceMapping;
csi_period_offset(NULL,nzpcsi,&period,&offset);
if((frame*n_slots_frame+slot-offset)%period == 0) {
LOG_I(MAC,"Scheduling CSI-RS in frame %d slot %d\n",frame,slot);
nfapi_nr_dl_tti_request_pdu_t *dl_tti_csirs_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs];
memset((void*)dl_tti_csirs_pdu,0,sizeof(nfapi_nr_dl_tti_request_pdu_t));
dl_tti_csirs_pdu->PDUType = NFAPI_NR_DL_TTI_CSI_RS_PDU_TYPE;
dl_tti_csirs_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_csi_rs_pdu));
nfapi_nr_dl_tti_csi_rs_pdu_rel15_t *csirs_pdu_rel15 = &dl_tti_csirs_pdu->csi_rs_pdu.csi_rs_pdu_rel15;
csirs_pdu_rel15->bwp_size = NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth,275);
csirs_pdu_rel15->bwp_start = NRRIV2PRBOFFSET(bwp->bwp_Common->genericParameters.locationAndBandwidth,275);
csirs_pdu_rel15->subcarrier_spacing = bwp->bwp_Common->genericParameters.subcarrierSpacing;
if (bwp->bwp_Common->genericParameters.cyclicPrefix)
csirs_pdu_rel15->cyclic_prefix = *bwp->bwp_Common->genericParameters.cyclicPrefix;
else
csirs_pdu_rel15->cyclic_prefix = 0;
csirs_pdu_rel15->start_rb = resourceMapping.freqBand.startingRB;
csirs_pdu_rel15->nr_of_rbs = resourceMapping.freqBand.nrofRBs;
csirs_pdu_rel15->csi_type = 1; // NZP-CSI-RS
csirs_pdu_rel15->symb_l0 = resourceMapping.firstOFDMSymbolInTimeDomain;
if (resourceMapping.firstOFDMSymbolInTimeDomain2)
csirs_pdu_rel15->symb_l1 = *resourceMapping.firstOFDMSymbolInTimeDomain2;
csirs_pdu_rel15->cdm_type = resourceMapping.cdm_Type;
csirs_pdu_rel15->freq_density = resourceMapping.density.present;
if ((resourceMapping.density.present == NR_CSI_RS_ResourceMapping__density_PR_dot5)
&& (resourceMapping.density.choice.dot5 == NR_CSI_RS_ResourceMapping__density__dot5_evenPRBs))
csirs_pdu_rel15->freq_density--;
csirs_pdu_rel15->scramb_id = nzpcsi->scramblingID;
csirs_pdu_rel15->power_control_offset = nzpcsi->powerControlOffset + 8;
if (nzpcsi->powerControlOffsetSS)
csirs_pdu_rel15->power_control_offset_ss = *nzpcsi->powerControlOffsetSS;
else
csirs_pdu_rel15->power_control_offset_ss = 1; // 0 dB
switch(resourceMapping.frequencyDomainAllocation.present){
case NR_CSI_RS_ResourceMapping__frequencyDomainAllocation_PR_row1:
csirs_pdu_rel15->row = 1;
csirs_pdu_rel15->freq_domain = ((resourceMapping.frequencyDomainAllocation.choice.row1.buf[0])>>4)&0x0f;
for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++)
vrb_map[rb] |= (1 << csirs_pdu_rel15->symb_l0);
break;
case NR_CSI_RS_ResourceMapping__frequencyDomainAllocation_PR_row2:
csirs_pdu_rel15->row = 2;
csirs_pdu_rel15->freq_domain = (((resourceMapping.frequencyDomainAllocation.choice.row2.buf[1]>>4)&0x0f) |
((resourceMapping.frequencyDomainAllocation.choice.row2.buf[0]<<8)&0xff0));
for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++)
vrb_map[rb] |= (1 << csirs_pdu_rel15->symb_l0);
break;
case NR_CSI_RS_ResourceMapping__frequencyDomainAllocation_PR_row4:
csirs_pdu_rel15->row = 4;
csirs_pdu_rel15->freq_domain = ((resourceMapping.frequencyDomainAllocation.choice.row4.buf[0])>>5)&0x07;
for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++)
vrb_map[rb] |= (1 << csirs_pdu_rel15->symb_l0);
break;
case NR_CSI_RS_ResourceMapping__frequencyDomainAllocation_PR_other:
csirs_pdu_rel15->freq_domain = ((resourceMapping.frequencyDomainAllocation.choice.other.buf[0])>>2)&0x3f;
// determining the row of table 7.4.1.5.3-1 in 38.211
switch(resourceMapping.nrofPorts){
case NR_CSI_RS_ResourceMapping__nrofPorts_p1:
break;
case NR_CSI_RS_ResourceMapping__nrofPorts_p2:
csirs_pdu_rel15->row = 3;
for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++)
vrb_map[rb] |= (1 << csirs_pdu_rel15->symb_l0);
break;