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with 1705 additions and 353 deletions
......@@ -38,7 +38,7 @@
#include "defs.h"
#include "UTIL/LOG/vcd_signal_dumper.h"
//#define DEBUG_DLSCH_MODULATION
//#define DEBUG_DLSCH_MODULATION 1
//#define is_not_pilot(pilots,re,nushift,use2ndpilots) ((pilots==0) || ((re!=nushift) && (re!=nushift+6)&&((re!=nushift+3)||(use2ndpilots==1))&&((re!=nushift+9)||(use2ndpilots==1)))?1:0)
......@@ -78,7 +78,7 @@ uint8_t is_not_UEspecRS(int8_t lprime, uint8_t re, uint8_t nushift, uint8_t Ncp,
if ((re!=nushift+offset) && (re!=((nushift+4+offset)%12)) && (re!=((nushift+8+offset)%12)))
return(1);
/*else{
printf("(is_no_UEspec_RS):lprime=%d, re=%d, nushift=%d, offset=%d\n",lprime, re,nushift,offset);
LOG_I(PHY,"(is_no_UEspec_RS):lprime=%d, re=%d, nushift=%d, offset=%d\n",lprime, re,nushift,offset);
}*/
} else {
if ((re!=nushift+offset) && (re!=((nushift+3+offset)%12)) && (re!=((nushift+6+offset)%12)) && (re!=((nushift+9+offset)%12)))
......@@ -270,7 +270,7 @@ int allocate_REs_in_RB_pilots_16QAM_siso(PHY_VARS_eNB* phy_vars_eNB,
if (skip_dc == 0) {
// printf("pilots: P1_SHIFT[0] %d\n",P1_SHIFT[0]);
// LOG_I(PHY,"pilots: P1_SHIFT[0] %d\n",P1_SHIFT[0]);
for (x0p=&x0[*jj],tti_offset=symbol_offset+re_offset+P1_SHIFT[0],re=P1_SHIFT[0];
re<12;
x0p+=4) {
......@@ -281,7 +281,7 @@ int allocate_REs_in_RB_pilots_16QAM_siso(PHY_VARS_eNB* phy_vars_eNB,
qam16_table_offset_im+=x0p[3];
((int16_t *)&txdataF[0][tti_offset])[0]=qam_table_s0[qam16_table_offset_re];
((int16_t *)&txdataF[0][tti_offset])[1]=qam_table_s0[qam16_table_offset_im];
// printf("pilots: re %d, tti_offset %d, P1_SHIFT %d\n",re,tti_offset,P1_SHIFT[re+1]);
// LOG_I(PHY,"pilots: re %d, tti_offset %d, P1_SHIFT %d\n",re,tti_offset,P1_SHIFT[re+1]);
tti_offset+=P1_SHIFT[re+1];
re+=P1_SHIFT[re+1];
}
......@@ -497,7 +497,7 @@ int allocate_REs_in_RB_pilots_64QAM_siso(PHY_VARS_eNB* phy_vars_eNB,
if (skip_dc == 0) {
// printf("pilots: P1_SHIFT[0] %d\n",P1_SHIFT[0]);
// LOG_I(PHY,"pilots: P1_SHIFT[0] %d\n",P1_SHIFT[0]);
for (x0p=&x0[*jj],tti_offset=symbol_offset+re_offset+P1_SHIFT[0],re=P1_SHIFT[0];
re<12;
x0p+=6) {
......@@ -510,7 +510,7 @@ int allocate_REs_in_RB_pilots_64QAM_siso(PHY_VARS_eNB* phy_vars_eNB,
qam64_table_offset_im+=x0p[5];
((int16_t *)&txdataF[0][tti_offset])[0]=qam_table_s0[qam64_table_offset_re];
((int16_t *)&txdataF[0][tti_offset])[1]=qam_table_s0[qam64_table_offset_im];
// printf("pilots: re %d, tti_offset %d, P1_SHIFT %d\n",re,tti_offset,P1_SHIFT[re+1]);
// LOG_I(PHY,"pilots: re %d, tti_offset %d, P1_SHIFT %d\n",re,tti_offset,P1_SHIFT[re+1]);
tti_offset+=P1_SHIFT[re+1];
re+=P1_SHIFT[re+1];
}
......@@ -667,11 +667,11 @@ int allocate_REs_in_RB(PHY_VARS_eNB* phy_vars_eNB,
if (dlsch0_harq != NULL){
#ifdef DEBUG_DLSCH_MODULATION
printf("allocate_re (mod %d): symbol_offset %d re_offset %d (%d,%d), jj %d -> %d,%d\n",mod_order0,symbol_offset,re_offset,skip_dc,skip_half,*jj, x0[*jj], x0[1+*jj]);
LOG_I(PHY,"allocate_re (mod %d): symbol_offset %d re_offset %d (%d,%d), jj %d -> %d,%d\n",mod_order0,symbol_offset,re_offset,skip_dc,skip_half,*jj, x0[*jj], x0[1+*jj]);
#endif
} else{
#ifdef DEBUG_DLSCH_MODULATION
printf("allocate_re (mod %d): symbol_offset %d re_offset %d (%d,%d), jj %d -> %d,%d\n",mod_order0,symbol_offset,re_offset,skip_dc,skip_half,*jj, x0[*jj], x0[1+*jj]);
LOG_I(PHY,"allocate_re (mod %d): symbol_offset %d re_offset %d (%d,%d), jj %d -> %d,%d\n",mod_order0,symbol_offset,re_offset,skip_dc,skip_half,*jj, x0[*jj], x0[1+*jj]);
#endif
}
......@@ -685,7 +685,7 @@ int allocate_REs_in_RB(PHY_VARS_eNB* phy_vars_eNB,
for (re=first_re; re<last_re; re++) {
// printf("element %d precoder_index for allocation %d\n",re, precoder_index );
// LOG_I(PHY,"element %d precoder_index for allocation %d\n",re, precoder_index );
if ((skip_dc == 1) && (re==6))
re_off=re_off - frame_parms->ofdm_symbol_size+1;
......@@ -695,7 +695,7 @@ int allocate_REs_in_RB(PHY_VARS_eNB* phy_vars_eNB,
//check that RE is not from Cell-specific RS
if (is_not_pilot(pilots,re,frame_parms->nushift,use2ndpilots)==1) {
//printf("re %d (jj %d)\n",re,*jj);
//LOG_I(PHY,"re %d (jj %d)\n",re,*jj);
if (mimo_mode == SISO) { //SISO mapping
......@@ -705,7 +705,7 @@ int allocate_REs_in_RB(PHY_VARS_eNB* phy_vars_eNB,
case 2: //QPSK
//printf("re %d %d(%d) : %d,%d => ",re,tti_offset,*jj,((int16_t*)&txdataF[0][tti_offset])[0],((int16_t*)&txdataF[0][tti_offset])[1]);
//LOG_I(PHY,"re %d %d(%d) : %d,%d => ",re,tti_offset,*jj,((int16_t*)&txdataF[0][tti_offset])[0],((int16_t*)&txdataF[0][tti_offset])[1]);
((int16_t*)&txdataF[0][tti_offset])[0] += (x0[*jj]==1) ? (-gain_lin_QPSK) : gain_lin_QPSK; //I //b_i
*jj = *jj + 1;
......@@ -971,12 +971,12 @@ int allocate_REs_in_RB(PHY_VARS_eNB* phy_vars_eNB,
break;
case 2: //QPSK
//printf("%d(%d) : %d,%d => ",tti_offset,*jj,((int16_t*)&txdataF[0][tti_offset])[0],((int16_t*)&txdataF[0][tti_offset])[1]);
//LOG_I(PHY,"%d(%d) : %d,%d => ",tti_offset,*jj,((int16_t*)&txdataF[0][tti_offset])[0],((int16_t*)&txdataF[0][tti_offset])[1]);
xx0_re = (x0[*jj]==1) ? (-gain_lin_QPSK) : gain_lin_QPSK;
*jj = *jj + 1;
xx0_im = (x0[*jj]==1) ? (-gain_lin_QPSK) : gain_lin_QPSK;
*jj = *jj + 1;
//printf("%d,%d\n",((int16_t*)&txdataF[0][tti_offset])[0],((int16_t*)&txdataF[0][tti_offset])[1]);
//LOG_I(PHY,"%d,%d\n",((int16_t*)&txdataF[0][tti_offset])[0],((int16_t*)&txdataF[0][tti_offset])[1]);
break;
case 4: //16QAM
......@@ -1042,12 +1042,12 @@ int allocate_REs_in_RB(PHY_VARS_eNB* phy_vars_eNB,
break;
case 2: //QPSK
//printf("%d(%d) : %d,%d => ",tti_offset,*jj,((int16_t*)&txdataF[0][tti_offset])[0],((int16_t*)&txdataF[0][tti_offset])[1]);
//LOG_I(PHY,"%d(%d) : %d,%d => ",tti_offset,*jj,((int16_t*)&txdataF[0][tti_offset])[0],((int16_t*)&txdataF[0][tti_offset])[1]);
xx1_re = (x1[*jj2]==1) ? (-gain_lin_QPSK) : gain_lin_QPSK;
*jj2 = *jj2 + 1;
xx1_im = (x1[*jj2]==1) ? (-gain_lin_QPSK) : gain_lin_QPSK;
*jj2 = *jj2 + 1;
//printf("%d,%d\n",((int16_t*)&txdataF[0][tti_offset])[0],((int16_t*)&txdataF[0][tti_offset])[1]);
//LOG_I(PHY,"%d,%d\n",((int16_t*)&txdataF[0][tti_offset])[0],((int16_t*)&txdataF[0][tti_offset])[1]);
break;
case 4: //16QAM
......@@ -1114,7 +1114,7 @@ int allocate_REs_in_RB(PHY_VARS_eNB* phy_vars_eNB,
((int16_t *)&txdataF[0][tti_offset])[1]+=((xx0_im+xx1_im)>>1);
((int16_t *)&txdataF[1][tti_offset])[1]+=(s*((xx0_im-xx1_im)>>1));
/*
printf("CDD: xx0 (%d,%d), xx1(%d,%d), s(%d), txF[0] (%d,%d), txF[1] (%d,%d)\n",
LOG_I(PHY,"CDD: xx0 (%d,%d), xx1(%d,%d), s(%d), txF[0] (%d,%d), txF[1] (%d,%d)\n",
xx0_re,xx0_im,xx1_re,xx1_im, s, ((int16_t *)&txdataF[0][tti_offset])[0],((int16_t *)&txdataF[0][tti_offset])[1],
((int16_t *)&txdataF[1][tti_offset])[0],((int16_t *)&txdataF[1][tti_offset])[1]);
*/
......@@ -1244,7 +1244,7 @@ int allocate_REs_in_RB(PHY_VARS_eNB* phy_vars_eNB,
precoder_index1 = 3; //[1 -j]
}
else {
printf("problem with precoder in TM4\n");
LOG_I(PHY,"problem with precoder in TM4\n");
return(-1);
}
......@@ -1263,7 +1263,7 @@ int allocate_REs_in_RB(PHY_VARS_eNB* phy_vars_eNB,
((int16_t*)&txdataF[0][tti_offset])[0] += (int16_t)((((int16_t*)&tmp_sample1)[0]*ONE_OVER_SQRT2_Q15)>>15);
((int16_t*)&txdataF[0][tti_offset])[1] += (int16_t)((((int16_t*)&tmp_sample1)[1]*ONE_OVER_SQRT2_Q15)>>15);
//printf("%d,%d\n",((int16_t*)&txdataF[0][tti_offset])[0],((int16_t*)&txdataF[0][tti_offset])[1]);
//LOG_I(PHY,"%d,%d\n",((int16_t*)&txdataF[0][tti_offset])[0],((int16_t*)&txdataF[0][tti_offset])[1]);
if (frame_parms->nb_antenna_ports_eNB == 2) {
layer1prec2A(&tmp_sample1,&tmp_sample2,precoder_index0);
......@@ -1466,7 +1466,7 @@ int allocate_REs_in_RB(PHY_VARS_eNB* phy_vars_eNB,
((int16_t*)&txdataF[5][tti_offset])[1] = (x0[*jj]==1) ? (-gain_lin_QPSK) : gain_lin_QPSK;
*jj = *jj + 1;
//printf("%d(%d) : %d,%d =>
//LOG_I(PHY,"%d(%d) : %d,%d =>
//",tti_offset,*jj,((int16_t*)&tmp_sample1)[0],((int16_t*)&tmp_sample1)[1]);
break;
......@@ -1545,7 +1545,7 @@ int allocate_REs_in_RB(PHY_VARS_eNB* phy_vars_eNB,
}
} else {
//precoding UE spec RS
//printf("precoding UE spec RS\n");
//LOG_I(PHY,"precoding UE spec RS\n");
ind = 3*lprime*dlsch0_harq->nb_rb+mprime2;
ind_dword = ind>>4;
......@@ -1563,7 +1563,7 @@ int allocate_REs_in_RB(PHY_VARS_eNB* phy_vars_eNB,
switch (mod_order0) {
case 2: //QPSK
// printf("%d : %d,%d => ",tti_offset,((int16_t*)&txdataF[0][tti_offset])[0],((int16_t*)&txdataF[0][tti_offset])[1]);
// LOG_I(PHY,"%d : %d,%d => ",tti_offset,((int16_t*)&txdataF[0][tti_offset])[0],((int16_t*)&txdataF[0][tti_offset])[1]);
for (int layer=first_layer0; layer<=(first_layer0+Nlayers0); layer++) {
((int16_t*)&txdataF[layer][tti_offset])[0] = (x0[*jj]==1) ? (-gain_lin_QPSK) : gain_lin_QPSK; //I //b_i
*jj = *jj + 1;
......@@ -1651,7 +1651,7 @@ int allocate_REs_in_RB(PHY_VARS_eNB* phy_vars_eNB,
}
}
} else if (mimo_mode>=TM9_10) {
printf("allocate_REs_in_RB() [dlsch.c] : ERROR, unknown mimo_mode %d\n",mimo_mode);
LOG_I(PHY,"allocate_REs_in_RB() [dlsch.c] : ERROR, unknown mimo_mode %d\n",mimo_mode);
return(-1);
}
}
......@@ -1686,7 +1686,7 @@ int allocate_REs_in_RB_MCH(int32_t **txdataF,
uint8_t first_re,last_re;
int inc;
#ifdef DEBUG_DLSCH_MODULATION
printf("allocate_re_MCH (mod %d): symbol_offset %d re_offset %d (%d), jj %d -> %d,%d, gain_lin_QPSK %d,txdataF %p\n",mod_order,symbol_offset,re_offset,skip_dc,*jj, x0[*jj], x0[1+*jj],gain_lin_QPSK,&txdataF[0][symbol_offset]);
LOG_I(PHY,"allocate_re_MCH (mod %d): symbol_offset %d re_offset %d (%d), jj %d -> %d,%d, gain_lin_QPSK %d,txdataF %p\n",mod_order,symbol_offset,re_offset,skip_dc,*jj, x0[*jj], x0[1+*jj],gain_lin_QPSK,&txdataF[0][symbol_offset]);
#endif
last_re=12;
......@@ -1707,7 +1707,7 @@ int allocate_REs_in_RB_MCH(int32_t **txdataF,
tti_offset = symbol_offset + re_off + re;
//printf("re %d (jj %d)\n",re,*jj);
//LOG_I(PHY,"re %d (jj %d)\n",re,*jj);
*re_allocated = *re_allocated + 1;
......@@ -1715,7 +1715,7 @@ int allocate_REs_in_RB_MCH(int32_t **txdataF,
case 2: //QPSK
// printf("%d : %d,%d => ",tti_offset,((int16_t*)&txdataF[0][tti_offset])[0],((int16_t*)&txdataF[0][tti_offset])[1]);
// LOG_I(PHY,"%d : %d,%d => ",tti_offset,((int16_t*)&txdataF[0][tti_offset])[0],((int16_t*)&txdataF[0][tti_offset])[1]);
((int16_t*)&txdataF[4][tti_offset])[0] = (x0[*jj]==1) ? (-gain_lin_QPSK) : gain_lin_QPSK; //I //b_i
*jj = *jj + 1;
......@@ -1724,7 +1724,7 @@ int allocate_REs_in_RB_MCH(int32_t **txdataF,
*jj = *jj + 1;
//printf("%d,%d\n",((int16_t*)&txdataF[0][tti_offset])[0],((int16_t*)&txdataF[0][tti_offset])[1]);
//LOG_I(PHY,"%d,%d\n",((int16_t*)&txdataF[0][tti_offset])[0],((int16_t*)&txdataF[0][tti_offset])[1]);
break;
......@@ -1931,7 +1931,7 @@ inline int check_skip(int rb,int subframe_offset,LTE_DL_FRAME_PARMS *frame_parms
inline int check_skiphalf(int rb,int subframe_offset,LTE_DL_FRAME_PARMS *frame_parms,int l,int nsymb) __attribute__((always_inline));
inline int check_skiphalf(int rb,int subframe_offset,LTE_DL_FRAME_PARMS *frame_parms,int l,int nsymb) {
// printf("check_skiphalf : rb %d, subframe_offset %d,l %d, nsymb %d\n",rb,subframe_offset,l,nsymb);
// LOG_I(PHY,"check_skiphalf : rb %d, subframe_offset %d,l %d, nsymb %d\n",rb,subframe_offset,l,nsymb);
if ((frame_parms->N_RB_DL&1) == 1) { // ODD N_RB_DL
......@@ -2154,19 +2154,19 @@ int dlsch_modulation(PHY_VARS_eNB* phy_vars_eNB,
re_allocated=0;
// printf("num_pdcch_symbols %d, nsymb %d\n",num_pdcch_symbols,nsymb);
// LOG_I(PHY,"num_pdcch_symbols %d, nsymb %d\n",num_pdcch_symbols,nsymb);
for (l=num_pdcch_symbols; l<nsymb; l++) {
if (dlsch0 != NULL ) {
#ifdef DEBUG_DLSCH_MODULATION
printf("Generating DLSCH (harq_pid %d,mimo %d, pmi_alloc0 %lx, mod0 %d, mod1 %d, rb_alloc[0] %d) in %d\n",
LOG_I(PHY,"Generating DLSCH (harq_pid %d,mimo %d, pmi_alloc0 %lx, mod0 %d, mod1 %d, rb_alloc[0] %d)\n",
harq_pid,
dlsch0_harq->mimo_mode,
pmi2hex_2Ar2(dlsch0_harq->pmi_alloc),
mod_order0,
mod_order1,
rb_alloc[0],
len);
rb_alloc[0]
);
#endif
}
......@@ -2216,6 +2216,7 @@ int dlsch_modulation(PHY_VARS_eNB* phy_vars_eNB,
for (eNB_id=0;eNB_id<ru->num_eNB;eNB_id++){
if (phy_vars_eNB == ru->eNB_list[eNB_id]) {
for (aa=0;aa<ru->nb_tx;aa++){
LOG_I(PHY,"ru_id:%d eNB_id:%d aa:%d memcpy(ru->beam_weights, dlsch0->ue_spec_bf_weights[ru_id][0],)\n", ru_id, eNB_id, aa);
memcpy(ru->beam_weights[eNB_id][5][aa],
dlsch0->ue_spec_bf_weights[ru_id][0],
frame_parms->ofdm_symbol_size*sizeof(int32_t));
......@@ -2233,7 +2234,7 @@ int dlsch_modulation(PHY_VARS_eNB* phy_vars_eNB,
if (pilots>0) { // compute pilot arrays, could be done statically if performance suffers
if (frame_parms->nb_antenna_ports_eNB == 1) {
// printf("l %d, nushift %d, offset %d\n",l,frame_parms->nushift,offset);
// LOG_I(PHY,"l %d, nushift %d, offset %d\n",l,frame_parms->nushift,offset);
for (i=0,i2=0;i<12;i++) {
if ((i!=(frame_parms->nushift+offset)) && (i!=((frame_parms->nushift+6+offset)%12)))
P1_SHIFT[i2++]=1;
......@@ -2340,7 +2341,7 @@ int dlsch_modulation(PHY_VARS_eNB* phy_vars_eNB,
//for (aa=0;aa<frame_parms->nb_antennas_tx;aa++)
//memset(&txdataF[aa][symbol_offset],0,frame_parms->ofdm_symbol_size<<2);
//printf("symbol_offset %d,subframe offset %d : pilots %d\n",symbol_offset,subframe_offset,pilots);
//LOG_I(PHY,"symbol_offset %d,subframe offset %d : pilots %d\n",symbol_offset,subframe_offset,pilots);
for (rb=0; rb<frame_parms->N_RB_DL; rb++) {
if (rb < 32)
......@@ -2371,7 +2372,7 @@ int dlsch_modulation(PHY_VARS_eNB* phy_vars_eNB,
if (dlsch1) {
if (dlsch1_harq->Nlayers>1) {
printf("Nlayers %d: re_offset %d, symbol %d offset %d\n",dlsch0_harq->Nlayers,re_offset,l,symbol_offset);
LOG_I(PHY,"Nlayers %d: re_offset %d, symbol %d offset %d\n",dlsch0_harq->Nlayers,re_offset,l,symbol_offset);
return(-1);
}
}
......@@ -2379,7 +2380,7 @@ int dlsch_modulation(PHY_VARS_eNB* phy_vars_eNB,
if (rb_alloc_ind > 0) {
// printf("Allocated rb %d/symbol %d, skip_half %d, subframe_offset %d, symbol_offset %d, re_offset %d, jj %d\n",rb,l,skip_half,subframe_offset,symbol_offset,re_offset,jj);
// LOG_I(PHY,"Allocated rb %d/symbol %d, skip_half %d, subframe_offset %d, symbol_offset %d, re_offset %d, jj %d\n",rb,l,skip_half,subframe_offset,symbol_offset,re_offset,jj);
if (dlsch0 != NULL) {
get_pmi_temp = get_pmi(frame_parms->N_RB_DL,
......@@ -2419,7 +2420,7 @@ int dlsch_modulation(PHY_VARS_eNB* phy_vars_eNB,
mprime +=3+frame_parms->Ncp;
}
else {
// printf("Unallocated rb %d/symbol %d, re_offset %d, jj %d\n",rb,l,re_offset,jj);
// LOG_I(PHY,"Unallocated rb %d/symbol %d, re_offset %d, jj %d\n",rb,l,re_offset,jj);
}
re_offset+=12; // go to next RB
......@@ -2436,9 +2437,9 @@ int dlsch_modulation(PHY_VARS_eNB* phy_vars_eNB,
#ifdef DEBUG_DLSCH_MODULATION
if (dlsch0 != NULL){
printf("generate_dlsch : jj = %d,re_allocated = %d (G %d)\n",jj,re_allocated,get_G(frame_parms,dlsch0_harq->nb_rb,dlsch0_harq->rb_alloc,mod_order0,Nl0,2,0,subframe_offset));
LOG_I(PHY,"generate_dlsch : jj = %d,re_allocated = %d (G %d)\n",jj,re_allocated,get_G(frame_parms,dlsch0_harq->nb_rb,dlsch0_harq->rb_alloc,mod_order0,Nl0,2,0,subframe_offset,1));
}else{
printf("generate_dlsch : jj = %d,re_allocated = %d (G %d)\n",jj,re_allocated,get_G(frame_parms,dlsch1_harq->nb_rb,dlsch1_harq->rb_alloc,mod_order1,Nl1,2,0,subframe_offset));
LOG_I(PHY,"generate_dlsch : jj = %d,re_allocated = %d (G %d)\n",jj,re_allocated,get_G(frame_parms,dlsch1_harq->nb_rb,dlsch1_harq->rb_alloc,mod_order1,Nl1,2,0,subframe_offset,1));
}
#endif
......@@ -2493,7 +2494,7 @@ int dlsch_modulation_SIC(int32_t **sic_buffer,
jj = jj + 1;
//printf("recon %d,%d\n",((int16_t*)&sic_buffer[0][i])[0],((int16_t*)&sic_buffer[0][i])[1]);
//LOG_I(PHY,"recon %d,%d\n",((int16_t*)&sic_buffer[0][i])[0],((int16_t*)&sic_buffer[0][i])[1]);
i++;
break;
......@@ -2580,7 +2581,7 @@ int dlsch_modulation_SIC(int32_t **sic_buffer,
#ifdef DEBUG_DLSCH_MODULATION
printf("generate_dlsch : jj = %d,re_allocated = %d (G %d)\n",jj,re_allocated,get_G(frame_parms,dlsch0_harq->nb_rb,dlsch0_harq->rb_alloc,mod_order0,Nl0,2,0,subframe_offset,1/*transmission mode*/));
LOG_I(PHY,"generate_dlsch : jj = %d,re_allocated = %d (G %d)\n",jj,re_allocated,get_G(frame_parms,dlsch0_harq->nb_rb,dlsch0_harq->rb_alloc,mod_order0,Nl0,2,0,subframe_offset,1/*transmission mode*/));
#endif
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_MODULATION, VCD_FUNCTION_OUT);
......@@ -2618,11 +2619,11 @@ int mch_modulation(int32_t **txdataF,
jj=0;
re_allocated=0;
// printf("num_pdcch_symbols %d, nsymb %d\n",num_pdcch_symbols,nsymb);
// LOG_I(PHY,"num_pdcch_symbols %d, nsymb %d\n",num_pdcch_symbols,nsymb);
for (l=2; l<nsymb_pmch; l++) {
#ifdef DEBUG_DLSCH_MODULATION
printf("Generating MCH (mod %d) in subframe %d for symbol %d\n",mod_order, subframe_offset,l);
LOG_I(PHY,"Generating MCH (mod %d) in subframe %d for symbol %d\n",mod_order, subframe_offset,l);
#endif
re_offset = frame_parms->first_carrier_offset;
......@@ -2647,7 +2648,7 @@ int mch_modulation(int32_t **txdataF,
else
qam_table_s = NULL;
//printf("Allocated rb %d, subframe_offset %d,amp %d\n",rb,subframe_offset,amp);
//LOG_I(PHY,"Allocated rb %d, subframe_offset %d,amp %d\n",rb,subframe_offset,amp);
allocate_REs_in_RB_MCH(txdataF,
&jj,
re_offset,
......@@ -2674,7 +2675,7 @@ int mch_modulation(int32_t **txdataF,
}
#ifdef DEBUG_DLSCH_MODULATION
printf("generate_dlsch(MCH) : jj = %d,re_allocated = %d (G %d)\n",jj,re_allocated,get_G(frame_parms,dlsch->harq_processes[0]->nb_rb,dlsch->harq_processes[0]->rb_alloc,mod_order,1,2,0,subframe_offset,1/*transmission mode*/));
LOG_I(PHY,"generate_dlsch(MCH) : jj = %d,re_allocated = %d (G %d)\n",jj,re_allocated,get_G(frame_parms,dlsch->harq_processes[0]->nb_rb,dlsch->harq_processes[0]->rb_alloc,mod_order,1,2,0,subframe_offset,1/*transmission mode*/));
#endif
return (re_allocated);
......
......@@ -174,6 +174,8 @@ int generate_pbch(LTE_eNB_PBCH *eNB_pbch,
pbch_E = (frame_parms->Ncp==NORMAL) ? 1920 : 1728; //RE/RB * #RB * bits/RB (QPSK)
// pbch_E_bytes = pbch_coded_bits>>3;
LOG_D(PHY,"%s(eNB_pbch:%p txdataF:%p amp:%d frame_parms:%p pbch_pdu:%p frame_mod4:%d)\n", __FUNCTION__, eNB_pbch, txdataF, amp, frame_parms, pbch_pdu, frame_mod4==0);
if (frame_mod4==0) {
bzero(pbch_a,PBCH_A>>3);
bzero(eNB_pbch->pbch_e,pbch_E);
......
......@@ -162,7 +162,7 @@ int phich_frame2_pusch_frame(LTE_DL_FRAME_PARMS *frame_parms, int frame, int sub
pusch_frame = (frame);
}
LOG_D(PHY, "frame %d subframe %d: PUSCH frame = %d\n", frame, subframe, pusch_frame);
//LOG_D(PHY, "frame %d subframe %d: PUSCH frame = %d\n", frame, subframe, pusch_frame);
return pusch_frame % 1024;
}
......
......@@ -39,6 +39,7 @@
#include "UTIL/LOG/vcd_signal_dumper.h"
//#define PRACH_DEBUG 1
//#define PRACH_WRITE_OUTPUT_DEBUG 1
uint16_t NCS_unrestricted[16] = {0,13,15,18,22,26,32,38,46,59,76,93,119,167,279,419};
uint16_t NCS_restricted[15] = {15,18,22,26,32,38,46,55,68,82,100,128,158,202,237}; // high-speed case
......@@ -562,7 +563,7 @@ int is_prach_subframe0(LTE_DL_FRAME_PARMS *frame_parms,uint8_t prach_ConfigIndex
t1_ra = tdd_preamble_map[prach_ConfigIndex][tdd_config].map[0].t1_ra;
t2_ra = tdd_preamble_map[prach_ConfigIndex][tdd_config].map[0].t2_ra;
#ifdef PRACH_DEBUG
LOG_D(PHY,"[PRACH] Checking for PRACH format (ConfigIndex %d) in TDD subframe %d (%d,%d,%d)\n",
LOG_I(PHY,"[PRACH] Checking for PRACH format (ConfigIndex %d) in TDD subframe %d (%d,%d,%d)\n",
prach_ConfigIndex,
subframe,
t0_ra,t1_ra,t2_ra);
......@@ -655,7 +656,7 @@ int32_t generate_prach( PHY_VARS_UE *ue, uint8_t eNB_id, uint8_t subframe, uint1
#else //normal case (simulation)
prach_start = subframe*ue->frame_parms.samples_per_tti-ue->N_TA_offset;
LOG_D(PHY,"[UE %d] prach_start %d, rx_offset %d, hw_timing_advance %d, N_TA_offset %d\n", ue->Mod_id,
LOG_I(PHY,"[UE %d] prach_start %d, rx_offset %d, hw_timing_advance %d, N_TA_offset %d\n", ue->Mod_id,
prach_start,
ue->rx_offset,
ue->hw_timing_advance,
......@@ -723,7 +724,7 @@ int32_t generate_prach( PHY_VARS_UE *ue, uint8_t eNB_id, uint8_t subframe, uint1
} else { // This is the high-speed case
#ifdef PRACH_DEBUG
LOG_D(PHY,"[UE %d] High-speed mode, NCS_config %d\n",ue->Mod_id,Ncs_config);
LOG_I(PHY,"[UE %d] High-speed mode, NCS_config %d\n",ue->Mod_id,Ncs_config);
#endif
not_found = 1;
......@@ -784,7 +785,7 @@ int32_t generate_prach( PHY_VARS_UE *ue, uint8_t eNB_id, uint8_t subframe, uint1
#ifdef PRACH_DEBUG
if (NCS>0)
LOG_D(PHY,"Generate PRACH for RootSeqIndex %d, Preamble Index %d, NCS %d (NCS_config %d, N_ZC/NCS %d) n_ra_prb %d: Preamble_offset %d, Preamble_shift %d\n",
LOG_I(PHY,"Generate PRACH for RootSeqIndex %d, Preamble Index %d, NCS %d (NCS_config %d, N_ZC/NCS %d) n_ra_prb %d: Preamble_offset %d, Preamble_shift %d\n",
rootSequenceIndex,preamble_index,NCS,Ncs_config,N_ZC/NCS,n_ra_prb,
preamble_offset,preamble_shift);
......@@ -1039,14 +1040,14 @@ int32_t generate_prach( PHY_VARS_UE *ue, uint8_t eNB_id, uint8_t subframe, uint1
break;
}
//LOG_D(PHY,"prach_len=%d\n",prach_len);
//LOG_I(PHY,"prach_len=%d\n",prach_len);
AssertFatal(prach_fmt<4,
"prach_fmt4 not fully implemented" );
#if defined(EXMIMO) || defined(OAI_USRP)
int j;
int overflow = prach_start + prach_len - LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*ue->frame_parms.samples_per_tti;
LOG_D( PHY, "prach_start=%d, overflow=%d\n", prach_start, overflow );
LOG_I( PHY, "prach_start=%d, overflow=%d\n", prach_start, overflow );
for (i=prach_start,j=0; i<min(ue->frame_parms.samples_per_tti*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME,prach_start+prach_len); i++,j++) {
((int16_t*)ue->common_vars.txdata[0])[2*i] = prach[2*j]<<4;
......@@ -1079,7 +1080,7 @@ int32_t generate_prach( PHY_VARS_UE *ue, uint8_t eNB_id, uint8_t subframe, uint1
#if 0
#if defined(PRACH_WRITE_OUTPUT_DEBUG)
write_output("prach_txF0.m","prachtxF0",prachF,prach_len-Ncp,1,1);
write_output("prach_tx0.m","prachtx0",prach+(Ncp<<1),prach_len-Ncp,1,1);
write_output("txsig.m","txs",(int16_t*)(&ue->common_vars.txdata[0][0]),2*ue->frame_parms.samples_per_tti,1,1);
......@@ -1114,7 +1115,9 @@ void rx_prach0(PHY_VARS_eNB *eNB,
uint8_t restricted_set;
uint8_t n_ra_prb;
#ifdef PRACH_DEBUG
int frame;
#endif
int subframe;
int16_t *prachF=NULL;
int16_t **rxsigF=NULL;
......@@ -1131,7 +1134,7 @@ void rx_prach0(PHY_VARS_eNB *eNB,
uint16_t numshift=0;
uint16_t *prach_root_sequence_map;
uint8_t not_found;
int k;
int k=0;
uint16_t u;
int16_t *Xu;
uint16_t offset;
......@@ -1152,8 +1155,6 @@ void rx_prach0(PHY_VARS_eNB *eNB,
int en0=0;
#endif
(void)frame; /* avoid gcc warnings */
if (ru) {
fp = &ru->frame_parms;
nb_rx = ru->nb_rx;
......@@ -1204,7 +1205,9 @@ void rx_prach0(PHY_VARS_eNB *eNB,
#ifdef Rel14
if (br_flag == 1) {
prach_ifftp = eNB->prach_vars_br.prach_ifft[ce_level];
#ifdef PRACH_DEBUG
frame = eNB->proc.frame_prach_br;
#endif
subframe = eNB->proc.subframe_prach_br;
prachF = eNB->prach_vars_br.prachF;
rxsigF = eNB->prach_vars_br.rxsigF[ce_level];
......@@ -1221,19 +1224,23 @@ void rx_prach0(PHY_VARS_eNB *eNB,
#endif
{
prach_ifftp = eNB->prach_vars.prach_ifft[0];
#ifdef PRACH_DEBUG
frame = eNB->proc.frame_prach;
#endif
subframe = eNB->proc.subframe_prach;
prachF = eNB->prach_vars.prachF;
rxsigF = eNB->prach_vars.rxsigF[0];
#ifdef PRACH_DEBUG
if ((frame&1023) < 20) LOG_I(PHY,"PRACH (eNB) : running rx_prach for subframe %d, prach_FreqOffset %d, prach_ConfigIndex %d , rootSequenceIndex %d\n",
subframe,fp->prach_config_common.prach_ConfigInfo.prach_FreqOffset,prach_ConfigIndex,rootSequenceIndex);
//if ((frame&1023) < 20) LOG_I(PHY,"PRACH (eNB) : running rx_prach for subframe %d, prach_FreqOffset %d, prach_ConfigIndex %d , rootSequenceIndex %d\n", subframe,fp->prach_config_common.prach_ConfigInfo.prach_FreqOffset,prach_ConfigIndex,rootSequenceIndex);
#endif
}
}
else {
#ifdef Rel14
if (br_flag == 1) {
#ifdef PRACH_DEBUG
frame = ru->proc.frame_prach_br;
#endif
subframe = ru->proc.subframe_prach_br;
rxsigF = ru->prach_rxsigF_br[ce_level];
#ifdef PRACH_DEBUG
......@@ -1244,6 +1251,9 @@ void rx_prach0(PHY_VARS_eNB *eNB,
else
#endif
{
#ifdef PRACH_DEBUG
frame = ru->proc.frame_prach;
#endif
subframe = ru->proc.subframe_prach;
rxsigF = ru->prach_rxsigF;
#ifdef PRACH_DEBUG
......@@ -1258,9 +1268,32 @@ void rx_prach0(PHY_VARS_eNB *eNB,
for (aa=0; aa<nb_rx; aa++) {
if (ru->if_south == LOCAL_RF) { // set the time-domain signal if we have to use it in this node
// DJP - indexing below in subframe zero takes us off the beginning of the array???
prach[aa] = (int16_t*)&ru->common.rxdata[aa][(subframe*fp->samples_per_tti)-ru->N_TA_offset];
#ifdef PRACH_DEBUG
if ((frame&1023) < 20) LOG_I(PHY,"RU %d, br_flag %d ce_level %d frame %d subframe %d, : prach %p (energy %d)\n",ru->idx,br_flag,ce_level,frame,subframe,prach[aa],dB_fixed(en0=signal_energy(prach[aa],fp->samples_per_tti)));
int32_t en0=signal_energy((int32_t*)prach[aa],fp->samples_per_tti);
int8_t dbEn0 = dB_fixed(en0);
int8_t rach_dBm = dbEn0 - eNB->rx_total_gain_dB;
#ifdef PRACH_WRITE_OUTPUT_DEBUG
if (dbEn0>32 && prach[0]!= NULL)
{
static int counter=0;
char buffer[80];
//counter++;
sprintf(buffer, "%s%d", "/tmp/prach_rx",counter);
write_output(buffer,"prach_rx",prach[0],fp->samples_per_tti,1,13);
}
#endif
if (dbEn0>32)
{
#ifdef PRACH_WRITE_OUTPUT_DEBUG
if (prach[0]!= NULL) write_output("prach_rx","prach_rx",prach[0],fp->samples_per_tti,1,1);
#endif
LOG_I(PHY,"RU %d, br_flag %d ce_level %d frame %d subframe %d per_tti:%d prach:%p (energy %d) TA:%d rach_dBm:%d rxdata:%p index:%d\n",ru->idx,br_flag,ce_level,frame,subframe,fp->samples_per_tti,prach[aa],dbEn0,ru->N_TA_offset,rach_dBm,ru->common.rxdata[aa], (subframe*fp->samples_per_tti)-ru->N_TA_offset);
}
#endif
}
}
......@@ -1343,7 +1376,9 @@ void rx_prach0(PHY_VARS_eNB *eNB,
if (((eNB!=NULL) && (ru->function != NGFI_RAU_IF4p5))||
((eNB==NULL) && (ru->function == NGFI_RRU_IF4p5))) { // compute the DFTs of the PRACH temporal resources
// Do forward transform
LOG_D(PHY,"rx_prach: Doing FFT for N_RB_UL %d\n",fp->N_RB_UL);
#ifdef PRACH_DEBUG
LOG_D(PHY,"rx_prach: Doing FFT for N_RB_UL %d nb_rx:%d Ncp:%d\n",fp->N_RB_UL, nb_rx, Ncp);
#endif
for (aa=0; aa<nb_rx; aa++) {
AssertFatal(prach[aa]!=NULL,"prach[%d] is null\n",aa);
prach2 = prach[aa] + (Ncp<<1);
......@@ -1448,7 +1483,7 @@ void rx_prach0(PHY_VARS_eNB *eNB,
k+=13;
k*=2;
int dftsize_x2 = fp->ofdm_symbol_size*24;
LOG_D(PHY,"Shifting prach_rxF from %d to 0\n",k);
//LOG_D(PHY,"Shifting prach_rxF from %d to 0\n",k);
if ((k+(839*2)) > dftsize_x2) { // PRACH signal is split around DC
memmove((void*)&rxsigF[aa][dftsize_x2-k],(void*)&rxsigF[aa][0],(k+(839*2)-dftsize_x2)*2);
......@@ -1478,7 +1513,6 @@ void rx_prach0(PHY_VARS_eNB *eNB,
int en = dB_fixed(signal_energy((int32_t*)&rxsigF[0][0],840));
if ((en > 60)&&(br_flag==1)) LOG_I(PHY,"PRACH (br_flag %d,ce_level %d, n_ra_prb %d, k %d): Frame %d, Subframe %d => %d dB\n",br_flag,ce_level,n_ra_prb,k,eNB->proc.frame_rx,eNB->proc.subframe_rx,en);
#endif
}
// in case of RAU and prach received rx_thread wakes up prach
......@@ -1623,7 +1657,7 @@ void rx_prach0(PHY_VARS_eNB *eNB,
}
memset(prachF, 0, sizeof(int16_t)*2*1024 );
#ifdef PRACH_DEBUG
#if defined(PRACH_WRITE_OUTPUT_DEBUG)
if (prach[0]!= NULL) write_output("prach_rx0.m","prach_rx0",prach[0],6144+792,1,1);
#endif
// write_output("prach_rx1.m","prach_rx1",prach[1],6144+792,1,1);
......@@ -1657,7 +1691,7 @@ void rx_prach0(PHY_VARS_eNB *eNB,
prach_ifft[i] += (prach_ifft_tmp[i<<1]*prach_ifft_tmp[(i<<1)] + prach_ifft_tmp[1+(i<<1)]*prach_ifft_tmp[1+(i<<1)])>>10;
}
#ifdef PRACH_DEBUG
#if defined(PRACH_WRITE_OUTPUT_DEBUG)
if (aa==0) write_output("prach_rxF_comp0.m","prach_rxF_comp0",prachF,1024,1,1);
#endif
// if (aa=1) write_output("prach_rxF_comp1.m","prach_rxF_comp1",prachF,1024,1,1);
......@@ -1706,19 +1740,22 @@ void rx_prach0(PHY_VARS_eNB *eNB,
k*=2;
if (br_flag == 0) {
/*
#if defined(PRACH_WRITE_OUTPUT_DEBUG)
write_output("rxsigF.m","prach_rxF",&rxsigF[0][0],12288,1,1);
write_output("prach_rxF_comp0.m","prach_rxF_comp0",prachF,1024,1,1);
write_output("Xu.m","xu",Xu,N_ZC,1,1);
write_output("prach_ifft0.m","prach_t0",prach_ifft,1024,1,1);*/
write_output("prach_ifft0.m","prach_t0",prach_ifft,1024,1,1);
#endif
}
else {
#if defined(PRACH_WRITE_OUTPUT_DEBUG)
printf("Dumping prach (br_flag %d), k = %d (n_ra_prb %d)\n",br_flag,k,n_ra_prb);
write_output("rxsigF_br.m","prach_rxF_br",&rxsigF[0][0],12288,1,1);
write_output("prach_rxF_comp0_br.m","prach_rxF_comp0_br",prachF,1024,1,1);
write_output("Xu_br.m","xu_br",Xu,N_ZC,1,1);
write_output("prach_ifft0_br.m","prach_t0_br",prach_ifft,1024,1,1);
exit(-1);
#endif
}
}
......
......@@ -185,7 +185,7 @@ int generate_eNB_ulsch_params_from_rar(PHY_VARS_eNB *eNB,
LOG_D(PHY,"ulsch ra (eNB): harq_pid %d\n",harq_pid);
LOG_D(PHY,"ulsch ra (eNB): round %d\n",ulsch_harq->round);
LOG_D(PHY,"ulsch ra (eNB): TBS %d\n",ulsch_harq->TBS);
LOG_D(PHY,"ulsch ra (eNB): mcs %d\n",ulsch_harq->mcs);
LOG_D(PHY,"ulsch ra (eNB): mcs %d\n",ulsch_harq->Msc_initial);
LOG_D(PHY,"ulsch ra (eNB): Or1 %d\n",ulsch_harq->Or1);
LOG_D(PHY,"ulsch ra (eNB): ORI %d\n",ulsch_harq->O_RI);
#endif
......
......@@ -33,7 +33,7 @@ int write_output(const char *fname,const char *vname,void *data,int length,int d
int i;
printf("Writing %d elements of type %d to %s\n",length,format,fname);
//printf("Writing %d elements of type %d to %s\n",length,format,fname);
if (format == 10 || format ==11 || format == 12 || format == 13 || format == 14) {
......@@ -68,9 +68,11 @@ int write_output(const char *fname,const char *vname,void *data,int length,int d
case 15:
for (i=0; i<length<<1; i+=(2*dec)) {
fprintf(fp,"%d + j*(%d)\n",((short *)data)[i],((short *)data)[i+1]);
//fprintf(fp,"%d + j*(%d)\n",((short *)data)[i],((short *)data)[i+1]);
fprintf(fp,"%d,%d,",((short *)data)[i],((short *)data)[i+1]);
}
fprintf(fp,"\n");
break;
......
......@@ -58,6 +58,7 @@
#include "msc.h"
#include "openair2/PHY_INTERFACE/IF_Module.h"
#include "openair2/PHY_INTERFACE/IF_Module_UE.h"
//#include <complex.h>
#include "assertions.h"
......@@ -650,6 +651,21 @@ typedef struct {
UE_rxtx_proc_t proc_rxtx[RX_NB_TH];
} UE_proc_t;
/// Panos: Structure holding timer_thread related elements (phy_stub_UE mode)
typedef struct{
pthread_t pthread_timer;
/// Panos: mutex for waiting SF ticking
pthread_mutex_t mutex_ticking;
/// Panos: \brief ticking var for ticking thread.
/// \internal This variable is protected by \ref mutex_ticking.
int ticking_var;
/// condition variable for timer_thread;
pthread_cond_t cond_ticking;
}SF_ticking;
typedef enum {
LOCAL_RF =0,
REMOTE_IF5 =1,
......@@ -1345,6 +1361,12 @@ typedef struct {
/// N0 (used for abstraction)
double N0;
/// Panos: Pointer to IF_Module_UE instance of the UE.
IF_Module_UE_t *if_inst_ue;
/// Panos: Pointer to DL.indication structure of the UE.
UE_DL_IND_t UE_DL_INFO;
/// PDSCH Varaibles
PDSCH_CONFIG_DEDICATED pdsch_config_dedicated[NUMBER_OF_CONNECTED_eNB_MAX];
......@@ -1600,6 +1622,8 @@ static inline int release_thread(pthread_mutex_t *mutex,int *instance_cnt,char *
return(-1);
}
//LOG_D(PHY, "%s() name:%s instance_cnt:%u - about to decrement\n", __FUNCTION__, name, *instance_cnt);
*instance_cnt=*instance_cnt-1;
if (pthread_mutex_unlock(mutex) != 0) {
......
......@@ -817,7 +817,7 @@ typedef struct {
uint8_t narrowband;
/// number of PRB pairs for MPDCCH
uint8_t number_of_prb_pairs;
/// mpdcch resource assignement (combinatorial index r)
/// mpdcch resource assignment (combinatorial index r)
uint8_t resource_block_assignment;
/// transmission type (0=localized,1=distributed)
uint8_t transmission_type;
......
......@@ -37,6 +37,14 @@
#include "nfapi_interface.h"
#include "fapi_l1.h"
int oai_nfapi_dl_config_req(nfapi_dl_config_request_t *dl_config_req);
int oai_nfapi_tx_req(nfapi_tx_request_t *tx_req);
int oai_nfapi_hi_dci0_req(nfapi_hi_dci0_request_t *hi_dci0_req);
int oai_nfapi_ul_config_req(nfapi_ul_config_request_t *ul_config_req);
extern uint8_t nfapi_mode;
void handle_nfapi_dci_dl_pdu(PHY_VARS_eNB *eNB,
eNB_rxtx_proc_t *proc,
nfapi_dl_config_request_pdu_t *dl_config_pdu)
......@@ -45,7 +53,7 @@ void handle_nfapi_dci_dl_pdu(PHY_VARS_eNB *eNB,
LTE_eNB_PDCCH *pdcch_vars = &eNB->pdcch_vars[idx];
nfapi_dl_config_dci_dl_pdu *pdu = &dl_config_pdu->dci_dl_pdu;
LOG_D(PHY,"Frame %d, Subframe %d: DCI processing\n",proc->frame_tx,proc->subframe_tx);
LOG_D(PHY,"Frame %d, Subframe %d: DCI processing - populating pdcch_vars->dci_alloc[%d] proc:subframe_tx:%d idx:%d pdcch_vars->num_dci:%d\n",proc->frame_tx,proc->subframe_tx, pdcch_vars->num_dci, proc->subframe_tx, idx, pdcch_vars->num_dci);
// copy dci configuration into eNB structure
fill_dci_and_dlsch(eNB,proc,&pdcch_vars->dci_alloc[pdcch_vars->num_dci],pdu);
......@@ -70,6 +78,9 @@ void handle_nfapi_hi_dci0_dci_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
{
int idx = proc->subframe_tx&1;
LTE_eNB_PDCCH *pdcch_vars = &eNB->pdcch_vars[idx];
//LOG_D(PHY,"%s() Before num_dci:%d\n", __FUNCTION__, pdcch_vars->num_dci);
// copy dci configuration in to eNB structure
fill_dci0(eNB,proc,&pdcch_vars->dci_alloc[pdcch_vars->num_dci], &hi_dci0_config_pdu->dci_pdu);
}
......@@ -80,11 +91,12 @@ void handle_nfapi_hi_dci0_hi_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
LTE_eNB_PHICH *phich = &eNB->phich_vars[proc->subframe_tx&1];
// copy dci configuration in to eNB structure
LOG_D(PHY,"Received HI PDU which value %d (rbstart %d,cshift %d)\n",
LOG_D(PHY,"Received HI PDU with value %d (rbstart %d,cshift %d)\n",
hi_dci0_config_pdu->hi_pdu.hi_pdu_rel8.hi_value,
hi_dci0_config_pdu->hi_pdu.hi_pdu_rel8.resource_block_start,
hi_dci0_config_pdu->hi_pdu.hi_pdu_rel8.cyclic_shift_2_for_drms);
// DJP - TODO FIXME - transmission power ignored
phich->config[phich->num_hi].hi = hi_dci0_config_pdu->hi_pdu.hi_pdu_rel8.hi_value;
phich->config[phich->num_hi].first_rb = hi_dci0_config_pdu->hi_pdu.hi_pdu_rel8.resource_block_start;
phich->config[phich->num_hi].n_DMRS = hi_dci0_config_pdu->hi_pdu.hi_pdu_rel8.cyclic_shift_2_for_drms;
......@@ -100,7 +112,7 @@ void handle_nfapi_bch_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
AssertFatal(rel8->length == 3, "BCH PDU has length %d != 3\n",rel8->length);
LOG_D(PHY,"bch_pdu: %x,%x,%x\n",sdu[0],sdu[1],sdu[2]);
//LOG_D(PHY,"bch_pdu: %x,%x,%x\n",sdu[0],sdu[1],sdu[2]);
eNB->pbch_pdu[0] = sdu[2];
eNB->pbch_pdu[1] = sdu[1];
eNB->pbch_pdu[2] = sdu[0];
......@@ -168,9 +180,9 @@ void handle_nfapi_dlsch_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
dlsch0_harq->pdsch_start = eNB->pdcch_vars[proc->subframe_tx & 1].num_pdcch_symbols;
if (dlsch0_harq->round==0) { //get pointer to SDU if this a new SDU
AssertFatal(sdu!=NULL,"NFAPI: frame %d, subframe %d: programming dlsch for round 0, rnti %x, UE_id %d, harq_pid %d : sdu is null for pdu_index %d\n",
AssertFatal(sdu!=NULL,"NFAPI: frame %d, subframe %d: programming dlsch for round 0, rnti %x, UE_id %d, harq_pid %d : sdu is null for pdu_index %d dlsch0_harq[round:%d SFN/SF:%d%d pdu:%p mcs:%d ndi:%d pdschstart:%d]\n",
proc->frame_tx,proc->subframe_tx,rel8->rnti,UE_id,harq_pid,
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pdu_index);
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pdu_index,dlsch0_harq->round,dlsch0_harq->frame,dlsch0_harq->subframe,dlsch0_harq->pdu,dlsch0_harq->mcs,dlsch0_harq->ndi,dlsch0_harq->pdsch_start);
if (rel8->rnti != 0xFFFF) LOG_D(PHY,"NFAPI: frame %d, subframe %d: programming dlsch for round 0, rnti %x, UE_id %d, harq_pid %d\n",
proc->frame_tx,proc->subframe_tx,rel8->rnti,UE_id,harq_pid);
if (codeword_index == 0) dlsch0_harq->pdu = sdu;
......@@ -586,8 +598,12 @@ void schedule_response(Sched_Rsp_t *Sched_INFO)
ul_subframe = pdcch_alloc2ul_subframe(fp,subframe);
ul_frame = pdcch_alloc2ul_frame(fp,frame,subframe);
AssertFatal(proc->subframe_tx == subframe, "Current subframe %d != NFAPI subframe %d\n",proc->subframe_tx,subframe);
AssertFatal(proc->frame_tx == frame, "Current frame %d != NFAPI frame %d\n",proc->frame_tx,frame);
// DJP - subframe assert will fail - not sure why yet
// DJP - AssertFatal(proc->subframe_tx == subframe, "Current subframe %d != NFAPI subframe %d\n",proc->subframe_tx,subframe);
// DJP - AssertFatal(proc->subframe_tx == subframe, "Current frame %d != NFAPI frame %d\n",proc->frame_tx,frame);
uint8_t number_dci = DL_req->dl_config_request_body.number_dci;
uint8_t number_pdcch_ofdm_symbols = DL_req->dl_config_request_body.number_pdcch_ofdm_symbols;
uint8_t number_dl_pdu = DL_req->dl_config_request_body.number_pdu;
uint8_t number_hi_dci0_pdu = HI_DCI0_req->hi_dci0_request_body.number_of_dci+HI_DCI0_req->hi_dci0_request_body.number_of_hi;
......@@ -599,15 +615,16 @@ void schedule_response(Sched_Rsp_t *Sched_INFO)
int i;
eNB->pdcch_vars[subframe&1].num_pdcch_symbols = DL_req->dl_config_request_body.number_pdcch_ofdm_symbols;
eNB->pdcch_vars[subframe&1].num_dci = 0;
eNB->pdcch_vars[subframe&1].num_pdcch_symbols = number_pdcch_ofdm_symbols;
eNB->pdcch_vars[subframe&1].num_dci = number_dci;
eNB->phich_vars[subframe&1].num_hi = 0;
LOG_D(PHY,"NFAPI: Sched_INFO:SFN/SF:%d%d dl_pdu:%d tx_req:%d hi_dci0:%d ul_cfg:%d num_pdcch_symbols:%d\n",
frame,subframe,number_dl_pdu,TX_req->tx_request_body.number_of_pdus,number_hi_dci0_pdu,number_ul_pdu, eNB->pdcch_vars[subframe&1].num_pdcch_symbols);
LOG_D(PHY,"NFAPI: Frame %d, Subframe %d (ul_subframe %d): received %d dl_pdu, %d tx_req, %d hi_dci0_config_req, %d UL_config \n",
frame,subframe,ul_subframe,number_dl_pdu,TX_req->tx_request_body.number_of_pdus,number_hi_dci0_pdu,number_ul_pdu);
int do_oai =0;
int dont_send =0;
if (ul_subframe<10) { // This means that there is an ul_subframe that can be configured here
LOG_D(PHY,"NFAPI: Clearing dci allocations for potential UL\n");
harq_pid = subframe2harq_pid(fp,ul_frame,ul_subframe);
......@@ -624,11 +641,13 @@ void schedule_response(Sched_Rsp_t *Sched_INFO)
}
for (i=0;i<number_dl_pdu;i++) {
dl_config_pdu = &DL_req->dl_config_request_body.dl_config_pdu_list[i];
LOG_D(PHY,"NFAPI: dl_pdu %d : type %d\n",i,dl_config_pdu->pdu_type);
//LOG_D(PHY,"NFAPI: dl_pdu %d : type %d\n",i,dl_config_pdu->pdu_type);
switch (dl_config_pdu->pdu_type) {
case NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE:
handle_nfapi_dci_dl_pdu(eNB,proc,dl_config_pdu);
eNB->pdcch_vars[subframe&1].num_dci++;
//LOG_E(PHY,"Incremented num_dci:%d but already set??? dl_config:num_dci:%d\n", eNB->pdcch_vars[subframe&1].num_dci, number_dci);
do_oai=1;
break;
case NFAPI_DL_CONFIG_BCH_PDU_TYPE:
AssertFatal(dl_config_pdu->bch_pdu.bch_pdu_rel8.pdu_index<TX_req->tx_request_body.number_of_pdus,
......@@ -636,6 +655,11 @@ void schedule_response(Sched_Rsp_t *Sched_INFO)
dl_config_pdu->bch_pdu.bch_pdu_rel8.pdu_index,
TX_req->tx_request_body.number_of_pdus);
eNB->pbch_configured=1;
do_oai=1;
//LOG_D(PHY,"%s() NFAPI_DL_CONFIG_BCH_PDU_TYPE TX:%d/%d RX:%d/%d TXREQ:%d/%d\n",
//__FUNCTION__, proc->frame_tx, proc->subframe_tx, proc->frame_rx, proc->subframe_rx, NFAPI_SFNSF2SFN(TX_req->sfn_sf), NFAPI_SFNSF2SF(TX_req->sfn_sf));
handle_nfapi_bch_pdu(eNB,proc,dl_config_pdu,
TX_req->tx_request_body.tx_pdu_list[dl_config_pdu->bch_pdu.bch_pdu_rel8.pdu_index].segments[0].segment_data);
break;
......@@ -643,22 +667,44 @@ void schedule_response(Sched_Rsp_t *Sched_INFO)
// handle_nfapi_mch_dl_pdu(eNB,dl_config_pdu);
break;
case NFAPI_DL_CONFIG_DLSCH_PDU_TYPE:
{
nfapi_dl_config_dlsch_pdu_rel8_t *dlsch_pdu_rel8 = &dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8;
uint16_t pdu_index = dlsch_pdu_rel8->pdu_index;
uint16_t tx_pdus = TX_req->tx_request_body.number_of_pdus;
uint16_t invalid_pdu = pdu_index == -1;
uint8_t *sdu = invalid_pdu ? NULL : pdu_index >= tx_pdus ? NULL : TX_req->tx_request_body.tx_pdu_list[pdu_index].segments[0].segment_data;
LOG_D(PHY,"%s() [PDU:%d] NFAPI_DL_CONFIG_DLSCH_PDU_TYPE TX:%d/%d RX:%d/%d transport_blocks:%d pdu_index:%d sdu:%p\n",
__FUNCTION__, i, proc->frame_tx, proc->subframe_tx, proc->frame_rx, proc->subframe_rx, dlsch_pdu_rel8->transport_blocks, pdu_index, sdu);
/*
AssertFatal(dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pdu_index<TX_req->tx_request_body.number_of_pdus,
"dlsch_pdu_rel8.pdu_index>=TX_req->number_of_pdus (%d>%d)\n",
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pdu_index,
TX_req->tx_request_body.number_of_pdus);
*/
AssertFatal((dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transport_blocks<3) &&
(dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transport_blocks>0),
"dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transport_blocks = %d not in [1,2]\n",
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transport_blocks);
handle_nfapi_dlsch_pdu(eNB,proc,dl_config_pdu,
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transport_blocks-1,
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pdu_index == -1 ? NULL
: TX_req->tx_request_body.tx_pdu_list[dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pdu_index].segments[0].segment_data);
AssertFatal((dlsch_pdu_rel8->transport_blocks<3) &&
(dlsch_pdu_rel8->transport_blocks>0),
"dlsch_pdu_rel8->transport_blocks = %d not in [1,2]\n",
dlsch_pdu_rel8->transport_blocks);
if (1)//sdu != NULL)
{
handle_nfapi_dlsch_pdu(eNB,proc,dl_config_pdu, dlsch_pdu_rel8->transport_blocks-1, sdu);
}
else
{
dont_send=1;
LOG_E(MAC,"%s() NFAPI_DL_CONFIG_DLSCH_PDU_TYPE sdu is NULL DL_CFG:SFN/SF:%d:pdu_index:%d TX_REQ:SFN/SF:%d:pdus:%d\n", __FUNCTION__, NFAPI_SFNSF2DEC(DL_req->sfn_sf), pdu_index, NFAPI_SFNSF2DEC(TX_req->sfn_sf), tx_pdus);
}
// Send the data first so that the DL_CONFIG can just pluck it out of the buffer
// DJP - OAI was here - moved to bottom
do_oai=1;
/*
if (dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.rnti == eNB->preamble_list[0].preamble_rel8.rnti) {// is RAR pdu
LOG_D(PHY,"Frame %d, Subframe %d: Received LTE RAR pdu, programming based on UL Grant\n",frame,subframe);
generate_eNB_ulsch_params_from_rar(eNB,
TX_req->tx_request_body.tx_pdu_list[dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pdu_index].segments[0].segment_data,
......@@ -666,6 +712,7 @@ void schedule_response(Sched_Rsp_t *Sched_INFO)
subframe);
} */
}
break;
case NFAPI_DL_CONFIG_PCH_PDU_TYPE:
// handle_nfapi_pch_pdu(eNB,dl_config_pdu);
......@@ -685,6 +732,18 @@ void schedule_response(Sched_Rsp_t *Sched_INFO)
break;
}
}
if (nfapi_mode && do_oai && !dont_send) {
oai_nfapi_tx_req(Sched_INFO->TX_req);
oai_nfapi_dl_config_req(Sched_INFO->DL_req); // DJP - .dl_config_request_body.dl_config_pdu_list[0]); // DJP - FIXME TODO - yuk - only copes with 1 pdu
}
if (nfapi_mode && number_hi_dci0_pdu!=0) {
oai_nfapi_hi_dci0_req(HI_DCI0_req);
eNB->pdcch_vars[subframe&1].num_dci=0;
eNB->pdcch_vars[subframe&1].num_pdcch_symbols=0;
}
for (i=0;i<number_hi_dci0_pdu;i++) {
......@@ -694,31 +753,62 @@ void schedule_response(Sched_Rsp_t *Sched_INFO)
switch (hi_dci0_req_pdu->pdu_type) {
case NFAPI_HI_DCI0_DCI_PDU_TYPE:
case NFAPI_HI_DCI0_DCI_PDU_TYPE:
handle_nfapi_hi_dci0_dci_pdu(eNB,proc,hi_dci0_req_pdu);
eNB->pdcch_vars[subframe&1].num_dci++;
break;
handle_nfapi_hi_dci0_dci_pdu(eNB,proc,hi_dci0_req_pdu);
case NFAPI_HI_DCI0_HI_PDU_TYPE:
handle_nfapi_hi_dci0_hi_pdu(eNB,proc,hi_dci0_req_pdu);
eNB->pdcch_vars[subframe&1].num_dci++;
break;
break;
case NFAPI_HI_DCI0_HI_PDU_TYPE:
handle_nfapi_hi_dci0_hi_pdu(eNB,proc,hi_dci0_req_pdu);
break;
}
}
for (i=0;i<number_ul_pdu;i++) {
ul_config_pdu = &UL_req->ul_config_request_body.ul_config_pdu_list[i];
LOG_D(PHY,"NFAPI: ul_pdu %d : type %d\n",i,ul_config_pdu->pdu_type);
AssertFatal(ul_config_pdu->pdu_type == NFAPI_UL_CONFIG_ULSCH_PDU_TYPE ||
ul_config_pdu->pdu_type == NFAPI_UL_CONFIG_ULSCH_HARQ_PDU_TYPE ||
ul_config_pdu->pdu_type == NFAPI_UL_CONFIG_ULSCH_CQI_RI_PDU_TYPE ||
ul_config_pdu->pdu_type == NFAPI_UL_CONFIG_ULSCH_CQI_HARQ_RI_PDU_TYPE ||
ul_config_pdu->pdu_type == NFAPI_UL_CONFIG_UCI_HARQ_PDU_TYPE ||
ul_config_pdu->pdu_type == NFAPI_UL_CONFIG_UCI_SR_PDU_TYPE ||
ul_config_pdu->pdu_type == NFAPI_UL_CONFIG_UCI_SR_HARQ_PDU_TYPE
,
"Optional UL_PDU type %d not supported\n",ul_config_pdu->pdu_type);
handle_nfapi_ul_pdu(eNB,proc,ul_config_pdu,UL_req->sfn_sf>>4,UL_req->sfn_sf&0xf,UL_req->ul_config_request_body.srs_present);
if (0){//nfapi_mode) {
int future_subframe=subframe;
//for (int future_subframe=0;future_subframe<10;future_subframe++) {
{
nfapi_ul_config_request_t *ul_req_tmp = &RC.mac[0]->UL_req_tmp[CC_id][future_subframe];
// DJP - indexing directly into the mac - not good - ??????
if (ul_req_tmp->ul_config_request_body.number_of_pdus > 0)
{
LOG_D(PHY,"UL_CONFIG for the future future_subframe:%d UL_req_tmp[PDUs:%d SFN/SF:%d]\n",
future_subframe,
ul_req_tmp->ul_config_request_body.number_of_pdus,
NFAPI_SFNSF2DEC(ul_req_tmp->sfn_sf));
oai_nfapi_ul_config_req(ul_req_tmp);
}
}
}
if (nfapi_mode) {
if (number_ul_pdu>0)
{
//LOG_D(PHY, "UL_CONFIG to send to PNF\n");
oai_nfapi_ul_config_req(UL_req);
UL_req->ul_config_request_body.number_of_pdus=0;
number_ul_pdu=0;
}
}
else {
for (i=0;i<number_ul_pdu;i++) {
ul_config_pdu = &UL_req->ul_config_request_body.ul_config_pdu_list[i];
LOG_D(PHY,"NFAPI: ul_pdu %d : type %d\n",i,ul_config_pdu->pdu_type);
AssertFatal(ul_config_pdu->pdu_type == NFAPI_UL_CONFIG_ULSCH_PDU_TYPE ||
ul_config_pdu->pdu_type == NFAPI_UL_CONFIG_ULSCH_HARQ_PDU_TYPE ||
ul_config_pdu->pdu_type == NFAPI_UL_CONFIG_ULSCH_CQI_RI_PDU_TYPE ||
ul_config_pdu->pdu_type == NFAPI_UL_CONFIG_ULSCH_CQI_HARQ_RI_PDU_TYPE ||
ul_config_pdu->pdu_type == NFAPI_UL_CONFIG_UCI_HARQ_PDU_TYPE ||
ul_config_pdu->pdu_type == NFAPI_UL_CONFIG_UCI_SR_PDU_TYPE ||
ul_config_pdu->pdu_type == NFAPI_UL_CONFIG_UCI_SR_HARQ_PDU_TYPE
,
"Optional UL_PDU type %d not supported\n",ul_config_pdu->pdu_type);
handle_nfapi_ul_pdu(eNB,proc,ul_config_pdu,UL_req->sfn_sf>>4,UL_req->sfn_sf&0xf,UL_req->ul_config_request_body.srs_present);
}
}
}
......@@ -918,7 +918,7 @@ int is_srs_occasion_common(LTE_DL_FRAME_PARMS *frame_parms,int frame_tx,int subf
if(frame_parms->soundingrs_ul_config_common.enabled_flag)
{
LOG_D(PHY," SRS SUBFRAMECONFIG: %d\n", frame_parms->soundingrs_ul_config_common.srs_SubframeConfig);
//LOG_D(PHY," SRS SUBFRAMECONFIG: %d\n", frame_parms->soundingrs_ul_config_common.srs_SubframeConfig);
uint8_t TSFC;
uint16_t deltaTSFC; // bitmap
......@@ -951,7 +951,7 @@ int is_srs_occasion_common(LTE_DL_FRAME_PARMS *frame_parms,int frame_tx,int subf
}
LOG_D(PHY," ISTDD: %d, TSFC: %d, deltaTSFC: %d, AbsSubframeTX: %d.%d\n", frame_parms->frame_type, TSFC, deltaTSFC, frame_tx, subframe_tx);
}
LOG_D(PHY," isSubframeSRS %d\n", isSubframeSRS);
//LOG_D(PHY," isSubframeSRS %d\n", isSubframeSRS);
return(isSubframeSRS);
}
......
......@@ -50,6 +50,8 @@
# include "intertask_interface.h"
#endif
extern uint8_t nfapi_mode;
int oai_nfapi_rach_ind(nfapi_rach_indication_t *rach_ind);
......@@ -137,15 +139,13 @@ void pmch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,PHY_VARS_RN *rn,rel
#endif
}
void common_signal_procedures (PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc) {
void common_signal_procedures (PHY_VARS_eNB *eNB,int frame, int subframe) {
LTE_DL_FRAME_PARMS *fp=&eNB->frame_parms;
int **txdataF = eNB->common_vars.txdataF;
uint8_t *pbch_pdu=&eNB->pbch_pdu[0];
int subframe = proc->subframe_tx;
int frame = proc->frame_tx;
LOG_D(PHY,"common_signal_procedures: frame %d, subframe %d\n",frame,subframe);
//LOG_D(PHY,"common_signal_procedures: frame %d, subframe %d fdd:%s dir:%s\n",frame,subframe,fp->frame_type == FDD?"FDD":"TDD", subframe_select(fp,subframe) == SF_DL?"DL":"UL?");
// generate Cell-Specific Reference Signals for both slots
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_RS_TX,1);
......@@ -196,7 +196,8 @@ void common_signal_procedures (PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc) {
/// generate PBCH
if ((frame&3)==0) {
AssertFatal(eNB->pbch_configured==1,"PBCH was not configured by MAC\n");
//AssertFatal(eNB->pbch_configured==1,"PBCH was not configured by MAC\n");
if (eNB->pbch_configured!=1) return;
eNB->pbch_configured=0;
}
generate_pbch(&eNB->pbch,
......@@ -270,9 +271,10 @@ void pdsch_procedures(PHY_VARS_eNB *eNB,
int input_buffer_length = dlsch_harq->TBS/8;
LTE_DL_FRAME_PARMS *fp=&eNB->frame_parms;
if (dlsch->rnti == 0x02) {//frame < 200) {
if (1){
//if (dlsch->rnti == 0x02) {//frame < 200) {
LOG_I(PHY,
LOG_D(PHY,
"[eNB %"PRIu8"][PDSCH %"PRIx16"/%"PRIu8"] Frame %d, subframe %d: Generating PDSCH/DLSCH with input size = %"PRIu16", pdsch_start %d, G %d, nb_rb %"PRIu16", rb0 %x, rb1 %x, TBS %"PRIu16", pmi_alloc %"PRIx64", rv %"PRIu8" (round %"PRIu8")\n",
eNB->Mod_id, dlsch->rnti,harq_pid,
frame, subframe, input_buffer_length, dlsch_harq->pdsch_start,
......@@ -421,7 +423,7 @@ void phy_procedures_eNB_TX(PHY_VARS_eNB *eNB,
}
else {
// this is not a pmch subframe, so generate PSS/SSS/PBCH
common_signal_procedures(eNB,proc);
common_signal_procedures(eNB,proc->frame_tx, proc->subframe_tx);
}
// clear existing ulsch dci allocations before applying info from MAC (this is table
......@@ -475,30 +477,36 @@ void phy_procedures_eNB_TX(PHY_VARS_eNB *eNB,
num_dci = eNB->pdcch_vars[subframe&1].num_dci;
// LOG_D(PHY,"num_pdcch_symbols %"PRIu8",(dci common %"PRIu8", dci uespec %"PRIu8"\n",num_pdcch_symbols,
// DCI_pdu->Num_common_dci,DCI_pdu->Num_ue_spec_dci);
LOG_D(PHY,"num_pdcch_symbols %"PRIu8",(number dci %"PRIu8"\n",num_pdcch_symbols,
num_dci);
//LOG_D(PHY,"num_pdcch_symbols %"PRIu8",number dci %"PRIu8"\n",num_pdcch_symbols, num_dci);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_DCI_INFO,num_pdcch_symbols);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_DCI_INFO,(frame*10)+subframe);
if (num_dci > 0)
LOG_D(PHY,"[eNB %"PRIu8"] Frame %d, subframe %d: Calling generate_dci_top (pdcch) (num_dci %"PRIu8")\n",eNB->Mod_id,frame, subframe,
num_dci);
{
//LOG_D(PHY,"[eNB %"PRIu8"] Frame %d, subframe %d: Calling generate_dci_top (pdcch) (num_dci %"PRIu8") num_pdcch_symbols:%d\n",eNB->Mod_id,frame, subframe, num_dci, num_pdcch_symbols);
}
generate_dci_top(num_pdcch_symbols,
num_dci,
&eNB->pdcch_vars[subframe&1].dci_alloc[0],
0,
AMP,
fp,
eNB->common_vars.txdataF,
subframe);
//LOG_D(PHY,"Before generate_dci_top num_pdcch_symbols:%d num_dci:%d dci_alloc:dci_length:%d\n", num_pdcch_symbols, num_dci, eNB->pdcch_vars[subframe&1].dci_alloc[0].dci_length);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_PDCCH_TX,1);
if (nfapi_mode == 0 || nfapi_mode == 1) {
generate_dci_top(num_pdcch_symbols,
num_dci,
&eNB->pdcch_vars[subframe&1].dci_alloc[0],
0,
AMP,
fp,
eNB->common_vars.txdataF,
subframe);
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_PDCCH_TX,0);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_GENERATE_DLSCH,1);
// Now scan UE specific DLSCH
LTE_eNB_DLSCH_t *dlsch0,*dlsch1;
for (UE_id=0; UE_id<NUMBER_OF_UE_MAX; UE_id++)
......@@ -513,33 +521,44 @@ void phy_procedures_eNB_TX(PHY_VARS_eNB *eNB,
// get harq_pid
harq_pid = dlsch0->harq_ids[subframe];
AssertFatal(harq_pid>=0,"harq_pid is negative\n");
// generate pdsch
pdsch_procedures(eNB,
proc,
harq_pid,
dlsch0,
dlsch1,
&eNB->UE_stats[(uint32_t)UE_id],
0);
if (harq_pid>=8)
{
LOG_E(PHY,"harq_pid:%d corrupt must be 0-7\n", harq_pid);
}
else
{
// generate pdsch
pdsch_procedures(eNB,
proc,
harq_pid,
dlsch0,
dlsch1,
&eNB->UE_stats[(uint32_t)UE_id],
0);
}
}
else if ((dlsch0)&&
(dlsch0->rnti>0)&&
(dlsch0->active == 0)) {
(dlsch0->rnti>0)&&
(dlsch0->active == 0)) {
// clear subframe TX flag since UE is not scheduled for PDSCH in this subframe (so that we don't look for PUCCH later)
dlsch0->subframe_tx[subframe]=0;
// clear subframe TX flag since UE is not scheduled for PDSCH in this subframe (so that we don't look for PUCCH later)
dlsch0->subframe_tx[subframe]=0;
}
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_GENERATE_DLSCH,0);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_GENERATE_PHICH,1);
generate_phich_top(eNB,
proc,
AMP);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_GENERATE_PHICH,0);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_TX+offset,0);
if (do_meas==1) stop_meas(&eNB->phy_proc_tx);
......@@ -561,14 +580,14 @@ void prach_procedures(PHY_VARS_eNB *eNB,
subframe = eNB->proc.subframe_prach_br;
frame = eNB->proc.frame_prach_br;
pthread_mutex_lock(&eNB->UL_INFO_mutex);
eNB->UL_INFO.rach_ind_br.number_of_preambles=0;
eNB->UL_INFO.rach_ind_br.rach_indication_body.number_of_preambles=0;
pthread_mutex_unlock(&eNB->UL_INFO_mutex);
}
else
#endif
{
pthread_mutex_lock(&eNB->UL_INFO_mutex);
eNB->UL_INFO.rach_ind.number_of_preambles=0;
eNB->UL_INFO.rach_ind.rach_indication_body.number_of_preambles=0;
pthread_mutex_unlock(&eNB->UL_INFO_mutex);
subframe = eNB->proc.subframe_prach;
frame = eNB->proc.frame_prach;
......@@ -608,20 +627,22 @@ void prach_procedures(PHY_VARS_eNB *eNB,
);
//#ifdef DEBUG_PHY_PROC
LOG_D(PHY,"[RAPROC] Frame %d, subframe %d : Most likely preamble %d, energy %d dB delay %d\n",
if (max_preamble_energy[0]/10 > 32)
LOG_E(PHY,"[RAPROC] Frame %d, subframe %d : Most likely preamble %d, energy %d dB delay %d\n",
frame,subframe,
max_preamble[0],
max_preamble[0],
max_preamble_energy[0]/10,
max_preamble_delay[0]);
//q#endif
#ifdef Rel14
if (br_flag==1) {
int prach_mask;
prach_mask = is_prach_subframe(&eNB->frame_parms,eNB->proc.frame_prach_br,eNB->proc.subframe_prach_br);
eNB->UL_INFO.rach_ind_br.preamble_list = eNB->preamble_list_br;
eNB->UL_INFO.rach_ind_br.rach_indication_body.preamble_list = eNB->preamble_list_br;
int ind=0;
int ce_level=0;
/* Save for later, it doesn't work
......@@ -635,7 +656,7 @@ void prach_procedures(PHY_VARS_eNB *eNB,
if (eNB->frame_parms.prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[0]==1){
if ((eNB->prach_energy_counter == 100) &&
(max_preamble_energy[0] > eNB->measurements.prach_I0 + 100)) {
eNB->UL_INFO.rach_ind_br.number_of_preambles++;
eNB->UL_INFO.rach_ind_br.rach_indication_body.number_of_preambles++;
eNB->preamble_list_br[ind].preamble_rel8.timing_advance = max_preamble_delay[ind];//
eNB->preamble_list_br[ind].preamble_rel8.preamble = max_preamble[ind];
......@@ -665,7 +686,7 @@ void prach_procedures(PHY_VARS_eNB *eNB,
if ((eNB->prach_energy_counter == 100) &&
(max_preamble_energy[0] > eNB->measurements.prach_I0+100)) {
LOG_D(PHY,"[eNB %d/%d][RAPROC] Frame %d, subframe %d Initiating RA procedure with preamble %d, energy %d.%d dB, delay %d\n",
LOG_E(PHY,"[eNB %d/%d][RAPROC] Frame %d, subframe %d Initiating RA procedure with preamble %d, energy %d.%d dB, delay %d\n",
eNB->Mod_id,
eNB->CC_id,
frame,
......@@ -680,20 +701,34 @@ void prach_procedures(PHY_VARS_eNB *eNB,
pthread_mutex_lock(&eNB->UL_INFO_mutex);
eNB->UL_INFO.rach_ind.number_of_preambles = 1;
eNB->UL_INFO.rach_ind.preamble_list = eNB->preamble_list;
eNB->UL_INFO.rach_ind.rach_indication_body.number_of_preambles = 1;
eNB->UL_INFO.rach_ind.rach_indication_body.preamble_list = &eNB->preamble_list[0];
eNB->UL_INFO.rach_ind.rach_indication_body.tl.tag = NFAPI_RACH_INDICATION_BODY_TAG;
eNB->UL_INFO.rach_ind.header.message_id = NFAPI_RACH_INDICATION;
eNB->UL_INFO.rach_ind.sfn_sf = frame<<4 | subframe;
eNB->preamble_list[0].preamble_rel8.tl.tag = NFAPI_PREAMBLE_REL8_TAG;
eNB->preamble_list[0].preamble_rel8.timing_advance = max_preamble_delay[0];
eNB->preamble_list[0].preamble_rel8.preamble = max_preamble[0];
eNB->preamble_list[0].preamble_rel8.rnti = 1+subframe; // note: fid is implicitly 0 here
eNB->preamble_list[0].preamble_rel13.rach_resource_type = 0;
eNB->preamble_list[0].instance_length = 0; //don't know exactly what this is
LOG_D(PHY,"Filling NFAPI indication for RACH : TA %d, Preamble %d, rnti %x, rach_resource_type %d\n",
eNB->preamble_list[0].preamble_rel8.timing_advance,
eNB->preamble_list[0].preamble_rel8.preamble,
eNB->preamble_list[0].preamble_rel8.rnti,
eNB->preamble_list[0].preamble_rel13.rach_resource_type);
if (nfapi_mode == 1) // If NFAPI PNF then we need to send the message to the VNF
{
LOG_E(PHY,"\n\n\n\nDJP - this needs to be sent to VNF **********************************************\n\n\n\n");
LOG_E(PHY,"Filling NFAPI indication for RACH : SFN_SF:%d TA %d, Preamble %d, rnti %x, rach_resource_type %d\n",
NFAPI_SFNSF2DEC(eNB->UL_INFO.rach_ind.sfn_sf),
eNB->preamble_list[0].preamble_rel8.timing_advance,
eNB->preamble_list[0].preamble_rel8.preamble,
eNB->preamble_list[0].preamble_rel8.rnti,
eNB->preamble_list[0].preamble_rel13.rach_resource_type);
oai_nfapi_rach_ind(&eNB->UL_INFO.rach_ind);
eNB->UL_INFO.rach_ind.rach_indication_body.number_of_preambles = 0;
}
pthread_mutex_unlock(&eNB->UL_INFO_mutex);
} // max_preamble_energy > prach_I0 + 100
......@@ -742,21 +777,31 @@ void srs_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc) {
void fill_sr_indication(PHY_VARS_eNB *eNB,uint16_t rnti,int frame,int subframe,uint32_t stat) {
pthread_mutex_lock(&eNB->UL_INFO_mutex);
nfapi_sr_indication_pdu_t *pdu = &eNB->UL_INFO.sr_ind.sr_pdu_list[eNB->UL_INFO.sr_ind.number_of_srs];
nfapi_sr_indication_t *sr_ind = &eNB->UL_INFO.sr_ind;
nfapi_sr_indication_body_t *sr_ind_body = &sr_ind->sr_indication_body;
nfapi_sr_indication_pdu_t *pdu = &sr_ind_body->sr_pdu_list[sr_ind_body->number_of_srs];
sr_ind->sfn_sf = frame<<4|subframe;
sr_ind->header.message_id = NFAPI_RX_SR_INDICATION;
sr_ind_body->tl.tag = NFAPI_SR_INDICATION_BODY_TAG;
pdu->instance_length = 0; // don't know what to do with this
// pdu->rx_ue_information.handle = handle;
pdu->rx_ue_information.tl.tag = NFAPI_RX_UE_INFORMATION_TAG;
pdu->rx_ue_information.rnti = rnti;
int SNRtimes10 = dB_fixed_times10(stat) - 200;//(10*eNB->measurements.n0_power_dB[0]);
pdu->ul_cqi_information.tl.tag = NFAPI_UL_CQI_INFORMATION_TAG;
if (SNRtimes10 < -640) pdu->ul_cqi_information.ul_cqi=0;
else if (SNRtimes10 > 635) pdu->ul_cqi_information.ul_cqi=255;
else pdu->ul_cqi_information.ul_cqi=(640+SNRtimes10)/5;
pdu->ul_cqi_information.channel = 0;
eNB->UL_INFO.sr_ind.number_of_srs++;
sr_ind_body->number_of_srs++;
pthread_mutex_unlock(&eNB->UL_INFO_mutex);
}
......@@ -1082,7 +1127,7 @@ void uci_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc)
}
}
uci->stat = max_metric;
fill_uci_harq_indication(eNB,uci,frame,subframe,harq_ack,1,tdd_multiplexing_mask); // multiplexing mode
fill_uci_harq_indication(eNB,uci,frame,subframe,harq_ack,1,tdd_multiplexing_mask); // multiplexing mode
}
} //else if ((uci->tdd_bundling == 0) && (res==3))
else if ((uci->tdd_bundling == 0) && (uci->num_pucch_resources==4)){ // multiplexing + no SR, implement Table 10.1.3-7 (Rel14) for multiplexing with M=4
......@@ -1243,14 +1288,14 @@ void uci_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc)
}
if (SR_payload == 1) {
LOG_D(PHY,"[eNB %d][SR %x] Frame %d subframe %d Got SR for PUSCH, transmitting to MAC\n",eNB->Mod_id,
LOG_E(PHY,"[eNB %d][SR %x] Frame %d subframe %d Got SR for PUSCH, transmitting to MAC\n",eNB->Mod_id,
uci->rnti,frame,subframe);
if (eNB->first_sr[i] == 1) { // this is the first request for uplink after Connection Setup, so clear HARQ process 0 use for Msg4
eNB->first_sr[i] = 0;
eNB->dlsch[i][0]->harq_processes[0]->round=0;
eNB->dlsch[i][0]->harq_processes[0]->status=SCH_IDLE;
LOG_D(PHY,"[eNB %d][SR %x] Frame %d subframe %d First SR\n",
LOG_E(PHY,"[eNB %d][SR %x] Frame %d subframe %d First SR\n",
eNB->Mod_id,
eNB->ulsch[i]->rnti,frame,subframe);
}
......@@ -1267,81 +1312,80 @@ void pusch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc)
LTE_DL_FRAME_PARMS *fp=&eNB->frame_parms;
LTE_eNB_ULSCH_t *ulsch;
LTE_UL_eNB_HARQ_t *ulsch_harq;
struct timespec t_decode, t_crc,t_rx_ind,t_rx_ind_b,t_harq_a,t_harq_b,t_end;
const int subframe = proc->subframe_rx;
const int frame = proc->frame_rx;
if (fp->frame_type == FDD) harq_pid = ((10*frame) + subframe)&7;
else harq_pid = subframe%10;
for (i=0; i<NUMBER_OF_UE_MAX; i++) {
ulsch = eNB->ulsch[i];
ulsch_harq = ulsch->harq_processes[harq_pid];
if (ulsch->rnti>0) LOG_D(PHY,"Frame %d, subframe %d: PUSCH procedures, harq_pid %d, UE %d/%x\n",
frame,subframe,harq_pid,i,ulsch->rnti);
if (ulsch->rnti>0) LOG_D(PHY,"eNB->ulsch[%d]->harq_processes[harq_pid:%d] Frame %d, subframe %d: PUSCH procedures, harq_pid %d, UE %d/%x ulsch_harq[status:%d frame:%d subframe:%d handled:%d]\n",
i, harq_pid, frame,subframe,harq_pid,i,ulsch->rnti,
ulsch_harq->status, ulsch_harq->frame, ulsch_harq->subframe, ulsch_harq->handled);
if ((ulsch) &&
(ulsch->rnti>0) &&
(ulsch_harq->status == ACTIVE) &&
(ulsch_harq->frame == frame) &&
(ulsch_harq->subframe == subframe) &&
(ulsch_harq->frame == frame) &&
(ulsch_harq->subframe == subframe) &&
(ulsch_harq->handled == 0)) {
// UE has ULSCH scheduling
for (int rb=0;
rb<=ulsch_harq->nb_rb;
rb++) {
int rb2 = rb+ulsch_harq->first_rb;
eNB->rb_mask_ul[rb2>>5] |= (1<<(rb2&31));
rb++) {
int rb2 = rb+ulsch_harq->first_rb;
eNB->rb_mask_ul[rb2>>5] |= (1<<(rb2&31));
}
LOG_D(PHY,"[eNB %d] frame %d, subframe %d: Scheduling ULSCH Reception for UE %d \n",
eNB->Mod_id,
frame,
subframe,
i);
//LOG_D(PHY,"[eNB %d] frame %d, subframe %d: Scheduling ULSCH Reception for UE %d \n", eNB->Mod_id, frame, subframe, i);
nPRS = fp->pusch_config_common.ul_ReferenceSignalsPUSCH.nPRS[subframe<<1];
ulsch->cyclicShift = (ulsch_harq->n_DMRS2 +
fp->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift +
nPRS)%12;
fp->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift +
nPRS)%12;
LOG_D(PHY,
"[eNB %d][PUSCH %d] Frame %d Subframe %d Demodulating PUSCH: dci_alloc %d, rar_alloc %d, round %d, first_rb %d, nb_rb %d, Qm %d, TBS %d, rv %d, cyclic_shift %d (n_DMRS2 %d, cyclicShift_common %d, nprs %d), O_ACK %d, beta_cqi %d \n",
eNB->Mod_id,harq_pid,frame,subframe,
ulsch_harq->dci_alloc,
ulsch_harq->rar_alloc,
ulsch_harq->round,
ulsch_harq->first_rb,
ulsch_harq->nb_rb,
ulsch_harq->Qm,
ulsch_harq->TBS,
ulsch_harq->rvidx,
ulsch->cyclicShift,
ulsch_harq->n_DMRS2,
fp->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift,
nPRS,
ulsch_harq->O_ACK,
ulsch->beta_offset_cqi_times8);
start_meas(&eNB->ulsch_demodulation_stats);
"[eNB %d][PUSCH %d] Frame %d Subframe %d Demodulating PUSCH: dci_alloc %d, rar_alloc %d, round %d, first_rb %d, nb_rb %d, Qm %d, TBS %d, rv %d, cyclic_shift %d (n_DMRS2 %d, cyclicShift_common %d, ), O_ACK %d, beta_cqi %d \n",
eNB->Mod_id,harq_pid,frame,subframe,
ulsch_harq->dci_alloc,
ulsch_harq->rar_alloc,
ulsch_harq->round,
ulsch_harq->first_rb,
ulsch_harq->nb_rb,
ulsch_harq->Qm,
ulsch_harq->TBS,
ulsch_harq->rvidx,
ulsch->cyclicShift,
ulsch_harq->n_DMRS2,
fp->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift,
ulsch_harq->O_ACK,
ulsch->beta_offset_cqi_times8);
start_meas(&eNB->ulsch_demodulation_stats);
rx_ulsch(eNB,proc, i);
stop_meas(&eNB->ulsch_demodulation_stats);
stop_meas(&eNB->ulsch_demodulation_stats);
clock_gettime(CLOCK_MONOTONIC,&t_decode);
start_meas(&eNB->ulsch_decoding_stats);
start_meas(&eNB->ulsch_decoding_stats);
ret = ulsch_decoding(eNB,proc,
i,
0, // control_only_flag
ulsch_harq->V_UL_DAI,
ulsch_harq->nb_rb>20 ? 1 : 0);
ret = ulsch_decoding(eNB,proc,
i,
0, // control_only_flag
ulsch_harq->V_UL_DAI,
ulsch_harq->nb_rb>20 ? 1 : 0);
stop_meas(&eNB->ulsch_decoding_stats);
stop_meas(&eNB->ulsch_decoding_stats);
LOG_D(PHY,"[eNB %d][PUSCH %d] frame %d subframe %d RNTI %x RX power (%d,%d) N0 (%d,%d) dB ACK (%d,%d), decoding iter %d\n",
LOG_D(PHY,"[eNB %d][PUSCH %d] frame %d subframe %d RNTI %x RX power (%d,%d) N0 (%d,%d) dB ACK (%d,%d), decoding iter %d ulsch_harq->cqi_crc_status:%d ackBits:%d ulsch_decoding_stats[t:%lld max:%lld]\n",
eNB->Mod_id,harq_pid,
frame,subframe,
ulsch->rnti,
......@@ -1351,51 +1395,55 @@ void pusch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc)
20,//eNB->measurements.n0_power_dB[1],
ulsch_harq->o_ACK[0],
ulsch_harq->o_ACK[1],
ret);
ret,
ulsch_harq->cqi_crc_status,
ulsch_harq->O_ACK,
eNB->ulsch_decoding_stats.diff_now, eNB->ulsch_decoding_stats.max);
//compute the expected ULSCH RX power (for the stats)
ulsch_harq->delta_TF = get_hundred_times_delta_IF_eNB(eNB,i,harq_pid, 0); // 0 means bw_factor is not considered
//compute the expected ULSCH RX power (for the stats)
ulsch_harq->delta_TF = get_hundred_times_delta_IF_eNB(eNB,i,harq_pid, 0); // 0 means bw_factor is not considered
if (ulsch_harq->cqi_crc_status == 1) {
if (ulsch_harq->cqi_crc_status == 1) {
#ifdef DEBUG_PHY_PROC
//if (((frame%10) == 0) || (frame < 50))
print_CQI(ulsch_harq->o,ulsch_harq->uci_format,0,fp->N_RB_DL);
//if (((frame%10) == 0) || (frame < 50))
print_CQI(ulsch_harq->o,ulsch_harq->uci_format,0,fp->N_RB_DL);
#endif
fill_ulsch_cqi_indication(eNB,frame,subframe,
ulsch_harq,
ulsch->rnti);
fill_ulsch_cqi_indication(eNB,frame,subframe,
ulsch_harq,
ulsch->rnti);
}
if (ret == (1+MAX_TURBO_ITERATIONS)) {
T(T_ENB_PHY_ULSCH_UE_NACK, T_INT(eNB->Mod_id), T_INT(frame), T_INT(subframe), T_INT(ulsch->rnti),
T_INT(harq_pid));
fill_crc_indication(eNB,i,frame,subframe,1); // indicate NAK to MAC
fill_rx_indication(eNB,i,frame,subframe); // indicate SDU to MAC
fill_crc_indication(eNB,i,frame,subframe,1); // indicate NAK to MAC
fill_rx_indication(eNB,i,frame,subframe); // indicate SDU to MAC
LOG_D(PHY,"[eNB %d][PUSCH %d] frame %d subframe %d UE %d Error receiving ULSCH, round %d/%d (ACK %d,%d)\n",
eNB->Mod_id,harq_pid,
frame,subframe, i,
ulsch_harq->round-1,
ulsch->Mlimit,
ulsch_harq->o_ACK[0],
ulsch_harq->o_ACK[1]);
LOG_D(PHY,"[eNB %d][PUSCH %d] frame %d subframe %d UE %d Error receiving ULSCH, round %d/%d (ACK %d,%d)\n",
eNB->Mod_id,harq_pid,
frame,subframe, i,
ulsch_harq->round-1,
ulsch->Mlimit,
ulsch_harq->o_ACK[0],
ulsch_harq->o_ACK[1]);
if (ulsch_harq->round >= 3) {
ulsch_harq->status = SCH_IDLE;
ulsch_harq->handled = 0;
ulsch->harq_mask &= ~(1 << harq_pid);
ulsch_harq->round = 0;
}
}
#if defined(MESSAGE_CHART_GENERATOR_PHY)
MSC_LOG_RX_DISCARDED_MESSAGE(
MSC_PHY_ENB,MSC_PHY_UE,
NULL,0,
"%05u:%02u ULSCH received rnti %x harq id %u round %d",
frame,subframe,
ulsch->rnti,harq_pid,
ulsch_harq->round-1
);
MSC_PHY_ENB,MSC_PHY_UE,
NULL,0,
"%05u:%02u ULSCH received rnti %x harq id %u round %d",
frame,subframe,
ulsch->rnti,harq_pid,
ulsch_harq->round-1
);
#endif
/* Mark the HARQ process to release it later if max transmission reached
......@@ -1406,8 +1454,12 @@ void pusch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc)
ulsch_harq->handled = 1;
} // ulsch in error
else {
fill_crc_indication(eNB,i,frame,subframe,0); // indicate ACK to MAC
fill_rx_indication(eNB,i,frame,subframe); // indicate SDU to MAC
clock_gettime(CLOCK_MONOTONIC,&t_crc);
fill_crc_indication(eNB,i,frame,subframe,0); // indicate ACK to MAC
clock_gettime(CLOCK_MONOTONIC,&t_rx_ind);
fill_rx_indication(eNB,i,frame,subframe); // indicate SDU to MAC
clock_gettime(CLOCK_MONOTONIC,&t_rx_ind_b);
ulsch_harq->status = SCH_IDLE;
ulsch->harq_mask &= ~(1 << harq_pid);
......@@ -1416,29 +1468,31 @@ void pusch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc)
T_INT(harq_pid));
#if defined(MESSAGE_CHART_GENERATOR_PHY)
MSC_LOG_RX_MESSAGE(
MSC_PHY_ENB,MSC_PHY_UE,
NULL,0,
"%05u:%02u ULSCH received rnti %x harq id %u",
frame,subframe,
ulsch->rnti,harq_pid
);
MSC_LOG_RX_MESSAGE(
MSC_PHY_ENB,MSC_PHY_UE,
NULL,0,
"%05u:%02u ULSCH received rnti %x harq id %u",
frame,subframe,
ulsch->rnti,harq_pid
);
#endif
#ifdef DEBUG_PHY_PROC
#ifdef DEBUG_ULSCH
LOG_D(PHY,"[eNB] Frame %d, Subframe %d : ULSCH SDU (RX harq_pid %d) %d bytes:",frame,subframe,
harq_pid,ulsch_harq->TBS>>3);
LOG_D(PHY,"[eNB] Frame %d, Subframe %d : ULSCH SDU (RX harq_pid %d) %d bytes:",frame,subframe,
harq_pid,ulsch_harq->TBS>>3);
for (j=0; j<ulsch_harq->TBS>>3; j++)
LOG_T(PHY,"%x.",ulsch->harq_processes[harq_pid]->b[j]);
for (j=0; j<ulsch_harq->TBS>>3; j++)
LOG_T(PHY,"%x.",ulsch->harq_processes[harq_pid]->b[j]);
LOG_T(PHY,"\n");
LOG_T(PHY,"\n");
#endif
#endif
} // ulsch not in error
} // ulsch not in error
clock_gettime(CLOCK_MONOTONIC,&t_harq_a);
if (ulsch_harq->O_ACK>0) fill_ulsch_harq_indication(eNB,ulsch_harq,ulsch->rnti,frame,subframe,ulsch->bundling);
clock_gettime(CLOCK_MONOTONIC,&t_harq_b);
LOG_D(PHY,"[eNB %d] Frame %d subframe %d: received ULSCH harq_pid %d for UE %d, ret = %d, CQI CRC Status %d, ACK %d,%d, ulsch_errors %d/%d\n",
eNB->Mod_id,frame,subframe,
......@@ -1459,14 +1513,23 @@ void pusch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc)
(ulsch_harq->frame == frame) &&
(ulsch_harq->subframe == subframe) &&
(ulsch_harq->handled == 1)) {
// this harq process is stale, kill it, this 1024 frames later (10s), consider reducing that
ulsch_harq->status = SCH_IDLE;
// this harq process is stale, kill it, this 1024 frames later (10s), consider reducing that
ulsch_harq->status = SCH_IDLE;
ulsch_harq->handled = 0;
ulsch->harq_mask &= ~(1 << harq_pid);
LOG_W(PHY,"Removing stale ULSCH config for UE %x harq_pid %d (harq_mask is now 0x%2.2x)\n",
ulsch->rnti, harq_pid, ulsch->harq_mask);
}
} // for (i=0; i<NUMBER_OF_UE_MAX; i++) {
clock_gettime(CLOCK_MONOTONIC,&t_end);
if (0)LOG_E(PHY,"%s() TIMING:decode:%ld.%09ld crc:%ld.%09ld rx_ind:%ld.%09ld-%ld.%09ld harq:%ld.%09ld-%ld.%09ld end:%ld.%09ld\n", __FUNCTION__,
t_decode.tv_sec, t_decode.tv_nsec,
t_crc.tv_sec, t_crc.tv_nsec,
t_rx_ind.tv_sec, t_rx_ind.tv_nsec,
t_rx_ind_b.tv_sec, t_rx_ind_b.tv_nsec,
t_harq_a.tv_sec, t_harq_a.tv_nsec,
t_harq_b.tv_sec, t_harq_b.tv_nsec,
t_end.tv_sec, t_end.tv_nsec);
}
extern int oai_exit;
......@@ -1512,16 +1575,22 @@ void fill_rx_indication(PHY_VARS_eNB *eNB,int UE_id,int frame,int subframe)
int sync_pos;
uint32_t harq_pid = subframe2harq_pid(&eNB->frame_parms,
frame,subframe);
frame,subframe);
pthread_mutex_lock(&eNB->UL_INFO_mutex);
pdu = &eNB->UL_INFO.rx_ind.rx_pdu_list[eNB->UL_INFO.rx_ind.number_of_pdus];
eNB->UL_INFO.rx_ind.sfn_sf = frame<<4| subframe;
eNB->UL_INFO.rx_ind.rx_indication_body.tl.tag = NFAPI_RX_INDICATION_BODY_TAG;
pdu = &eNB->UL_INFO.rx_ind.rx_indication_body.rx_pdu_list[eNB->UL_INFO.rx_ind.rx_indication_body.number_of_pdus];
// pdu->rx_ue_information.handle = eNB->ulsch[UE_id]->handle;
pdu->rx_ue_information.tl.tag = NFAPI_RX_UE_INFORMATION_TAG;
pdu->rx_ue_information.rnti = eNB->ulsch[UE_id]->rnti;
pdu->rx_indication_rel8.tl.tag = NFAPI_RX_INDICATION_REL8_TAG;
pdu->rx_indication_rel8.length = eNB->ulsch[UE_id]->harq_processes[harq_pid]->TBS>>3;
pdu->rx_indication_rel8.offset = 0; // filled in at the end of the UL_INFO formation
pdu->data = eNB->ulsch[UE_id]->harq_processes[harq_pid]->b;
pdu->rx_indication_rel8.offset = 1; // DJP - I dont understand - but broken unless 1 ???? 0; // filled in at the end of the UL_INFO formation
pdu->data = eNB->ulsch[UE_id]->harq_processes[harq_pid]->b;
// estimate timing advance for MAC
sync_pos = lte_est_timing_advance_pusch(eNB,UE_id);
timing_advance_update = sync_pos; // - eNB->frame_parms.nb_prefix_samples/4; //to check
......@@ -1551,10 +1620,10 @@ void fill_rx_indication(PHY_VARS_eNB *eNB,int UE_id,int frame,int subframe)
else pdu->rx_indication_rel8.ul_cqi=(640+SNRtimes10)/5;
LOG_D(PHY,"[PUSCH %d] Filling RX_indication with SNR %d (%d), timing_advance %d (update %d)\n",
harq_pid,SNRtimes10,pdu->rx_indication_rel8.ul_cqi,pdu->rx_indication_rel8.timing_advance,
timing_advance_update);
harq_pid,SNRtimes10,pdu->rx_indication_rel8.ul_cqi,pdu->rx_indication_rel8.timing_advance,
timing_advance_update);
eNB->UL_INFO.rx_ind.number_of_pdus++;
eNB->UL_INFO.rx_ind.rx_indication_body.number_of_pdus++;
pthread_mutex_unlock(&eNB->UL_INFO_mutex);
}
......@@ -1649,11 +1718,13 @@ void fill_ulsch_cqi_indication(PHY_VARS_eNB *eNB,uint16_t frame,uint8_t subframe
nfapi_cqi_indication_pdu_t *pdu = &eNB->UL_INFO.cqi_ind.cqi_pdu_list[eNB->UL_INFO.cqi_ind.number_of_cqis];
nfapi_cqi_indication_raw_pdu_t *raw_pdu = &eNB->UL_INFO.cqi_ind.cqi_raw_pdu_list[eNB->UL_INFO.cqi_ind.number_of_cqis];
pdu->rx_ue_information.tl.tag = NFAPI_RX_UE_INFORMATION_TAG;
pdu->rx_ue_information.rnti = rnti;
if (ulsch_harq->cqi_crc_status != 1) pdu->cqi_indication_rel9.data_offset = 0;
else pdu->cqi_indication_rel9.data_offset = 1; // fill in after all cqi_indications have been generated when non-zero
// by default set O to rank 1 value
pdu->cqi_indication_rel9.tl.tag = NFAPI_CQI_INDICATION_REL9_TAG;
pdu->cqi_indication_rel9.length = (ulsch_harq->Or1>>3) + ((ulsch_harq->Or1&7) > 0 ? 1 : 0);
pdu->cqi_indication_rel9.ri[0] = 0;
......@@ -1668,6 +1739,8 @@ void fill_ulsch_cqi_indication(PHY_VARS_eNB *eNB,uint16_t frame,uint8_t subframe
pdu->ul_cqi_information.channel = 1; // PUSCH
memcpy((void*)raw_pdu->pdu,ulsch_harq->o,pdu->cqi_indication_rel9.length);
eNB->UL_INFO.cqi_ind.number_of_cqis++;
LOG_E(PHY,"eNB->UL_INFO.cqi_ind.number_of_cqis:%d\n", eNB->UL_INFO.cqi_ind.number_of_cqis);
pthread_mutex_unlock(&eNB->UL_INFO_mutex);
}
......@@ -1677,16 +1750,23 @@ void fill_ulsch_harq_indication(PHY_VARS_eNB *eNB,LTE_UL_eNB_HARQ_t *ulsch_harq,
int UE_id = find_dlsch(rnti,eNB,SEARCH_EXIST);
AssertFatal(UE_id>=0,"UE_id doesn't exist\n");
LOG_I(PHY,"%s(eNB, ulsch_harq, rnti:%04x, frame:%d, subframe:%d, bundling:%d) harq_pdus:%d\n", __FUNCTION__, rnti, frame, subframe, bundling,eNB->UL_INFO.harq_ind.harq_indication_body.number_of_harqs);
pthread_mutex_lock(&eNB->UL_INFO_mutex);
nfapi_harq_indication_pdu_t *pdu = &eNB->UL_INFO.harq_ind.harq_pdu_list[eNB->UL_INFO.harq_ind.number_of_harqs];
nfapi_harq_indication_pdu_t *pdu = &eNB->UL_INFO.harq_ind.harq_indication_body.harq_pdu_list[eNB->UL_INFO.harq_ind.harq_indication_body.number_of_harqs];
int M;
int i;
eNB->UL_INFO.harq_ind.header.message_id = NFAPI_HARQ_INDICATION;
eNB->UL_INFO.harq_ind.sfn_sf = frame<<4|subframe;
pdu->instance_length = 0; // don't know what to do with this
// pdu->rx_ue_information.handle = handle;
pdu->rx_ue_information.tl.tag = NFAPI_RX_UE_INFORMATION_TAG;
pdu->rx_ue_information.rnti = rnti;
if (eNB->frame_parms.frame_type == FDD) {
pdu->harq_indication_fdd_rel13.tl.tag = NFAPI_HARQ_INDICATION_FDD_REL13_TAG;
pdu->harq_indication_fdd_rel13.mode = 0;
pdu->harq_indication_fdd_rel13.number_of_ack_nack = ulsch_harq->O_ACK;
......@@ -1712,8 +1792,9 @@ void fill_ulsch_harq_indication(PHY_VARS_eNB *eNB,LTE_UL_eNB_HARQ_t *ulsch_harq,
M=ul_ACK_subframe2_M(&eNB->frame_parms,
subframe);
pdu->harq_indication_fdd_rel13.mode = 1-bundling;
pdu->harq_indication_fdd_rel13.number_of_ack_nack = ulsch_harq->O_ACK;
pdu->harq_indication_tdd_rel13.tl.tag = NFAPI_HARQ_INDICATION_TDD_REL13_TAG;
pdu->harq_indication_tdd_rel13.mode = 1-bundling;
pdu->harq_indication_tdd_rel13.number_of_ack_nack = ulsch_harq->O_ACK;
for (i=0;i<ulsch_harq->O_ACK;i++) {
AssertFatal(ulsch_harq->o_ACK[i] == 0 || ulsch_harq->o_ACK[i] == 1, "harq_ack[%d] is %d, should be 1,2 or 4\n",i,ulsch_harq->o_ACK[i]);
......@@ -1731,7 +1812,9 @@ void fill_ulsch_harq_indication(PHY_VARS_eNB *eNB,LTE_UL_eNB_HARQ_t *ulsch_harq,
}
}
eNB->UL_INFO.harq_ind.number_of_harqs++;
//LOG_E(PHY,"eNB->UL_INFO.harq_ind.harq_indication_body.number_of_harqs:%d\n", eNB->UL_INFO.harq_ind.harq_indication_body.number_of_harqs);
eNB->UL_INFO.harq_ind.harq_indication_body.number_of_harqs++;
pthread_mutex_unlock(&eNB->UL_INFO_mutex);
}
......@@ -1744,17 +1827,26 @@ void fill_uci_harq_indication(PHY_VARS_eNB *eNB,
uint16_t tdd_multiplexing_mask) {
int UE_id=find_dlsch(uci->rnti,eNB,SEARCH_EXIST);
AssertFatal(UE_id>=0,"UE_id doesn't exist\n");
AssertFatal(UE_id>=0,"UE_id doesn't exist rnti:%x\n", uci->rnti);
pthread_mutex_lock(&eNB->UL_INFO_mutex);
nfapi_harq_indication_pdu_t *pdu = &eNB->UL_INFO.harq_ind.harq_pdu_list[eNB->UL_INFO.harq_ind.number_of_harqs];
nfapi_harq_indication_t *ind = &eNB->UL_INFO.harq_ind;
nfapi_harq_indication_body_t *body = &ind->harq_indication_body;
nfapi_harq_indication_pdu_t *pdu = &body->harq_pdu_list[eNB->UL_INFO.harq_ind.harq_indication_body.number_of_harqs];
ind->sfn_sf = frame<<4|subframe;
ind->header.message_id = NFAPI_HARQ_INDICATION;
body->tl.tag = NFAPI_HARQ_INDICATION_BODY_TAG;
pdu->instance_length = 0; // don't know what to do with this
// pdu->rx_ue_information.handle = handle;
pdu->rx_ue_information.tl.tag = NFAPI_RX_UE_INFORMATION_TAG;
pdu->rx_ue_information.rnti = uci->rnti;
// estimate UL_CQI for MAC (from antenna port 0 only)
pdu->ul_cqi_information.tl.tag = NFAPI_UL_CQI_INFORMATION_TAG;
int SNRtimes10 = dB_fixed_times10(uci->stat) - 200;//(10*eNB->measurements.n0_power_dB[0]);
if (SNRtimes10 < -100) LOG_I(PHY,"uci->stat %d \n",uci->stat);
......@@ -1766,6 +1858,7 @@ void fill_uci_harq_indication(PHY_VARS_eNB *eNB,
if (eNB->frame_parms.frame_type == FDD) {
if (uci->pucch_fmt == pucch_format1a) {
pdu->harq_indication_fdd_rel13.tl.tag = NFAPI_HARQ_INDICATION_FDD_REL13_TAG;
pdu->harq_indication_fdd_rel13.mode = 0;
pdu->harq_indication_fdd_rel13.number_of_ack_nack = 1;
......@@ -1784,6 +1877,7 @@ void fill_uci_harq_indication(PHY_VARS_eNB *eNB,
#endif
}
else if (uci->pucch_fmt == pucch_format1b) {
pdu->harq_indication_fdd_rel13.tl.tag = NFAPI_HARQ_INDICATION_FDD_REL13_TAG;
pdu->harq_indication_fdd_rel13.mode = 0;
pdu->harq_indication_fdd_rel13.number_of_ack_nack = 2;
AssertFatal(harq_ack[0] == 1 || harq_ack[0] == 2 || harq_ack[1] == 4, "harq_ack[0] is %d, should be 0,1 or 4\n",harq_ack[0]);
......@@ -1801,12 +1895,14 @@ void fill_uci_harq_indication(PHY_VARS_eNB *eNB,
AssertFatal(tdd_mapping_mode==0 || tdd_mapping_mode==1 || tdd_mapping_mode==2,
"Illegal tdd_mapping_mode %d\n",tdd_mapping_mode);
pdu->harq_indication_tdd_rel13.tl.tag = NFAPI_HARQ_INDICATION_TDD_REL13_TAG;
pdu->harq_indication_tdd_rel13.mode = tdd_mapping_mode;
switch (tdd_mapping_mode) {
case 0: // bundling
if (uci->pucch_fmt == pucch_format1a) {
pdu->harq_indication_tdd_rel13.tl.tag = NFAPI_HARQ_INDICATION_TDD_REL13_TAG;
pdu->harq_indication_tdd_rel13.number_of_ack_nack = 1;
AssertFatal(harq_ack[0] == 1 || harq_ack[0] == 2 || harq_ack[0] == 4, "harq_ack[0] is %d, should be 1,2 or 4\n",harq_ack[0]);
pdu->harq_indication_tdd_rel13.harq_data[0].bundling.value_0 = harq_ack[0];
......@@ -1817,6 +1913,7 @@ void fill_uci_harq_indication(PHY_VARS_eNB *eNB,
pdu->harq_indication_tdd_rel13.number_of_ack_nack = 2;
AssertFatal(harq_ack[0] == 1 || harq_ack[0] == 2 || harq_ack[1] == 4, "harq_ack[0] is %d, should be 0,1 or 4\n",harq_ack[0]);
AssertFatal(harq_ack[1] == 1 || harq_ack[1] == 2 || harq_ack[1] == 4, "harq_ack[1] is %d, should be 0,1 or 4\n",harq_ack[1]);
pdu->harq_indication_tdd_rel13.tl.tag = NFAPI_HARQ_INDICATION_TDD_REL13_TAG;
pdu->harq_indication_tdd_rel13.harq_data[0].bundling.value_0 = harq_ack[0];
pdu->harq_indication_tdd_rel13.harq_data[1].bundling.value_0 = harq_ack[1];
// release all DLSCH if needed
......@@ -1828,6 +1925,7 @@ void fill_uci_harq_indication(PHY_VARS_eNB *eNB,
AssertFatal(uci->pucch_fmt == pucch_format1b,"uci->pucch_format %d is not format1b\n",uci->pucch_fmt);
if (uci->num_pucch_resources == 1 && uci->pucch_fmt == pucch_format1a) {
pdu->harq_indication_tdd_rel13.tl.tag = NFAPI_HARQ_INDICATION_TDD_REL13_TAG;
pdu->harq_indication_tdd_rel13.number_of_ack_nack = 1;
AssertFatal(harq_ack[0] == 1 || harq_ack[0] == 2 || harq_ack[0] == 4, "harq_ack[0] is %d, should be 1,2 or 4\n",harq_ack[0]);
pdu->harq_indication_tdd_rel13.harq_data[0].multiplex.value_0 = harq_ack[0];
......@@ -1835,6 +1933,7 @@ void fill_uci_harq_indication(PHY_VARS_eNB *eNB,
if (harq_ack[0] == 1) release_harq(eNB,UE_id,0,frame,subframe,0xffff);
}
else if (uci->num_pucch_resources == 1 && uci->pucch_fmt == pucch_format1b) {
pdu->harq_indication_tdd_rel13.tl.tag = NFAPI_HARQ_INDICATION_TDD_REL13_TAG;
pdu->harq_indication_tdd_rel13.number_of_ack_nack = 2;
AssertFatal(harq_ack[0] == 1 || harq_ack[0] == 2 || harq_ack[1] == 4, "harq_ack[0] is %d, should be 0,1 or 4\n",harq_ack[0]);
AssertFatal(harq_ack[1] == 1 || harq_ack[1] == 2 || harq_ack[1] == 4, "harq_ack[1] is %d, should be 0,1 or 4\n",harq_ack[1]);
......@@ -1845,6 +1944,7 @@ void fill_uci_harq_indication(PHY_VARS_eNB *eNB,
if (harq_ack[1] == 1) release_harq(eNB,UE_id,1,frame,subframe,0xffff);
}
else { // num_pucch_resources (M) > 1
pdu->harq_indication_tdd_rel13.tl.tag = NFAPI_HARQ_INDICATION_TDD_REL13_TAG;
pdu->harq_indication_tdd_rel13.number_of_ack_nack = uci->num_pucch_resources;
pdu->harq_indication_tdd_rel13.harq_data[0].multiplex.value_0 = harq_ack[0];
......@@ -1857,6 +1957,7 @@ void fill_uci_harq_indication(PHY_VARS_eNB *eNB,
}
break;
case 2: // special bundling (SR collision)
pdu->harq_indication_tdd_rel13.tl.tag = NFAPI_HARQ_INDICATION_TDD_REL13_TAG;
pdu->harq_indication_tdd_rel13.number_of_ack_nack = 1;
int tdd_config5_sf2scheds=0;
if (eNB->frame_parms.tdd_config==5) tdd_config5_sf2scheds = getM(eNB,frame,subframe);
......@@ -1892,7 +1993,8 @@ void fill_uci_harq_indication(PHY_VARS_eNB *eNB,
} //TDD
eNB->UL_INFO.harq_ind.number_of_harqs++;
eNB->UL_INFO.harq_ind.harq_indication_body.number_of_harqs++;
LOG_E(PHY,"Incremented eNB->UL_INFO.harq_ind.harq_indication_body.number_of_harqs:%d\n", eNB->UL_INFO.harq_ind.harq_indication_body.number_of_harqs);
pthread_mutex_unlock(&eNB->UL_INFO_mutex);
}
......@@ -1901,14 +2003,23 @@ void fill_uci_harq_indication(PHY_VARS_eNB *eNB,
void fill_crc_indication(PHY_VARS_eNB *eNB,int UE_id,int frame,int subframe,uint8_t crc_flag) {
pthread_mutex_lock(&eNB->UL_INFO_mutex);
nfapi_crc_indication_pdu_t *pdu = &eNB->UL_INFO.crc_ind.crc_pdu_list[eNB->UL_INFO.crc_ind.number_of_crcs];
nfapi_crc_indication_pdu_t *pdu = &eNB->UL_INFO.crc_ind.crc_indication_body.crc_pdu_list[eNB->UL_INFO.crc_ind.crc_indication_body.number_of_crcs];
eNB->UL_INFO.crc_ind.sfn_sf = frame<<4 | subframe;
eNB->UL_INFO.crc_ind.header.message_id = NFAPI_CRC_INDICATION;
eNB->UL_INFO.crc_ind.crc_indication_body.tl.tag = NFAPI_CRC_INDICATION_BODY_TAG;
pdu->instance_length = 0; // don't know what to do with this
// pdu->rx_ue_information.handle = handle;
pdu->rx_ue_information.tl.tag = NFAPI_RX_UE_INFORMATION_TAG;
pdu->rx_ue_information.rnti = eNB->ulsch[UE_id]->rnti;
pdu->crc_indication_rel8.tl.tag = NFAPI_CRC_INDICATION_REL8_TAG;
pdu->crc_indication_rel8.crc_flag = crc_flag;
eNB->UL_INFO.crc_ind.number_of_crcs++;
eNB->UL_INFO.crc_ind.crc_indication_body.number_of_crcs++;
//LOG_D(PHY, "%s() rnti:%04x crcs:%d crc_flag:%d\n", __FUNCTION__, pdu->rx_ue_information.rnti, eNB->UL_INFO.crc_ind.crc_indication_body.number_of_crcs, crc_flag);
pthread_mutex_unlock(&eNB->UL_INFO_mutex);
}
......@@ -1931,30 +2042,39 @@ void phy_procedures_eNB_uespec_RX(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,const
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_RX_UESPEC, 1 );
LOG_D(PHY,"[eNB %d] Frame %d: Doing phy_procedures_eNB_uespec_RX(%d)\n",eNB->Mod_id,frame, subframe);
//LOG_D(PHY,"[eNB %d] Frame %d: Doing phy_procedures_eNB_uespec_RX(%d)\n",eNB->Mod_id,frame, subframe);
eNB->rb_mask_ul[0]=0;
eNB->rb_mask_ul[1]=0;
eNB->rb_mask_ul[2]=0;
eNB->rb_mask_ul[3]=0;
// Fix me here, these should be locked
eNB->UL_INFO.rx_ind.number_of_pdus = 0;
eNB->UL_INFO.crc_ind.number_of_crcs = 0;
// Call SRS first since all others depend on presence of SRS or lack thereof
srs_procedures(eNB,proc);
{
static int first_time=1;
if (first_time)
{
LOG_E(PHY,"%s() DJP - removed lte_eNB_I0_measurements because it core dumps - no idea why!!!\n\n\n\n\n", __FUNCTION__);
first_time=0;
}
}
eNB->first_run_I0_measurements = 0;
uci_procedures(eNB,proc);
pusch_procedures(eNB,proc);
if (nfapi_mode == 0 || nfapi_mode == 1) // If PNF or monolithic
{
pusch_procedures(eNB,proc);
}
#if 0
lte_eNB_I0_measurements(eNB,
subframe,
0,
eNB->first_run_I0_measurements);
#endif
int min_I0=1000,max_I0=0;
if ((frame==0) && (subframe==6)) {
......@@ -1967,13 +2087,8 @@ void phy_procedures_eNB_uespec_RX(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,const
LOG_I(PHY,"max_I0 %d, min_I0 %d\n",max_I0,min_I0);
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_RX_UESPEC, 0 );
stop_meas(&eNB->phy_proc_rx);
}
......@@ -75,7 +75,8 @@ fifo_dump_emos_UE emos_dump_UE;
extern double cpuf;
void Msg1_transmitted(module_id_t module_idP,uint8_t CC_id,frame_t frameP, uint8_t eNB_id);
void Msg3_transmitted(module_id_t module_idP,uint8_t CC_id,frame_t frameP, uint8_t eNB_id);
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)
extern uint32_t downlink_frequency[MAX_NUM_CCs][4];
......@@ -506,6 +507,7 @@ void ue_compute_srs_occasion(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id
{
int Mod_id = ue->Mod_id;
int CC_id = ue->CC_id;
// Panos: Substitute call to ue_get_SR() with the filled ue_SR_config->SR_payload (0, or 1).
SR_payload = ue_get_SR(Mod_id,
CC_id,
frame_tx,
......@@ -1486,6 +1488,7 @@ void ue_prach_procedures(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uin
}
if (ue->mac_enabled==1){
// Panos: Substitute with fill_Tx_indication(ue->Mod_id, ue->CC_id, frame_tx, eNB_id, UE_MAC_Tx_IND_Msg1_TYPE)
Msg1_transmitted(ue->Mod_id,
ue->CC_id,
frame_tx,
......@@ -1780,6 +1783,7 @@ void ue_ulsch_uespec_procedures(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB
if (ue->ulsch[eNB_id]->harq_processes[harq_pid]->round==0) {
//if (ue->ulsch[eNB_id]->harq_processes[harq_pid]->calibration_flag == 0) {
access_mode=SCHEDULED_ACCESS;
ue_get_sdu(Mod_id,
CC_id,
frame_tx,
......@@ -2765,6 +2769,7 @@ void ue_pbch_procedures(uint8_t eNB_id,PHY_VARS_UE *ue,UE_rxtx_proc_t *proc, uin
ue->pbch_vars[eNB_id]->pdu_errors_conseq++;
ue->pbch_vars[eNB_id]->pdu_errors++;
// Panos: Substitute call to rrc_out_of_sync_ind() with fill_bch_incication(sync=0).
if (ue->mac_enabled == 1) rrc_out_of_sync_ind(ue->Mod_id,frame_rx,eNB_id);
else AssertFatal(ue->pbch_vars[eNB_id]->pdu_errors_conseq<100,
"More that 100 consecutive PBCH errors! Exiting!\n");
......@@ -2785,6 +2790,55 @@ void ue_pbch_procedures(uint8_t eNB_id,PHY_VARS_UE *ue,UE_rxtx_proc_t *proc, uin
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_PBCH_PROCEDURES, VCD_FUNCTION_OUT);
}
// Panos: New function supporting the MAC interface
void fill_bch_indication(module_id_t module_idP,
frame_t frameP,
unsigned char eNB_index,
uint8_t first_sync,
uint8_t sync)
{
}
// Panos: New function supporting the MAC interface
void fill_dlsch_indication(module_id_t module_idP,
uint8_t CC_id,
frame_t frameP,
sub_frame_t subframeP,
uint8_t* sdu,
uint16_t sdu_len,
uint8_t eNB_index)
{
}
// Panos: New function supporting the MAC interface
void fill_dlsch_rar_indication(module_id_t module_idP,
int CC_id,
frame_t frameP,
rnti_t ra_rnti,
uint8_t* dlsch_buffer,
rnti_t* t_crnti,
uint8_t preamble_index,
uint8_t* selected_rar_buffer)
{
}
// PANOS: New function supporting the MAC interface
void fill_Tx_indication(module_id_t module_idP,uint8_t CC_id,frame_t frameP, uint8_t eNB_id, uint8_t Tx_ind_type)
{
switch (Tx_ind_type)
{
case UE_MAC_Tx_IND_Msg1_TYPE:
break;
case UE_MAC_Tx_IND_Msg3_TYPE:
break;
}
}
int ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t abstraction_flag)
{
......@@ -3436,6 +3490,7 @@ void process_rar(PHY_VARS_UE *ue, UE_rxtx_proc_t *proc, int eNB_id, runmode_t mo
subframe_rx,
ue->prach_resources[eNB_id]->ra_PreambleIndex);
// Panos: Substitute call to ue_process_rar() with call to fill_dlsch_rar_indication()
timing_advance = ue_process_rar(ue->Mod_id,
ue->CC_id,
frame_rx,
......@@ -3766,6 +3821,7 @@ void ue_dlsch_procedures(PHY_VARS_UE *ue,
switch (pdsch) {
case PDSCH:
// Panos: Substitute call to ue_send_sdu() with call to fill_dlsch_indication()
ue_send_sdu(ue->Mod_id,
CC_id,
frame_rx,
......@@ -3775,6 +3831,7 @@ void ue_dlsch_procedures(PHY_VARS_UE *ue,
eNB_id);
break;
case SI_PDSCH:
// Panos: Substitute call with call to fill_dlsch_indication()
ue_decode_si(ue->Mod_id,
CC_id,
frame_rx,
......@@ -3783,7 +3840,8 @@ void ue_dlsch_procedures(PHY_VARS_UE *ue,
ue->dlsch_SI[eNB_id]->harq_processes[0]->TBS>>3);
break;
case P_PDSCH:
ue_decode_p(ue->Mod_id,
// Panos: Substitute call with call to fill_dlsch_indication()
ue_decode_p(ue->Mod_id,
CC_id,
frame_rx,
eNB_id,
......@@ -3791,6 +3849,7 @@ void ue_dlsch_procedures(PHY_VARS_UE *ue,
ue->dlsch_SI[eNB_id]->harq_processes[0]->TBS>>3);
break;
case RA_PDSCH:
// Panos: Substitute with call to fill_dlsch_rar_indication()
process_rar(ue,proc,eNB_id,mode,abstraction_flag);
break;
case PDSCH1:
......
......@@ -74,9 +74,12 @@ void feptx0(RU_t *ru,int slot) {
((fp->Ncp==1) ? 6 : 7);
int subframe = ru->proc.subframe_tx;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM+slot , 1 );
slot_offset = subframe*fp->samples_per_tti + (slot*(fp->samples_per_tti>>1));
// LOG_D(HW,"Frame %d: Generating slot %d\n",frame,next_slot);
//LOG_D(PHY,"SFN/SF:RU:TX:%d/%d Generating slot %d\n",ru->proc.frame_tx, ru->proc.subframe_tx,slot);
for (aa=0; aa<ru->nb_tx; aa++) {
if (fp->Ncp == EXTENDED) PHY_ofdm_mod(&ru->common.txdataF_BF[aa][slot*slot_sizeF],
......@@ -132,6 +135,7 @@ void feptx0(RU_t *ru,int slot) {
}
}
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM+slot , 0);
}
static void *feptx_thread(void *param) {
......@@ -302,11 +306,11 @@ void feptx_ofdm(RU_t *ru) {
}
txdata = (int16_t*)&ru->common.txdata[aa][0];
for (j=0; i<(len<<1); i++,j++) {
txdata[j++] = ((int16_t*)dummy_tx_b)[i];
txdata[j++] = ((int16_t*)dummy_tx_b)[i];
}
}
else {
LOG_D(PHY,"feptx_ofdm: Writing to position %d\n",slot_offset);
//LOG_D(PHY,"feptx_ofdm: Writing to position %d\n",slot_offset);
tx_offset = (int)slot_offset;
txdata = (int16_t*)&ru->common.txdata[aa][tx_offset];
......@@ -325,9 +329,9 @@ void feptx_ofdm(RU_t *ru) {
*/
if ((fp->frame_type == TDD) &&
((fp->tdd_config==0) ||
(fp->tdd_config==1) ||
(fp->tdd_config==2) ||
(fp->tdd_config==6)) &&
(fp->tdd_config==1) ||
(fp->tdd_config==2) ||
(fp->tdd_config==6)) &&
((subframe==0) || (subframe==5))) {
// turn on tx switch N_TA_offset before
//LOG_D(HW,"subframe %d, time to switch to tx (N_TA_offset %d, slot_offset %d) \n",subframe,ru->N_TA_offset,slot_offset);
......@@ -363,10 +367,24 @@ void feptx_prec(RU_t *ru) {
eNB = eNB_list[0];
fp = &eNB->frame_parms;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_PREC , 1);
//LOG_D(PHY, "%s() subframe:%d\n", __FUNCTION__, subframe);
if (0) LOG_E(PHY,"%s() run->nb_tx:%u subframe:%u fp->symbols_per_tti:%u fp->ofdm_symbol_size:%u symbols:(%d, %d), (%d,%d)\n",
__FUNCTION__, ru->nb_tx, subframe, fp->symbols_per_tti, fp->ofdm_symbol_size,
((short*)&eNB->common_vars.txdataF[0][1])[0],
((short*)&eNB->common_vars.txdataF[0][1])[1],
((short*)&eNB->common_vars.txdataF[0][2])[0],
((short*)&eNB->common_vars.txdataF[0][2])[1]
);
for (aa=0;aa<ru->nb_tx;aa++)
memcpy((void*)ru->common.txdataF_BF[aa],
(void*)&eNB->common_vars.txdataF[aa][subframe*fp->symbols_per_tti*fp->ofdm_symbol_size],
fp->symbols_per_tti*fp->ofdm_symbol_size*sizeof(int32_t));
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_PREC , 0);
}
else {
for (i=0;i<ru->num_eNB;i++) {
......@@ -385,9 +403,11 @@ void feptx_prec(RU_t *ru) {
aa);
}
}
#if 0
LOG_D(PHY,"feptx_prec: frame %d, subframe %d: txp (freq) %d dB\n",
ru->proc.frame_tx,subframe,
dB_fixed(signal_energy_nodc(ru->common.txdataF_BF[0],2*fp->symbols_per_tti*fp->ofdm_symbol_size)));
#endif
}
}
}
......@@ -400,6 +420,8 @@ void fep0(RU_t *ru,int slot) {
// printf("fep0: slot %d\n",slot);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPRX+slot, 1);
remove_7_5_kHz(ru,(slot&1)+(proc->subframe_rx<<1));
for (l=0; l<fp->symbols_per_tti/2; l++) {
slot_fep_ul(ru,
......@@ -408,6 +430,7 @@ void fep0(RU_t *ru,int slot) {
0
);
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPRX+slot, 0);
}
......@@ -588,4 +611,3 @@ void do_prach_ru(RU_t *ru) {
}
}
......@@ -37,6 +37,12 @@
#else
#include "RRC/LITE/MESSAGES/SystemInformationBlockType2.h"
#endif
#include "SL-OffsetIndicator-r12.h"
#include "SubframeBitmapSL-r12.h"
#include "SL-CP-Len-r12.h"
#include "SL-PeriodComm-r12.h"
#include "SL-DiscResourcePool-r12.h"
//-------------------------------------------------------------------------------------------//
// Messages for RRC logging
......@@ -166,6 +172,56 @@ typedef struct RrcConfigurationReq_s {
long ue_TimersAndConstants_n310[MAX_NUM_CCs];
long ue_TimersAndConstants_n311[MAX_NUM_CCs];
long ue_TransmissionMode[MAX_NUM_CCs];
//TTN - for D2D
//SIB18
e_SL_CP_Len_r12 rxPool_sc_CP_Len[MAX_NUM_CCs];
e_SL_PeriodComm_r12 rxPool_sc_Period[MAX_NUM_CCs];
e_SL_CP_Len_r12 rxPool_data_CP_Len[MAX_NUM_CCs];
long rxPool_ResourceConfig_prb_Num[MAX_NUM_CCs];
long rxPool_ResourceConfig_prb_Start[MAX_NUM_CCs];
long rxPool_ResourceConfig_prb_End[MAX_NUM_CCs];
SL_OffsetIndicator_r12_PR rxPool_ResourceConfig_offsetIndicator_present[MAX_NUM_CCs];
long rxPool_ResourceConfig_offsetIndicator_choice[MAX_NUM_CCs];
SubframeBitmapSL_r12_PR rxPool_ResourceConfig_subframeBitmap_present[MAX_NUM_CCs];
char* rxPool_ResourceConfig_subframeBitmap_choice_bs_buf[MAX_NUM_CCs];
long rxPool_ResourceConfig_subframeBitmap_choice_bs_size[MAX_NUM_CCs];
long rxPool_ResourceConfig_subframeBitmap_choice_bs_bits_unused[MAX_NUM_CCs];
//SIB19
//for discRxPool
SL_CP_Len_r12_t discRxPool_cp_Len[MAX_NUM_CCs];
e_SL_DiscResourcePool_r12__discPeriod_r12 discRxPool_discPeriod[MAX_NUM_CCs];
long discRxPool_numRetx[MAX_NUM_CCs];
long discRxPool_numRepetition[MAX_NUM_CCs];
long discRxPool_ResourceConfig_prb_Num[MAX_NUM_CCs];
long discRxPool_ResourceConfig_prb_Start[MAX_NUM_CCs];
long discRxPool_ResourceConfig_prb_End[MAX_NUM_CCs];
SL_OffsetIndicator_r12_PR discRxPool_ResourceConfig_offsetIndicator_present[MAX_NUM_CCs];
long discRxPool_ResourceConfig_offsetIndicator_choice[MAX_NUM_CCs];
SubframeBitmapSL_r12_PR discRxPool_ResourceConfig_subframeBitmap_present[MAX_NUM_CCs];
char* discRxPool_ResourceConfig_subframeBitmap_choice_bs_buf[MAX_NUM_CCs];
long discRxPool_ResourceConfig_subframeBitmap_choice_bs_size[MAX_NUM_CCs];
long discRxPool_ResourceConfig_subframeBitmap_choice_bs_bits_unused[MAX_NUM_CCs];
//for discRxPoolPS
SL_CP_Len_r12_t discRxPoolPS_cp_Len[MAX_NUM_CCs];
e_SL_DiscResourcePool_r12__discPeriod_r12 discRxPoolPS_discPeriod[MAX_NUM_CCs];
long discRxPoolPS_numRetx[MAX_NUM_CCs];
long discRxPoolPS_numRepetition[MAX_NUM_CCs];
long discRxPoolPS_ResourceConfig_prb_Num[MAX_NUM_CCs];
long discRxPoolPS_ResourceConfig_prb_Start[MAX_NUM_CCs];
long discRxPoolPS_ResourceConfig_prb_End[MAX_NUM_CCs];
SL_OffsetIndicator_r12_PR discRxPoolPS_ResourceConfig_offsetIndicator_present[MAX_NUM_CCs];
long discRxPoolPS_ResourceConfig_offsetIndicator_choice[MAX_NUM_CCs];
SubframeBitmapSL_r12_PR discRxPoolPS_ResourceConfig_subframeBitmap_present[MAX_NUM_CCs];
char* discRxPoolPS_ResourceConfig_subframeBitmap_choice_bs_buf[MAX_NUM_CCs];
long discRxPoolPS_ResourceConfig_subframeBitmap_choice_bs_size[MAX_NUM_CCs];
long discRxPoolPS_ResourceConfig_subframeBitmap_choice_bs_bits_unused[MAX_NUM_CCs];
} RrcConfigurationReq;
// UE: NAS -> RRC messages
......
......@@ -304,10 +304,14 @@ void *eNB_app_task(void *args_p)
itti_mark_task_ready (TASK_ENB_APP);
LOG_I(PHY, "%s() Task ready initialise structures\n", __FUNCTION__);
RCconfig_L1();
RCconfig_macrlc();
LOG_I(PHY, "%s() RC.nb_L1_inst:%d\n", __FUNCTION__, RC.nb_L1_inst);
if (RC.nb_L1_inst>0) AssertFatal(l1_north_init_eNB()==0,"could not initialize L1 north interface\n");
# if defined(ENABLE_ITTI)
......@@ -330,9 +334,11 @@ void *eNB_app_task(void *args_p)
LOG_I(ENB_APP,"Allocating eNB_RRC_INST for %d instances\n",RC.nb_inst);
RC.rrc = (eNB_RRC_INST **)malloc(RC.nb_inst*sizeof(eNB_RRC_INST *));
LOG_I(PHY, "%s() RC.nb_inst:%d RC.rrc:%p\n", __FUNCTION__, RC.nb_inst, RC.rrc);
for (enb_id = enb_id_start; (enb_id < enb_id_end) ; enb_id++) {
RC.rrc[enb_id] = (eNB_RRC_INST*)malloc(sizeof(eNB_RRC_INST));
LOG_I(PHY, "%s() Creating RRC instance RC.rrc[%d]:%p (%d of %d)\n", __FUNCTION__, enb_id, RC.rrc[enb_id], enb_id+1, enb_id_end);
memset((void *)RC.rrc[enb_id],0,sizeof(eNB_RRC_INST));
configure_rrc(enb_id);
}
......
......@@ -50,15 +50,16 @@
#include "sctp_default_values.h"
#include "SystemInformationBlockType2.h"
#include "LAYER2/MAC/extern.h"
#include "LAYER2/MAC/proto.h"
#include "PHY/extern.h"
#include "targets/ARCH/ETHERNET/USERSPACE/LIB/ethernet_lib.h"
#include "nfapi_vnf.h"
#include "nfapi_pnf.h"
#include "enb_paramdef.h"
#include "common/config/config_userapi.h"
int RCconfig_RRC(MessageDef *msg_p, uint32_t i, eNB_RRC_INST *rrc);
int RCconfig_S1(MessageDef *msg_p, uint32_t i);
extern uint16_t sf_ahead;
static int enb_check_band_frequencies(char* lib_config_file_name_pP,
int ind,
......@@ -102,11 +103,6 @@ static int enb_check_band_frequencies(char* lib_config_file_name_pP,
}
/* --------------------------------------------------------*/
/* from here function to use configuration module */
void RCconfig_RU(void) {
......@@ -124,7 +120,6 @@ void RCconfig_RU(void) {
if ( RUParamList.numelt > 0) {
RC.ru = (RU_t**)malloc(RC.nb_RU*sizeof(RU_t*));
......@@ -139,6 +134,8 @@ void RCconfig_RU(void) {
memset((void*)RC.ru[j],0,sizeof(RU_t));
RC.ru[j]->idx = j;
printf("Creating RC.ru[%d]:%p\n", j, RC.ru[j]);
RC.ru[j]->if_timing = synch_to_ext_device;
if (RC.nb_L1_inst >0)
RC.ru[j]->num_eNB = RUParamList.paramarray[j][RU_ENB_LIST_IDX].numelt;
......@@ -237,48 +234,126 @@ void RCconfig_RU(void) {
}
void RCconfig_L1() {
void UE_config_stub_pnf(void) {
int j;
paramdef_t L1_Params[] = L1PARAMS_DESC;
paramlist_def_t L1_ParamList = {CONFIG_STRING_L1_LIST,NULL,0};
config_getlist( &L1_ParamList,L1_Params,sizeof(L1_Params)/sizeof(paramdef_t), NULL);
if (L1_ParamList.numelt > 0) {
for (j=0; j<L1_ParamList.numelt; j++){
//nb_L1_CC = *(L1_ParamList.paramarray[j][L1_CC_IDX].uptr); // Number of component carriers is of no use for the
// phy_stub mode UE pnf. Maybe we can completely skip it.
if (strcmp(*(L1_ParamList.paramarray[j][L1_TRANSPORT_N_PREFERENCE_IDX].strptr), "local_mac") == 0) {
sf_ahead = 4; // Need 4 subframe gap between RX and TX
}
// Panos: Right now that we have only one UE (thread) it is ok to put the eth_params in the UE_mac_inst.
// Later I think we have to change that to attribute eth_params to a global element for all the UEs.
else if (strcmp(*(L1_ParamList.paramarray[j][L1_TRANSPORT_N_PREFERENCE_IDX].strptr), "nfapi") == 0) {
stub_eth_params.local_if_name = strdup(*(L1_ParamList.paramarray[j][L1_LOCAL_N_IF_NAME_IDX].strptr));
stub_eth_params.my_addr = strdup(*(L1_ParamList.paramarray[j][L1_LOCAL_N_ADDRESS_IDX].strptr));
stub_eth_params.remote_addr = strdup(*(L1_ParamList.paramarray[j][L1_REMOTE_N_ADDRESS_IDX].strptr));
stub_eth_params.my_portc = *(L1_ParamList.paramarray[j][L1_LOCAL_N_PORTC_IDX].iptr);
stub_eth_params.remote_portc = *(L1_ParamList.paramarray[j][L1_REMOTE_N_PORTC_IDX].iptr);
stub_eth_params.my_portd = *(L1_ParamList.paramarray[j][L1_LOCAL_N_PORTD_IDX].iptr);
stub_eth_params.remote_portd = *(L1_ParamList.paramarray[j][L1_REMOTE_N_PORTD_IDX].iptr);
stub_eth_params.transp_preference = ETH_UDP_MODE;
/*UE_mac_inst[0].eth_params_n.local_if_name = strdup(*(L1_ParamList.paramarray[j][L1_LOCAL_N_IF_NAME_IDX].strptr));
UE_mac_inst[0].eth_params_n.my_addr = strdup(*(L1_ParamList.paramarray[j][L1_LOCAL_N_ADDRESS_IDX].strptr));
UE_mac_inst[0].eth_params_n.remote_addr = strdup(*(L1_ParamList.paramarray[j][L1_REMOTE_N_ADDRESS_IDX].strptr));
UE_mac_inst[0].eth_params_n.my_portc = *(L1_ParamList.paramarray[j][L1_LOCAL_N_PORTC_IDX].iptr);
UE_mac_inst[0].eth_params_n.remote_portc = *(L1_ParamList.paramarray[j][L1_REMOTE_N_PORTC_IDX].iptr);
UE_mac_inst[0].eth_params_n.my_portd = *(L1_ParamList.paramarray[j][L1_LOCAL_N_PORTD_IDX].iptr);
UE_mac_inst[0].eth_params_n.remote_portd = *(L1_ParamList.paramarray[j][L1_REMOTE_N_PORTD_IDX].iptr);
UE_mac_inst[0].eth_params_n.transp_preference = ETH_UDP_MODE;*/
sf_ahead = 4; // Cannot cope with 4 subframes betweem RX and TX - set it to 2
//configure_nfapi_pnf(UE_mac_inst[0].eth_params_n.remote_addr, UE_mac_inst[0].eth_params_n.remote_portc, UE_mac_inst[0].eth_params_n.my_addr, UE_mac_inst[0].eth_params_n.my_portd, UE_mac_inst[0].eth_params_n.remote_portd);
configure_nfapi_pnf(stub_eth_params.remote_addr, stub_eth_params.remote_portc, stub_eth_params.my_addr, stub_eth_params.my_portd, stub_eth_params.remote_portd);
}
else { // other midhaul
}
}
}
else {
/*LOG_I(PHY,"No " CONFIG_STRING_L1_LIST " configuration found");
// DJP need to create some structures for VNF
j = 0;
RC.nb_L1_CC = malloc((1+RC.nb_L1_inst)*sizeof(int)); // DJP - 1 lot then???
RC.nb_L1_CC[j]=1; // DJP - hmmm
if (RC.eNB[j] == NULL) {
RC.eNB[j] = (PHY_VARS_eNB **)malloc((1+MAX_NUM_CCs)*sizeof(PHY_VARS_eNB**));
LOG_I(PHY,"RC.eNB[%d] = %p\n",j,RC.eNB[j]);
memset(RC.eNB[j],0,(1+MAX_NUM_CCs)*sizeof(PHY_VARS_eNB***));
}
for (i=0;i<RC.nb_L1_CC[j];i++) {
if (RC.eNB[j][i] == NULL) {
RC.eNB[j][i] = (PHY_VARS_eNB *)malloc(sizeof(PHY_VARS_eNB));
memset((void*)RC.eNB[j][i],0,sizeof(PHY_VARS_eNB));
LOG_I(PHY,"RC.eNB[%d][%d] = %p\n",j,i,RC.eNB[j][i]);
RC.eNB[j][i]->Mod_id = j;
RC.eNB[j][i]->CC_id = i;
}
}*/
}
}
void RCconfig_L1(void) {
int i,j;
paramdef_t L1_Params[] = L1PARAMS_DESC;
paramlist_def_t L1_ParamList = {CONFIG_STRING_L1_LIST,NULL,0};
if (RC.eNB == NULL) {
RC.eNB = (PHY_VARS_eNB ***)malloc((1+MAX_NUM_CCs)*sizeof(PHY_VARS_eNB**));
LOG_I(PHY,"RC.eNB = %p\n",RC.eNB);
memset(RC.eNB,0,(1+NUMBER_OF_eNB_MAX)*sizeof(PHY_VARS_eNB***));
RC.nb_L1_CC = malloc((1+RC.nb_L1_inst)*sizeof(int));
}
config_getlist( &L1_ParamList,L1_Params,sizeof(L1_Params)/sizeof(paramdef_t), NULL);
if (L1_ParamList.numelt > 0) {
if (RC.eNB == NULL) {
RC.eNB = (PHY_VARS_eNB ***)malloc((1+NUMBER_OF_eNB_MAX)*sizeof(PHY_VARS_eNB***));
LOG_I(PHY,"RC.eNB = %p\n",RC.eNB);
memset(RC.eNB,0,(1+NUMBER_OF_eNB_MAX)*sizeof(PHY_VARS_eNB***));
RC.nb_L1_CC = malloc((1+RC.nb_L1_inst)*sizeof(int));
}
for (j = 0; j < RC.nb_L1_inst; j++) {
RC.nb_L1_CC[j] = *(L1_ParamList.paramarray[j][L1_CC_IDX].uptr);
if (RC.eNB[j] == NULL) {
RC.eNB[j] = (PHY_VARS_eNB **)malloc((1+MAX_NUM_CCs)*sizeof(PHY_VARS_eNB**));
LOG_I(PHY,"RC.eNB[%d] = %p\n",j,RC.eNB[j]);
memset(RC.eNB[j],0,(1+MAX_NUM_CCs)*sizeof(PHY_VARS_eNB***));
}
for (i=0;i<RC.nb_L1_CC[j];i++) {
if (RC.eNB[j][i] == NULL) {
RC.eNB[j][i] = (PHY_VARS_eNB *)malloc(sizeof(PHY_VARS_eNB));
memset((void*)RC.eNB[j][i],0,sizeof(PHY_VARS_eNB));
LOG_I(PHY,"RC.eNB[%d][%d] = %p\n",j,i,RC.eNB[j][i]);
RC.eNB[j][i]->Mod_id = j;
RC.eNB[j][i]->CC_id = i;
}
if (RC.eNB[j][i] == NULL) {
RC.eNB[j][i] = (PHY_VARS_eNB *)malloc(sizeof(PHY_VARS_eNB));
memset((void*)RC.eNB[j][i],0,sizeof(PHY_VARS_eNB));
LOG_I(PHY,"RC.eNB[%d][%d] = %p\n",j,i,RC.eNB[j][i]);
RC.eNB[j][i]->Mod_id = j;
RC.eNB[j][i]->CC_id = i;
}
}
if (strcmp(*(L1_ParamList.paramarray[j][L1_TRANSPORT_N_PREFERENCE_IDX].strptr), "local_mac") == 0) {
sf_ahead = 4; // Need 4 subframe gap between RX and TX
}
else if (strcmp(*(L1_ParamList.paramarray[j][L1_TRANSPORT_N_PREFERENCE_IDX].strptr), "nfapi") == 0) {
RC.eNB[j][0]->eth_params_n.local_if_name = strdup(*(L1_ParamList.paramarray[j][L1_LOCAL_N_IF_NAME_IDX].strptr));
RC.eNB[j][0]->eth_params_n.local_if_name = strdup(*(L1_ParamList.paramarray[j][L1_LOCAL_N_IF_NAME_IDX].strptr));
RC.eNB[j][0]->eth_params_n.my_addr = strdup(*(L1_ParamList.paramarray[j][L1_LOCAL_N_ADDRESS_IDX].strptr));
RC.eNB[j][0]->eth_params_n.remote_addr = strdup(*(L1_ParamList.paramarray[j][L1_REMOTE_N_ADDRESS_IDX].strptr));
RC.eNB[j][0]->eth_params_n.my_portc = *(L1_ParamList.paramarray[j][L1_LOCAL_N_PORTC_IDX].iptr);
......@@ -286,8 +361,25 @@ void RCconfig_L1() {
RC.eNB[j][0]->eth_params_n.my_portd = *(L1_ParamList.paramarray[j][L1_LOCAL_N_PORTD_IDX].iptr);
RC.eNB[j][0]->eth_params_n.remote_portd = *(L1_ParamList.paramarray[j][L1_REMOTE_N_PORTD_IDX].iptr);
RC.eNB[j][0]->eth_params_n.transp_preference = ETH_UDP_MODE;
sf_ahead = 2; // Cannot cope with 4 subframes betweem RX and TX - set it to 2
RC.nb_macrlc_inst = 1; // This is used by mac_top_init_eNB()
// This is used by init_eNB_afterRU()
RC.nb_CC = (int *)malloc((1+RC.nb_inst)*sizeof(int));
RC.nb_CC[0]=1;
RC.nb_inst =1; // DJP - feptx_prec uses num_eNB but phy_init_RU uses nb_inst
LOG_I(PHY,"%s() NFAPI PNF mode - RC.nb_inst=1 this is because phy_init_RU() uses that to index and not RC.num_eNB - why the 2 similar variables?\n", __FUNCTION__);
LOG_I(PHY,"%s() NFAPI PNF mode - RC.nb_CC[0]=%d for init_eNB_afterRU()\n", __FUNCTION__, RC.nb_CC[0]);
LOG_I(PHY,"%s() NFAPI PNF mode - RC.nb_macrlc_inst:%d because used by mac_top_init_eNB()\n", __FUNCTION__, RC.nb_macrlc_inst);
mac_top_init_eNB();
configure_nfapi_pnf(RC.eNB[j][0]->eth_params_n.remote_addr, RC.eNB[j][0]->eth_params_n.remote_portc, RC.eNB[j][0]->eth_params_n.my_addr, RC.eNB[j][0]->eth_params_n.my_portd, RC.eNB[j][0]->eth_params_n .remote_portd);
}
else { // other midhaul
}
}// j=0..num_inst
......@@ -295,6 +387,30 @@ void RCconfig_L1() {
l1_north_init_eNB();
} else {
LOG_I(PHY,"No " CONFIG_STRING_L1_LIST " configuration found");
// DJP need to create some structures for VNF
j = 0;
RC.nb_L1_CC = malloc((1+RC.nb_L1_inst)*sizeof(int)); // DJP - 1 lot then???
RC.nb_L1_CC[j]=1; // DJP - hmmm
if (RC.eNB[j] == NULL) {
RC.eNB[j] = (PHY_VARS_eNB **)malloc((1+MAX_NUM_CCs)*sizeof(PHY_VARS_eNB**));
LOG_I(PHY,"RC.eNB[%d] = %p\n",j,RC.eNB[j]);
memset(RC.eNB[j],0,(1+MAX_NUM_CCs)*sizeof(PHY_VARS_eNB***));
}
for (i=0;i<RC.nb_L1_CC[j];i++) {
if (RC.eNB[j][i] == NULL) {
RC.eNB[j][i] = (PHY_VARS_eNB *)malloc(sizeof(PHY_VARS_eNB));
memset((void*)RC.eNB[j][i],0,sizeof(PHY_VARS_eNB));
LOG_I(PHY,"RC.eNB[%d][%d] = %p\n",j,i,RC.eNB[j][i]);
RC.eNB[j][i]->Mod_id = j;
RC.eNB[j][i]->CC_id = i;
}
}
}
}
......@@ -307,7 +423,6 @@ void RCconfig_macrlc() {
config_getlist( &MacRLC_ParamList,MacRLC_Params,sizeof(MacRLC_Params)/sizeof(paramdef_t), NULL);
if ( MacRLC_ParamList.numelt > 0) {
RC.nb_macrlc_inst=MacRLC_ParamList.numelt;
......@@ -342,6 +457,12 @@ void RCconfig_macrlc() {
RC.mac[j]->eth_params_s.my_portd = *(MacRLC_ParamList.paramarray[j][MACRLC_LOCAL_S_PORTD_IDX].iptr);
RC.mac[j]->eth_params_s.remote_portd = *(MacRLC_ParamList.paramarray[j][MACRLC_REMOTE_S_PORTD_IDX].iptr);
RC.mac[j]->eth_params_s.transp_preference = ETH_UDP_MODE;
sf_ahead = 2; // Cannot cope with 4 subframes betweem RX and TX - set it to 2
printf("**************** vnf_port:%d\n", RC.mac[j]->eth_params_s.my_portc);
configure_nfapi_vnf(RC.mac[j]->eth_params_s.my_addr, RC.mac[j]->eth_params_s.my_portc);
printf("**************** RETURNED FROM configure_nfapi_vnf() vnf_port:%d\n", RC.mac[j]->eth_params_s.my_portc);
} else { // other midhaul
AssertFatal(1==0,"MACRLC %d: %s unknown southbound midhaul\n",j,*(MacRLC_ParamList.paramarray[j][MACRLC_TRANSPORT_S_PREFERENCE_IDX].strptr));
}
......@@ -424,7 +545,7 @@ int RCconfig_RRC(MessageDef *msg_p, uint32_t i, eNB_RRC_INST *rrc) {
int32_t rach_powerRampingStep = 0;
int32_t rach_preambleInitialReceivedTargetPower = 0;
int32_t rach_preambleTransMax = 0;
int32_t rach_raResponseWindowSize = 0;
int32_t rach_raResponseWindowSize = 10;
int32_t rach_macContentionResolutionTimer = 0;
int32_t rach_maxHARQ_Msg3Tx = 0;
int32_t pcch_defaultPagingCycle = 0;
......@@ -438,6 +559,52 @@ int RCconfig_RRC(MessageDef *msg_p, uint32_t i, eNB_RRC_INST *rrc) {
int32_t ue_TimersAndConstants_n311 = 0;
int32_t ue_TransmissionMode = 0;
//TTN - for D2D
//SIB18
const char* rxPool_sc_CP_Len = NULL;
const char* rxPool_sc_Period = NULL;
const char* rxPool_data_CP_Len = NULL;
libconfig_int rxPool_ResourceConfig_prb_Num = 0;
libconfig_int rxPool_ResourceConfig_prb_Start = 0;
libconfig_int rxPool_ResourceConfig_prb_End = 0;
const char* rxPool_ResourceConfig_offsetIndicator_present = NULL;
libconfig_int rxPool_ResourceConfig_offsetIndicator_choice = 0;
const char* rxPool_ResourceConfig_subframeBitmap_present = NULL;
const char* rxPool_ResourceConfig_subframeBitmap_choice_bs_buf = NULL;
libconfig_int rxPool_ResourceConfig_subframeBitmap_choice_bs_size = 0;
libconfig_int rxPool_ResourceConfig_subframeBitmap_choice_bs_bits_unused = 0;
//SIB19
//For discRxPool
const char* discRxPool_cp_Len = NULL;
const char* discRxPool_discPeriod = NULL;
libconfig_int discRxPool_numRetx = 0;
libconfig_int discRxPool_numRepetition = 0;
libconfig_int discRxPool_ResourceConfig_prb_Num = 0;
libconfig_int discRxPool_ResourceConfig_prb_Start = 0;
libconfig_int discRxPool_ResourceConfig_prb_End = 0;
const char* discRxPool_ResourceConfig_offsetIndicator_present = NULL;
libconfig_int discRxPool_ResourceConfig_offsetIndicator_choice = 0;
const char* discRxPool_ResourceConfig_subframeBitmap_present = NULL;
const char* discRxPool_ResourceConfig_subframeBitmap_choice_bs_buf = NULL;
libconfig_int discRxPool_ResourceConfig_subframeBitmap_choice_bs_size = 0;
libconfig_int discRxPool_ResourceConfig_subframeBitmap_choice_bs_bits_unused = 0;
//For discRxPoolPS
const char* discRxPoolPS_cp_Len = NULL;
const char* discRxPoolPS_discPeriod = NULL;
libconfig_int discRxPoolPS_numRetx = 0;
libconfig_int discRxPoolPS_numRepetition = 0;
libconfig_int discRxPoolPS_ResourceConfig_prb_Num = 0;
libconfig_int discRxPoolPS_ResourceConfig_prb_Start = 0;
libconfig_int discRxPoolPS_ResourceConfig_prb_End = 0;
const char* discRxPoolPS_ResourceConfig_offsetIndicator_present = NULL;
libconfig_int discRxPoolPS_ResourceConfig_offsetIndicator_choice = 0;
const char* discRxPoolPS_ResourceConfig_subframeBitmap_present = NULL;
const char* discRxPoolPS_ResourceConfig_subframeBitmap_choice_bs_buf = NULL;
libconfig_int discRxPoolPS_ResourceConfig_subframeBitmap_choice_bs_size = 0;
libconfig_int discRxPoolPS_ResourceConfig_subframeBitmap_choice_bs_bits_unused = 0;
int32_t srb1_timer_poll_retransmit = 0;
int32_t srb1_timer_reordering = 0;
......@@ -1717,6 +1884,267 @@ int RCconfig_RRC(MessageDef *msg_p, uint32_t i, eNB_RRC_INST *rrc) {
RC.config_file_name, i, ue_TransmissionMode);
break;
}
//TTN - for D2D
//SIB18
if (strcmp(rxPool_sc_CP_Len,"normal")==0) {
RRC_CONFIGURATION_REQ (msg_p).rxPool_sc_CP_Len[j] = SL_CP_Len_r12_normal;
} else if (strcmp(rxPool_sc_CP_Len,"extended")==0) {
RRC_CONFIGURATION_REQ (msg_p).rxPool_sc_CP_Len[j] = SL_CP_Len_r12_extended;
} else
AssertFatal (0,
"Failed to parse eNB configuration file %s, enb %d unknown value \"%s\" for rxPool_sc_CP_Len choice: normal,extended!\n",
RC.config_file_name, i, rxPool_sc_CP_Len);
if (strcmp(rxPool_sc_Period,"sf40")==0) {
RRC_CONFIGURATION_REQ (msg_p).rxPool_sc_Period[j] = SL_PeriodComm_r12_sf40;
} else if (strcmp(rxPool_sc_Period,"sf60")==0) {
RRC_CONFIGURATION_REQ (msg_p).rxPool_sc_Period[j] = SL_PeriodComm_r12_sf60;
} else if (strcmp(rxPool_sc_Period,"sf70")==0) {
RRC_CONFIGURATION_REQ (msg_p).rxPool_sc_Period[j] = SL_PeriodComm_r12_sf70;
} else if (strcmp(rxPool_sc_Period,"sf80")==0) {
RRC_CONFIGURATION_REQ (msg_p).rxPool_sc_Period[j] = SL_PeriodComm_r12_sf80;
} else if (strcmp(rxPool_sc_Period,"sf120")==0) {
RRC_CONFIGURATION_REQ (msg_p).rxPool_sc_Period[j] = SL_PeriodComm_r12_sf120;
} else if (strcmp(rxPool_sc_Period,"sf140")==0) {
RRC_CONFIGURATION_REQ (msg_p).rxPool_sc_Period[j] = SL_PeriodComm_r12_sf140;
} else if (strcmp(rxPool_sc_Period,"sf160")==0) {
RRC_CONFIGURATION_REQ (msg_p).rxPool_sc_Period[j] = SL_PeriodComm_r12_sf160;
} else if (strcmp(rxPool_sc_Period,"sf240")==0) {
RRC_CONFIGURATION_REQ (msg_p).rxPool_sc_Period[j] = SL_PeriodComm_r12_sf240;
} else if (strcmp(rxPool_sc_Period,"sf280")==0) {
RRC_CONFIGURATION_REQ (msg_p).rxPool_sc_Period[j] = SL_PeriodComm_r12_sf280;
} else if (strcmp(rxPool_sc_Period,"sf320")==0) {
RRC_CONFIGURATION_REQ (msg_p).rxPool_sc_Period[j] = SL_PeriodComm_r12_sf320;
} else if (strcmp(rxPool_sc_Period,"spare6")==0) {
RRC_CONFIGURATION_REQ (msg_p).rxPool_sc_Period[j] = SL_PeriodComm_r12_spare6;
} else if (strcmp(rxPool_sc_Period,"spare5")==0) {
RRC_CONFIGURATION_REQ (msg_p).rxPool_sc_Period[j] = SL_PeriodComm_r12_spare5;
} else if (strcmp(rxPool_sc_Period,"spare4")==0) {
RRC_CONFIGURATION_REQ (msg_p).rxPool_sc_Period[j] = SL_PeriodComm_r12_spare4;
} else if (strcmp(rxPool_sc_Period,"spare3")==0) {
RRC_CONFIGURATION_REQ (msg_p).rxPool_sc_Period[j] = SL_PeriodComm_r12_spare3;
} else if (strcmp(rxPool_sc_Period,"spare2")==0) {
RRC_CONFIGURATION_REQ (msg_p).rxPool_sc_Period[j] = SL_PeriodComm_r12_spare2;
} else if (strcmp(rxPool_sc_Period,"spare")==0) {
RRC_CONFIGURATION_REQ (msg_p).rxPool_sc_Period[j] = SL_PeriodComm_r12_spare;
} else
AssertFatal (0,
"Failed to parse eNB configuration file %s, enb %d unknown value \"%s\" for rxPool_sc_Period choice: sf40,sf60,sf70,sf80,sf120,sf140,sf160,sf240,sf280,sf320,spare6,spare5,spare4,spare3,spare2,spare!\n",
RC.config_file_name, i, rxPool_sc_Period);
if (strcmp(rxPool_data_CP_Len,"normal")==0) {
RRC_CONFIGURATION_REQ (msg_p).rxPool_data_CP_Len[j] = SL_CP_Len_r12_normal;
} else if (strcmp(rxPool_data_CP_Len,"extended")==0) {
RRC_CONFIGURATION_REQ (msg_p).rxPool_data_CP_Len[j] = SL_CP_Len_r12_extended;
} else
AssertFatal (0,
"Failed to parse eNB configuration file %s, enb %d unknown value \"%s\" for rxPool_data_CP_Len choice: normal,extended!\n",
RC.config_file_name, i, rxPool_data_CP_Len);
RRC_CONFIGURATION_REQ (msg_p).rxPool_ResourceConfig_prb_Num[j] = rxPool_ResourceConfig_prb_Num;
RRC_CONFIGURATION_REQ (msg_p).rxPool_ResourceConfig_prb_Start[j] = rxPool_ResourceConfig_prb_Start;
RRC_CONFIGURATION_REQ (msg_p).rxPool_ResourceConfig_prb_End[j] = rxPool_ResourceConfig_prb_End;
if (strcmp(rxPool_ResourceConfig_offsetIndicator_present,"prNothing")==0) {
RRC_CONFIGURATION_REQ (msg_p).rxPool_ResourceConfig_offsetIndicator_present[j] = SL_OffsetIndicator_r12_PR_NOTHING;
} else if (strcmp(rxPool_ResourceConfig_offsetIndicator_present,"prSmall")==0) {
RRC_CONFIGURATION_REQ (msg_p).rxPool_ResourceConfig_offsetIndicator_present[j] = SL_OffsetIndicator_r12_PR_small_r12;
} else if (strcmp(rxPool_ResourceConfig_offsetIndicator_present,"prLarge")==0) {
RRC_CONFIGURATION_REQ (msg_p).rxPool_ResourceConfig_offsetIndicator_present[j] = SL_OffsetIndicator_r12_PR_large_r12;
} else
AssertFatal (0,
"Failed to parse eNB configuration file %s, enb %d unknown value \"%s\" for rxPool_ResourceConfig_offsetIndicator_present choice: prNothing,prSmal,prLarge!\n",
RC.config_file_name, i, rxPool_ResourceConfig_offsetIndicator_present);
RRC_CONFIGURATION_REQ (msg_p).rxPool_ResourceConfig_offsetIndicator_choice[j] = rxPool_ResourceConfig_offsetIndicator_choice;
if (strcmp(rxPool_ResourceConfig_subframeBitmap_present,"prNothing")==0) {
RRC_CONFIGURATION_REQ (msg_p).rxPool_ResourceConfig_subframeBitmap_present[j] = SubframeBitmapSL_r12_PR_NOTHING;
} else if (strcmp(rxPool_ResourceConfig_subframeBitmap_present,"prBs4")==0) {
RRC_CONFIGURATION_REQ (msg_p).rxPool_ResourceConfig_subframeBitmap_present[j] = SubframeBitmapSL_r12_PR_bs4_r12;
} else if (strcmp(rxPool_ResourceConfig_subframeBitmap_present,"prBs8")==0) {
RRC_CONFIGURATION_REQ (msg_p).rxPool_ResourceConfig_subframeBitmap_present[j] = SubframeBitmapSL_r12_PR_bs8_r12;
} else if (strcmp(rxPool_ResourceConfig_subframeBitmap_present,"prBs12")==0) {
RRC_CONFIGURATION_REQ (msg_p).rxPool_ResourceConfig_subframeBitmap_present[j] = SubframeBitmapSL_r12_PR_bs12_r12;
} else if (strcmp(rxPool_ResourceConfig_subframeBitmap_present,"prBs16")==0) {
RRC_CONFIGURATION_REQ (msg_p).rxPool_ResourceConfig_subframeBitmap_present[j] = SubframeBitmapSL_r12_PR_bs16_r12;
} else if (strcmp(rxPool_ResourceConfig_subframeBitmap_present,"prBs30")==0) {
RRC_CONFIGURATION_REQ (msg_p).rxPool_ResourceConfig_subframeBitmap_present[j] = SubframeBitmapSL_r12_PR_bs30_r12;
} else if (strcmp(rxPool_ResourceConfig_subframeBitmap_present,"prBs40")==0) {
RRC_CONFIGURATION_REQ (msg_p).rxPool_ResourceConfig_subframeBitmap_present[j] = SubframeBitmapSL_r12_PR_bs40_r12;
} else if (strcmp(rxPool_ResourceConfig_subframeBitmap_present,"prBs42")==0) {
RRC_CONFIGURATION_REQ (msg_p).rxPool_ResourceConfig_subframeBitmap_present[j] = SubframeBitmapSL_r12_PR_bs42_r12;
} else
AssertFatal (0,
"Failed to parse eNB configuration file %s, enb %d unknown value \"%s\" for rxPool_ResourceConfig_subframeBitmap_present choice: prNothing,prBs4,prBs8,prBs12,prBs16,prBs30,prBs40,prBs42!\n",
RC.config_file_name, i, rxPool_ResourceConfig_subframeBitmap_present);
RRC_CONFIGURATION_REQ (msg_p).rxPool_ResourceConfig_subframeBitmap_choice_bs_buf[j] = rxPool_ResourceConfig_subframeBitmap_choice_bs_buf;
RRC_CONFIGURATION_REQ (msg_p).rxPool_ResourceConfig_subframeBitmap_choice_bs_size[j] = rxPool_ResourceConfig_subframeBitmap_choice_bs_size;
RRC_CONFIGURATION_REQ (msg_p).rxPool_ResourceConfig_subframeBitmap_choice_bs_bits_unused[j] = rxPool_ResourceConfig_subframeBitmap_choice_bs_bits_unused;
//SIB19 - for discRxPool
if (strcmp(discRxPool_cp_Len,"normal")==0) {
RRC_CONFIGURATION_REQ (msg_p).discRxPool_cp_Len[j] = SL_CP_Len_r12_normal;
} else if (strcmp(discRxPool_cp_Len,"extended")==0) {
RRC_CONFIGURATION_REQ (msg_p).discRxPool_cp_Len[j] = SL_CP_Len_r12_extended;
} else
AssertFatal (0,
"Failed to parse eNB configuration file %s, enb %d unknown value \"%s\" for discRxPool_cp_Len choice: normal,extended!\n",
RC.config_file_name, i, discRxPool_cp_Len);
if (strcmp(discRxPool_discPeriod,"rf32")==0) {
RRC_CONFIGURATION_REQ (msg_p).discRxPool_discPeriod[j] = SL_DiscResourcePool_r12__discPeriod_r12_rf32;
} else if (strcmp(discRxPool_discPeriod,"rf64")==0) {
RRC_CONFIGURATION_REQ (msg_p).discRxPool_discPeriod[j] = SL_DiscResourcePool_r12__discPeriod_r12_rf64;
} else if (strcmp(discRxPool_discPeriod,"rf128")==0) {
RRC_CONFIGURATION_REQ (msg_p).discRxPool_discPeriod[j] = SL_DiscResourcePool_r12__discPeriod_r12_rf128;
} else if (strcmp(discRxPool_discPeriod,"rf256")==0) {
RRC_CONFIGURATION_REQ (msg_p).discRxPool_discPeriod[j] = SL_DiscResourcePool_r12__discPeriod_r12_rf256;
} else if (strcmp(discRxPool_discPeriod,"rf512")==0) {
RRC_CONFIGURATION_REQ (msg_p).discRxPool_discPeriod[j] = SL_DiscResourcePool_r12__discPeriod_r12_rf512;
} else if (strcmp(discRxPool_discPeriod,"rf1024")==0) {
RRC_CONFIGURATION_REQ (msg_p).discRxPool_discPeriod[j] = SL_DiscResourcePool_r12__discPeriod_r12_rf1024;
} else if (strcmp(discRxPool_discPeriod,"rf16")==0) {
RRC_CONFIGURATION_REQ (msg_p).discRxPool_discPeriod[j] = SL_DiscResourcePool_r12__discPeriod_r12_rf16_v1310;
} else if (strcmp(discRxPool_discPeriod,"spare")==0) {
RRC_CONFIGURATION_REQ (msg_p).discRxPool_discPeriod[j] = SL_DiscResourcePool_r12__discPeriod_r12_spare;
} else
AssertFatal (0,
"Failed to parse eNB configuration file %s, enb %d unknown value \"%s\" for discRxPool_discPeriod choice: rf32,rf64,rf128,rf512,rf1024,rf16,spare!\n",
RC.config_file_name, i, discRxPool_discPeriod);
RRC_CONFIGURATION_REQ (msg_p).discRxPool_numRetx[j] = discRxPool_numRetx;
RRC_CONFIGURATION_REQ (msg_p).discRxPool_numRepetition[j] = discRxPool_numRepetition;
RRC_CONFIGURATION_REQ (msg_p).discRxPool_ResourceConfig_prb_Num[j] = discRxPool_ResourceConfig_prb_Num;
RRC_CONFIGURATION_REQ (msg_p).discRxPool_ResourceConfig_prb_Start[j] = discRxPool_ResourceConfig_prb_Start;
RRC_CONFIGURATION_REQ (msg_p).discRxPool_ResourceConfig_prb_End[j] = discRxPool_ResourceConfig_prb_End;
if (strcmp(discRxPool_ResourceConfig_offsetIndicator_present,"prNothing")==0) {
RRC_CONFIGURATION_REQ (msg_p).discRxPool_ResourceConfig_offsetIndicator_present[j] = SL_OffsetIndicator_r12_PR_NOTHING;
} else if (strcmp(discRxPool_ResourceConfig_offsetIndicator_present,"prSmall")==0) {
RRC_CONFIGURATION_REQ (msg_p).discRxPool_ResourceConfig_offsetIndicator_present[j] = SL_OffsetIndicator_r12_PR_small_r12;
} else if (strcmp(discRxPool_ResourceConfig_offsetIndicator_present,"prLarge")==0) {
RRC_CONFIGURATION_REQ (msg_p).discRxPool_ResourceConfig_offsetIndicator_present[j] = SL_OffsetIndicator_r12_PR_large_r12;
} else
AssertFatal (0,
"Failed to parse eNB configuration file %s, enb %d unknown value \"%s\" for discRxPool_ResourceConfig_offsetIndicator_present choice: prNothing,prSmal,prLarge!\n",
RC.config_file_name, i, discRxPool_ResourceConfig_offsetIndicator_present);
RRC_CONFIGURATION_REQ (msg_p).discRxPool_ResourceConfig_offsetIndicator_choice[j] = discRxPool_ResourceConfig_offsetIndicator_choice;
if (strcmp(discRxPool_ResourceConfig_subframeBitmap_present,"prNothing")==0) {
RRC_CONFIGURATION_REQ (msg_p).discRxPool_ResourceConfig_subframeBitmap_present[j] = SubframeBitmapSL_r12_PR_NOTHING;
} else if (strcmp(discRxPool_ResourceConfig_subframeBitmap_present,"prBs4")==0) {
RRC_CONFIGURATION_REQ (msg_p).discRxPool_ResourceConfig_subframeBitmap_present[j] = SubframeBitmapSL_r12_PR_bs4_r12;
} else if (strcmp(discRxPool_ResourceConfig_subframeBitmap_present,"prBs8")==0) {
RRC_CONFIGURATION_REQ (msg_p).discRxPool_ResourceConfig_subframeBitmap_present[j] = SubframeBitmapSL_r12_PR_bs8_r12;
} else if (strcmp(discRxPool_ResourceConfig_subframeBitmap_present,"prBs12")==0) {
RRC_CONFIGURATION_REQ (msg_p).discRxPool_ResourceConfig_subframeBitmap_present[j] = SubframeBitmapSL_r12_PR_bs12_r12;
} else if (strcmp(discRxPool_ResourceConfig_subframeBitmap_present,"prBs16")==0) {
RRC_CONFIGURATION_REQ (msg_p).discRxPool_ResourceConfig_subframeBitmap_present[j] = SubframeBitmapSL_r12_PR_bs16_r12;
} else if (strcmp(discRxPool_ResourceConfig_subframeBitmap_present,"prBs30")==0) {
RRC_CONFIGURATION_REQ (msg_p).discRxPool_ResourceConfig_subframeBitmap_present[j] = SubframeBitmapSL_r12_PR_bs30_r12;
} else if (strcmp(discRxPool_ResourceConfig_subframeBitmap_present,"prBs40")==0) {
RRC_CONFIGURATION_REQ (msg_p).discRxPool_ResourceConfig_subframeBitmap_present[j] = SubframeBitmapSL_r12_PR_bs40_r12;
} else if (strcmp(discRxPool_ResourceConfig_subframeBitmap_present,"prBs42")==0) {
RRC_CONFIGURATION_REQ (msg_p).discRxPool_ResourceConfig_subframeBitmap_present[j] = SubframeBitmapSL_r12_PR_bs42_r12;
} else
AssertFatal (0,
"Failed to parse eNB configuration file %s, enb %d unknown value \"%s\" for discRxPool_ResourceConfig_subframeBitmap_present choice: prNothing,prBs4,prBs8,prBs12,prBs16,prBs30,prBs40,prBs42!\n",
RC.config_file_name, i, discRxPool_ResourceConfig_subframeBitmap_present);
RRC_CONFIGURATION_REQ (msg_p).discRxPool_ResourceConfig_subframeBitmap_choice_bs_buf[j] = discRxPool_ResourceConfig_subframeBitmap_choice_bs_buf;
RRC_CONFIGURATION_REQ (msg_p).discRxPool_ResourceConfig_subframeBitmap_choice_bs_size[j] = discRxPool_ResourceConfig_subframeBitmap_choice_bs_size;
RRC_CONFIGURATION_REQ (msg_p).discRxPool_ResourceConfig_subframeBitmap_choice_bs_bits_unused[j] = discRxPool_ResourceConfig_subframeBitmap_choice_bs_bits_unused;
//SIB19 - For discRxPoolPS
if (strcmp(discRxPoolPS_cp_Len,"normal")==0) {
RRC_CONFIGURATION_REQ (msg_p).discRxPoolPS_cp_Len[j] = SL_CP_Len_r12_normal;
} else if (strcmp(discRxPoolPS_cp_Len,"extended")==0) {
RRC_CONFIGURATION_REQ (msg_p).discRxPoolPS_cp_Len[j] = SL_CP_Len_r12_extended;
} else
AssertFatal (0,
"Failed to parse eNB configuration file %s, enb %d unknown value \"%s\" for discRxPoolPS_cp_Len choice: normal,extended!\n",
RC.config_file_name, i, discRxPoolPS_cp_Len);
if (strcmp(discRxPoolPS_discPeriod,"rf32")==0) {
RRC_CONFIGURATION_REQ (msg_p).discRxPoolPS_discPeriod[j] = SL_DiscResourcePool_r12__discPeriod_r12_rf32;
} else if (strcmp(discRxPoolPS_discPeriod,"rf64")==0) {
RRC_CONFIGURATION_REQ (msg_p).discRxPoolPS_discPeriod[j] = SL_DiscResourcePool_r12__discPeriod_r12_rf64;
} else if (strcmp(discRxPoolPS_discPeriod,"rf128")==0) {
RRC_CONFIGURATION_REQ (msg_p).discRxPoolPS_discPeriod[j] = SL_DiscResourcePool_r12__discPeriod_r12_rf128;
} else if (strcmp(discRxPoolPS_discPeriod,"rf256")==0) {
RRC_CONFIGURATION_REQ (msg_p).discRxPoolPS_discPeriod[j] = SL_DiscResourcePool_r12__discPeriod_r12_rf256;
} else if (strcmp(discRxPoolPS_discPeriod,"rf512")==0) {
RRC_CONFIGURATION_REQ (msg_p).discRxPoolPS_discPeriod[j] = SL_DiscResourcePool_r12__discPeriod_r12_rf512;
} else if (strcmp(discRxPoolPS_discPeriod,"rf1024")==0) {
RRC_CONFIGURATION_REQ (msg_p).discRxPoolPS_discPeriod[j] = SL_DiscResourcePool_r12__discPeriod_r12_rf1024;
} else if (strcmp(discRxPoolPS_discPeriod,"rf16")==0) {
RRC_CONFIGURATION_REQ (msg_p).discRxPoolPS_discPeriod[j] = SL_DiscResourcePool_r12__discPeriod_r12_rf16_v1310;
} else if (strcmp(discRxPoolPS_discPeriod,"spare")==0) {
RRC_CONFIGURATION_REQ (msg_p).discRxPoolPS_discPeriod[j] = SL_DiscResourcePool_r12__discPeriod_r12_spare;
} else
AssertFatal (0,
"Failed to parse eNB configuration file %s, enb %d unknown value \"%s\" for discRxPoolPS_discPeriod choice: rf32,rf64,rf128,rf512,rf1024,rf16,spare!\n",
RC.config_file_name, i, discRxPoolPS_discPeriod);
RRC_CONFIGURATION_REQ (msg_p).discRxPoolPS_numRetx[j] = discRxPoolPS_numRetx;
RRC_CONFIGURATION_REQ (msg_p).discRxPoolPS_numRepetition[j] = discRxPoolPS_numRepetition;
RRC_CONFIGURATION_REQ (msg_p).discRxPoolPS_ResourceConfig_prb_Num[j] = discRxPoolPS_ResourceConfig_prb_Num;
RRC_CONFIGURATION_REQ (msg_p).discRxPoolPS_ResourceConfig_prb_Start[j] = discRxPoolPS_ResourceConfig_prb_Start;
RRC_CONFIGURATION_REQ (msg_p).discRxPoolPS_ResourceConfig_prb_End[j] = discRxPoolPS_ResourceConfig_prb_End;
if (strcmp(discRxPoolPS_ResourceConfig_offsetIndicator_present,"prNothing")==0) {
RRC_CONFIGURATION_REQ (msg_p).discRxPoolPS_ResourceConfig_offsetIndicator_present[j] = SL_OffsetIndicator_r12_PR_NOTHING;
} else if (strcmp(discRxPoolPS_ResourceConfig_offsetIndicator_present,"prSmall")==0) {
RRC_CONFIGURATION_REQ (msg_p).discRxPoolPS_ResourceConfig_offsetIndicator_present[j] = SL_OffsetIndicator_r12_PR_small_r12;
} else if (strcmp(discRxPoolPS_ResourceConfig_offsetIndicator_present,"prLarge")==0) {
RRC_CONFIGURATION_REQ (msg_p).discRxPoolPS_ResourceConfig_offsetIndicator_present[j] = SL_OffsetIndicator_r12_PR_large_r12;
} else
AssertFatal (0,
"Failed to parse eNB configuration file %s, enb %d unknown value \"%s\" for discRxPoolPS_ResourceConfig_offsetIndicator_present choice: prNothing,prSmal,prLarge!\n",
RC.config_file_name, i, discRxPoolPS_ResourceConfig_offsetIndicator_present);
RRC_CONFIGURATION_REQ (msg_p).discRxPoolPS_ResourceConfig_offsetIndicator_choice[j] = discRxPoolPS_ResourceConfig_offsetIndicator_choice;
if (strcmp(discRxPoolPS_ResourceConfig_subframeBitmap_present,"prNothing")==0) {
RRC_CONFIGURATION_REQ (msg_p).discRxPoolPS_ResourceConfig_subframeBitmap_present[j] = SubframeBitmapSL_r12_PR_NOTHING;
} else if (strcmp(discRxPoolPS_ResourceConfig_subframeBitmap_present,"prBs4")==0) {
RRC_CONFIGURATION_REQ (msg_p).discRxPoolPS_ResourceConfig_subframeBitmap_present[j] = SubframeBitmapSL_r12_PR_bs4_r12;
} else if (strcmp(discRxPoolPS_ResourceConfig_subframeBitmap_present,"prBs8")==0) {
RRC_CONFIGURATION_REQ (msg_p).discRxPoolPS_ResourceConfig_subframeBitmap_present[j] = SubframeBitmapSL_r12_PR_bs8_r12;
} else if (strcmp(discRxPoolPS_ResourceConfig_subframeBitmap_present,"prBs12")==0) {
RRC_CONFIGURATION_REQ (msg_p).discRxPoolPS_ResourceConfig_subframeBitmap_present[j] = SubframeBitmapSL_r12_PR_bs12_r12;
} else if (strcmp(discRxPoolPS_ResourceConfig_subframeBitmap_present,"prBs16")==0) {
RRC_CONFIGURATION_REQ (msg_p).discRxPoolPS_ResourceConfig_subframeBitmap_present[j] = SubframeBitmapSL_r12_PR_bs16_r12;
} else if (strcmp(discRxPoolPS_ResourceConfig_subframeBitmap_present,"prBs30")==0) {
RRC_CONFIGURATION_REQ (msg_p).discRxPoolPS_ResourceConfig_subframeBitmap_present[j] = SubframeBitmapSL_r12_PR_bs30_r12;
} else if (strcmp(discRxPoolPS_ResourceConfig_subframeBitmap_present,"prBs40")==0) {
RRC_CONFIGURATION_REQ (msg_p).discRxPoolPS_ResourceConfig_subframeBitmap_present[j] = SubframeBitmapSL_r12_PR_bs40_r12;
} else if (strcmp(discRxPoolPS_ResourceConfig_subframeBitmap_present,"prBs42")==0) {
RRC_CONFIGURATION_REQ (msg_p).discRxPoolPS_ResourceConfig_subframeBitmap_present[j] = SubframeBitmapSL_r12_PR_bs42_r12;
} else
AssertFatal (0,
"Failed to parse eNB configuration file %s, enb %d unknown value \"%s\" for discRxPoolPS_ResourceConfig_subframeBitmap_present choice: prNothing,prBs4,prBs8,prBs12,prBs16,prBs30,prBs40,prBs42!\n",
RC.config_file_name, i, discRxPoolPS_ResourceConfig_subframeBitmap_present);
RRC_CONFIGURATION_REQ (msg_p).discRxPoolPS_ResourceConfig_subframeBitmap_choice_bs_buf[j] = discRxPoolPS_ResourceConfig_subframeBitmap_choice_bs_buf;
RRC_CONFIGURATION_REQ (msg_p).discRxPoolPS_ResourceConfig_subframeBitmap_choice_bs_size[j] = discRxPoolPS_ResourceConfig_subframeBitmap_choice_bs_size;
RRC_CONFIGURATION_REQ (msg_p).discRxPoolPS_ResourceConfig_subframeBitmap_choice_bs_bits_unused[j] = discRxPoolPS_ResourceConfig_subframeBitmap_choice_bs_bits_unused;
}
}
char srb1path[MAX_OPTNAME_SIZE*2 + 8];
......
......@@ -93,9 +93,12 @@ typedef struct ru_config_s {
uint8_t if_compress;
} ru_config_t;
eth_params_t stub_eth_params;
extern void RCconfig_RU(void);
extern void RCconfig_L1(void);
extern void RCconfig_macrlc(void);
extern void UE_config_stub_pnf(void);
extern int RCconfig_gtpu(void );
extern void RCConfig(void);
......
......@@ -371,6 +371,50 @@ static int DEFENBS[] = {0};
#define ENB_CONFIG_STRING_UETIMERS_N310 "ue_TimersAndConstants_n310"
#define ENB_CONFIG_STRING_UETIMERS_N311 "ue_TimersAndConstants_n311"
#define ENB_CONFIG_STRING_UE_TRANSMISSION_MODE "ue_TransmissionMode"
//TTN - for D2D
//SIB18
#define ENB_CONFIG_STRING_RXPOOL_SC_CP_LEN "rxPool_sc_CP_Len"
#define ENB_CONFIG_STRING_RXPOOL_SC_PRIOD "rxPool_sc_Period"
#define ENB_CONFIG_STRING_RXPOOL_DATA_CP_LEN "rxPool_data_CP_Len"
#define ENB_CONFIG_STRING_RXPOOL_RC_PRB_NUM "rxPool_ResourceConfig_prb_Num"
#define ENB_CONFIG_STRING_RXPOOL_RC_PRB_START "rxPool_ResourceConfig_prb_Start"
#define ENB_CONFIG_STRING_RXPOOL_RC_PRB_END "rxPool_ResourceConfig_prb_End"
#define ENB_CONFIG_STRING_RXPOOL_RC_OFFSETIND_PRESENT "rxPool_ResourceConfig_offsetIndicator_present"
#define ENB_CONFIG_STRING_RXPOOL_RC_OFFSETIND_CHOICE "rxPool_ResourceConfig_offsetIndicator_choice"
#define ENB_CONFIG_STRING_RXPOOL_RC_SFBITMAP_PRESENT "rxPool_ResourceConfig_subframeBitmap_present"
#define ENB_CONFIG_STRING_RXPOOL_RC_SFBITMAP_CHOICE_BS_BUF "rxPool_ResourceConfig_subframeBitmap_choice_bs_buf"
#define ENB_CONFIG_STRING_RXPOOL_RC_SFBITMAP_CHOICE_BS_SIZE "rxPool_ResourceConfig_subframeBitmap_choice_bs_size"
#define ENB_CONFIG_STRING_RXPOOL_RC_SFBITMAP_CHOICE_BS_ASN_BITS_UNUSED "rxPool_ResourceConfig_subframeBitmap_choice_bs_bits_unused"
//SIB19 for DiscRxPool
#define ENB_CONFIG_STRING_DISCRXPOOL_CP_LEN "discRxPool_cp_Len"
#define ENB_CONFIG_STRING_DISCRXPOOL_DISCPERIOD "discRxPool_discPeriod"
#define ENB_CONFIG_STRING_DISCRXPOOL_NUMRETX "discRxPool_numRetx"
#define ENB_CONFIG_STRING_DISCRXPOOL_NUMREPETITION "discRxPool_numRepetition"
#define ENB_CONFIG_STRING_DISCRXPOOL_RC_PRB_NUM "discRxPool_ResourceConfig_prb_Num"
#define ENB_CONFIG_STRING_DISCRXPOOL_RC_PRB_START "discRxPool_ResourceConfig_prb_Start"
#define ENB_CONFIG_STRING_DISCRXPOOL_RC_PRB_END "discRxPool_ResourceConfig_prb_End"
#define ENB_CONFIG_STRING_DISCRXPOOL_RC_OFFSETIND_PRESENT "discRxPool_ResourceConfig_offsetIndicator_present"
#define ENB_CONFIG_STRING_DISCRXPOOL_RC_OFFSETIND_CHOICE "discRxPool_ResourceConfig_offsetIndicator_choice"
#define ENB_CONFIG_STRING_DISCRXPOOL_RC_SFBITMAP_PRESENT "discRxPool_ResourceConfig_subframeBitmap_present"
#define ENB_CONFIG_STRING_DISCRXPOOL_RC_SFBITMAP_CHOICE_BS_BUF "discRxPool_ResourceConfig_subframeBitmap_choice_bs_buf"
#define ENB_CONFIG_STRING_DISCRXPOOL_RC_SFBITMAP_CHOICE_BS_SIZE "discRxPool_ResourceConfig_subframeBitmap_choice_bs_size"
#define ENB_CONFIG_STRING_DISCRXPOOL_RC_SFBITMAP_CHOICE_BS_ASN_BITS_UNUSED "discRxPool_ResourceConfig_subframeBitmap_choice_bs_bits_unused"
//SIB19 for DiscRxPoolPS
#define ENB_CONFIG_STRING_DISCRXPOOLPS_CP_LEN "DISCRXPOOLPS_cp_Len"
#define ENB_CONFIG_STRING_DISCRXPOOLPS_DISCPERIOD "DISCRXPOOLPS_discPeriod"
#define ENB_CONFIG_STRING_DISCRXPOOLPS_NUMRETX "DISCRXPOOLPS_numRetx"
#define ENB_CONFIG_STRING_DISCRXPOOLPS_NUMREPETITION "DISCRXPOOLPS_numRepetition"
#define ENB_CONFIG_STRING_DISCRXPOOLPS_RC_PRB_NUM "DISCRXPOOLPS_ResourceConfig_prb_Num"
#define ENB_CONFIG_STRING_DISCRXPOOLPS_RC_PRB_START "DISCRXPOOLPS_ResourceConfig_prb_Start"
#define ENB_CONFIG_STRING_DISCRXPOOLPS_RC_PRB_END "DISCRXPOOLPS_ResourceConfig_prb_End"
#define ENB_CONFIG_STRING_DISCRXPOOLPS_RC_OFFSETIND_PRESENT "DISCRXPOOLPS_ResourceConfig_offsetIndicator_present"
#define ENB_CONFIG_STRING_DISCRXPOOLPS_RC_OFFSETIND_CHOICE "DISCRXPOOLPS_ResourceConfig_offsetIndicator_choice"
#define ENB_CONFIG_STRING_DISCRXPOOLPS_RC_SFBITMAP_PRESENT "DISCRXPOOLPS_ResourceConfig_subframeBitmap_present"
#define ENB_CONFIG_STRING_DISCRXPOOLPS_RC_SFBITMAP_CHOICE_BS_BUF "DISCRXPOOLPS_ResourceConfig_subframeBitmap_choice_bs_buf"
#define ENB_CONFIG_STRING_DISCRXPOOLPS_RC_SFBITMAP_CHOICE_BS_SIZE "DISCRXPOOLPS_ResourceConfig_subframeBitmap_choice_bs_size"
#define ENB_CONFIG_STRING_DISCRXPOOLPS_RC_SFBITMAP_CHOICE_BS_ASN_BITS_UNUSED "DISCRXPOOLPS_ResourceConfig_subframeBitmap_choice_bs_bits_unused"
/*-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/
/* component carriers configuration parameters */
......@@ -444,7 +488,45 @@ static int DEFENBS[] = {0};
{ENB_CONFIG_STRING_UETIMERS_T311, NULL, 0, iptr:&ue_TimersAndConstants_t311, defintval:10000, TYPE_UINT, 0}, \
{ENB_CONFIG_STRING_UETIMERS_N310, NULL, 0, iptr:&ue_TimersAndConstants_n310, defintval:20, TYPE_UINT, 0}, \
{ENB_CONFIG_STRING_UETIMERS_N311, NULL, 0, iptr:&ue_TimersAndConstants_n311, defintval:1, TYPE_UINT, 0}, \
{ENB_CONFIG_STRING_UE_TRANSMISSION_MODE, NULL, 0, iptr:&ue_TransmissionMode, defintval:1, TYPE_UINT, 0} \
{ENB_CONFIG_STRING_UE_TRANSMISSION_MODE, NULL, 0, iptr:&ue_TransmissionMode, defintval:1, TYPE_UINT, 0}, \
{ENB_CONFIG_STRING_RXPOOL_SC_CP_LEN, NULL, 0, strptr:&rxPool_sc_CP_Len, defstrval:"normal", TYPE_STRING, 0}, \
{ENB_CONFIG_STRING_RXPOOL_SC_PRIOD, NULL, 0, strptr:&rxPool_sc_Period, defstrval:"sf40", TYPE_STRING, 0}, \
{ENB_CONFIG_STRING_RXPOOL_DATA_CP_LEN, NULL, 0, strptr:&rxPool_data_CP_Len, defstrval:"normal", TYPE_STRING, 0}, \
{ENB_CONFIG_STRING_RXPOOL_RC_PRB_NUM, NULL, 0, iptr:&rxPool_ResourceConfig_prb_Num, defintval:1, TYPE_UINT, 0}, \
{ENB_CONFIG_STRING_RXPOOL_RC_PRB_START, NULL, 0, iptr:&rxPool_ResourceConfig_prb_Start, defintval:1, TYPE_UINT, 0}, \
{ENB_CONFIG_STRING_RXPOOL_RC_PRB_END, NULL, 0, iptr:&rxPool_ResourceConfig_prb_End, defintval:1, TYPE_UINT, 0}, \
{ENB_CONFIG_STRING_RXPOOL_RC_OFFSETIND_PRESENT, NULL, 0, strptr:&rxPool_ResourceConfig_offsetIndicator_present, defstrval:"prNothing", TYPE_STRING, 0}, \
{ENB_CONFIG_STRING_RXPOOL_RC_OFFSETIND_CHOICE, NULL, 0, iptr:&rxPool_ResourceConfig_offsetIndicator_choice, defintval:1, TYPE_UINT, 0}, \
{ENB_CONFIG_STRING_RXPOOL_RC_SFBITMAP_PRESENT, NULL, 0, strptr:&rxPool_ResourceConfig_subframeBitmap_present, defstrval:"prNothing", TYPE_STRING, 0}, \
{ENB_CONFIG_STRING_RXPOOL_RC_SFBITMAP_CHOICE_BS_BUF, NULL, 0, strptr:&rxPool_ResourceConfig_subframeBitmap_choice_bs_buf, defstrval:"001001", TYPE_STRING, 0}, \
{ENB_CONFIG_STRING_RXPOOL_RC_SFBITMAP_CHOICE_BS_SIZE, NULL, 0, iptr:&rxPool_ResourceConfig_subframeBitmap_choice_bs_size, defintval:1, TYPE_UINT, 0}, \
{ENB_CONFIG_STRING_RXPOOL_RC_SFBITMAP_CHOICE_BS_ASN_BITS_UNUSED, NULL, 0, iptr:&rxPool_ResourceConfig_subframeBitmap_choice_bs_bits_unused, defintval:1, TYPE_UINT, 0}, \
{ENB_CONFIG_STRING_DISCRXPOOL_CP_LEN, NULL, 0, strptr:&discRxPool_cp_Len, defstrval:"normal", TYPE_STRING, 0}, \
{ENB_CONFIG_STRING_DISCRXPOOL_DISCPERIOD, NULL, 0, strptr:&discRxPool_discPeriod, defstrval:"rf32", TYPE_STRING, 0}, \
{ENB_CONFIG_STRING_DISCRXPOOL_NUMRETX, NULL, 0, iptr:&discRxPool_numRetx, defintval:1, TYPE_UINT, 0}, \
{ENB_CONFIG_STRING_DISCRXPOOL_NUMREPETITION, NULL, 0, iptr:&discRxPool_numRepetition, defintval:1, TYPE_UINT, 0}, \
{ENB_CONFIG_STRING_DISCRXPOOL_RC_PRB_NUM, NULL, 0, iptr:&discRxPool_ResourceConfig_prb_Num, defintval:1, TYPE_UINT, 0}, \
{ENB_CONFIG_STRING_DISCRXPOOL_RC_PRB_START, NULL, 0, iptr:&discRxPool_ResourceConfig_prb_Start, defintval:1, TYPE_UINT, 0}, \
{ENB_CONFIG_STRING_DISCRXPOOL_RC_PRB_END, NULL, 0, iptr:&discRxPool_ResourceConfig_prb_End, defintval:1, TYPE_UINT, 0}, \
{ENB_CONFIG_STRING_DISCRXPOOL_RC_OFFSETIND_PRESENT, NULL, 0, strptr:&discRxPool_ResourceConfig_offsetIndicator_present, defstrval:"prNothing", TYPE_STRING, 0}, \
{ENB_CONFIG_STRING_DISCRXPOOL_RC_OFFSETIND_CHOICE, NULL, 0, iptr:&discRxPool_ResourceConfig_offsetIndicator_choice, defintval:1, TYPE_UINT, 0}, \
{ENB_CONFIG_STRING_DISCRXPOOL_RC_SFBITMAP_PRESENT, NULL, 0, strptr:&discRxPool_ResourceConfig_subframeBitmap_present, defstrval:"prNothing", TYPE_STRING, 0}, \
{ENB_CONFIG_STRING_DISCRXPOOL_RC_SFBITMAP_CHOICE_BS_BUF, NULL, 0, strptr:&discRxPool_ResourceConfig_subframeBitmap_choice_bs_buf, defstrval:"001001", TYPE_STRING, 0}, \
{ENB_CONFIG_STRING_DISCRXPOOL_RC_SFBITMAP_CHOICE_BS_SIZE, NULL, 0, iptr:&discRxPool_ResourceConfig_subframeBitmap_choice_bs_size, defintval:1, TYPE_UINT, 0}, \
{ENB_CONFIG_STRING_DISCRXPOOL_RC_SFBITMAP_CHOICE_BS_ASN_BITS_UNUSED,NULL, 0, iptr:&discRxPool_ResourceConfig_subframeBitmap_choice_bs_bits_unused, defintval:1, TYPE_UINT, 0}, \
{ENB_CONFIG_STRING_DISCRXPOOLPS_CP_LEN, NULL, 0, strptr:&discRxPoolPS_cp_Len, defstrval:"normal", TYPE_STRING, 0}, \
{ENB_CONFIG_STRING_DISCRXPOOLPS_DISCPERIOD, NULL, 0, strptr:&discRxPoolPS_discPeriod, defstrval:"rf32", TYPE_STRING, 0}, \
{ENB_CONFIG_STRING_DISCRXPOOLPS_NUMRETX, NULL, 0, iptr:&discRxPoolPS_numRetx, defintval:1, TYPE_UINT, 0}, \
{ENB_CONFIG_STRING_DISCRXPOOLPS_NUMREPETITION, NULL, 0, iptr:&discRxPoolPS_numRepetition, defintval:1, TYPE_UINT, 0}, \
{ENB_CONFIG_STRING_DISCRXPOOLPS_RC_PRB_NUM, NULL, 0, iptr:&discRxPoolPS_ResourceConfig_prb_Num, defintval:1, TYPE_UINT, 0}, \
{ENB_CONFIG_STRING_DISCRXPOOLPS_RC_PRB_START, NULL, 0, iptr:&discRxPoolPS_ResourceConfig_prb_Start, defintval:1, TYPE_UINT, 0}, \
{ENB_CONFIG_STRING_DISCRXPOOLPS_RC_PRB_END, NULL, 0, iptr:&discRxPoolPS_ResourceConfig_prb_End, defintval:1, TYPE_UINT, 0}, \
{ENB_CONFIG_STRING_DISCRXPOOLPS_RC_OFFSETIND_PRESENT, NULL, 0, strptr:&discRxPoolPS_ResourceConfig_offsetIndicator_present, defstrval:"prNothing", TYPE_STRING, 0}, \
{ENB_CONFIG_STRING_DISCRXPOOLPS_RC_OFFSETIND_CHOICE, NULL, 0, iptr:&discRxPoolPS_ResourceConfig_offsetIndicator_choice, defintval:1, TYPE_UINT, 0}, \
{ENB_CONFIG_STRING_DISCRXPOOLPS_RC_SFBITMAP_PRESENT, NULL, 0, strptr:&discRxPoolPS_ResourceConfig_subframeBitmap_present, defstrval:"prNothing", TYPE_STRING, 0}, \
{ENB_CONFIG_STRING_DISCRXPOOLPS_RC_SFBITMAP_CHOICE_BS_BUF, NULL, 0, strptr:&discRxPoolPS_ResourceConfig_subframeBitmap_choice_bs_buf, defstrval:"001001", TYPE_STRING, 0}, \
{ENB_CONFIG_STRING_DISCRXPOOLPS_RC_SFBITMAP_CHOICE_BS_SIZE, NULL, 0, iptr:&discRxPoolPS_ResourceConfig_subframeBitmap_choice_bs_size, defintval:1, TYPE_UINT, 0}, \
{ENB_CONFIG_STRING_DISCRXPOOLPS_RC_SFBITMAP_CHOICE_BS_ASN_BITS_UNUSED,NULL, 0, iptr:&discRxPoolPS_ResourceConfig_subframeBitmap_choice_bs_bits_unused, defintval:1, TYPE_UINT, 0} \
}
/*------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/
......
......@@ -58,6 +58,12 @@
#endif
extern RAN_CONTEXT_t RC;
extern int l2_init_eNB(void);
extern void mac_top_init_eNB(void);
extern void mac_init_cell_params(int Mod_idP,int CC_idP);
extern void phy_reset_ue(module_id_t Mod_id,uint8_t CC_id,uint8_t eNB_index);
extern uint8_t nfapi_mode;
/* sec 5.9, 36.321: MAC Reset Procedure */
void ue_mac_reset(module_id_t module_idP,uint8_t eNB_index)
......@@ -218,32 +224,100 @@ void config_mib(int Mod_idP,
uint32_t pbch_repetitionP) {
nfapi_config_request_t *cfg = &RC.mac[Mod_idP]->config[CC_idP];
cfg->num_tlv=0;
cfg->subframe_config.pcfich_power_offset.value = 6000; // 0dB
cfg->subframe_config.pcfich_power_offset.tl.tag = NFAPI_SUBFRAME_CONFIG_PCFICH_POWER_OFFSET_TAG;
cfg->num_tlv++;
cfg->subframe_config.dl_cyclic_prefix_type.value = NcpP;
cfg->subframe_config.dl_cyclic_prefix_type.tl.tag = NFAPI_SUBFRAME_CONFIG_DL_CYCLIC_PREFIX_TYPE_TAG;
cfg->num_tlv++;
cfg->subframe_config.ul_cyclic_prefix_type.value = NcpP;
cfg->subframe_config.ul_cyclic_prefix_type.tl.tag = NFAPI_SUBFRAME_CONFIG_UL_CYCLIC_PREFIX_TYPE_TAG;
cfg->num_tlv++;
LOG_I(MAC,"Ncp %d,p_eNB %d\n",NcpP,p_eNBP);
cfg->rf_config.dl_channel_bandwidth.value = to_prb(dl_BandwidthP);
cfg->rf_config.dl_channel_bandwidth.tl.tag = NFAPI_RF_CONFIG_DL_CHANNEL_BANDWIDTH_TAG;
cfg->num_tlv++;
LOG_E(PHY,"%s() dl_BandwidthP:%d\n", __FUNCTION__, dl_BandwidthP);
cfg->rf_config.ul_channel_bandwidth.value = to_prb(dl_BandwidthP);
cfg->rf_config.ul_channel_bandwidth.tl.tag = NFAPI_RF_CONFIG_UL_CHANNEL_BANDWIDTH_TAG;
cfg->num_tlv++;
cfg->rf_config.dl_channel_bandwidth.value = dl_BandwidthP;
cfg->rf_config.ul_channel_bandwidth.value = dl_BandwidthP;
cfg->rf_config.tx_antenna_ports.value = p_eNBP;
cfg->rf_config.tx_antenna_ports.tl.tag = NFAPI_RF_CONFIG_TX_ANTENNA_PORTS_TAG;
cfg->num_tlv++;
cfg->rf_config.rx_antenna_ports.value = 2;
cfg->rf_config.rx_antenna_ports.tl.tag = NFAPI_RF_CONFIG_RX_ANTENNA_PORTS_TAG;
cfg->num_tlv++;
cfg->nfapi_config.earfcn.value = to_earfcn(eutra_bandP,dl_CarrierFreqP,bw_table[dl_BandwidthP]/100);
cfg->nfapi_config.earfcn.tl.tag = NFAPI_NFAPI_EARFCN_TAG;
cfg->num_tlv++;
cfg->nfapi_config.rf_bands.number_rf_bands = 1;
cfg->nfapi_config.rf_bands.rf_band[0] = eutra_bandP;
cfg->nfapi_config.rf_bands.tl.tag = NFAPI_PHY_RF_BANDS_TAG;
cfg->num_tlv++;
cfg->phich_config.phich_resource.value = phich_configP->phich_Resource;
cfg->phich_config.phich_resource.tl.tag = NFAPI_PHICH_CONFIG_PHICH_RESOURCE_TAG;
cfg->num_tlv++;
cfg->phich_config.phich_duration.value = phich_configP->phich_Duration;
cfg->phich_config.phich_duration.tl.tag = NFAPI_PHICH_CONFIG_PHICH_DURATION_TAG;
cfg->num_tlv++;
cfg->phich_config.phich_power_offset.value = 6000; // 0dB
cfg->phich_config.phich_power_offset.tl.tag = NFAPI_PHICH_CONFIG_PHICH_POWER_OFFSET_TAG;
cfg->num_tlv++;
cfg->sch_config.primary_synchronization_signal_epre_eprers.value = 6000; // 0dB
cfg->sch_config.primary_synchronization_signal_epre_eprers.tl.tag = NFAPI_SCH_CONFIG_PRIMARY_SYNCHRONIZATION_SIGNAL_EPRE_EPRERS_TAG;
cfg->num_tlv++;
cfg->sch_config.secondary_synchronization_signal_epre_eprers.value = 6000; // 0dB
cfg->sch_config.secondary_synchronization_signal_epre_eprers.tl.tag = NFAPI_SCH_CONFIG_SECONDARY_SYNCHRONIZATION_SIGNAL_EPRE_EPRERS_TAG;
cfg->num_tlv++;
cfg->sch_config.physical_cell_id.value = Nid_cellP;
cfg->sch_config.physical_cell_id.tl.tag = NFAPI_SCH_CONFIG_PHYSICAL_CELL_ID_TAG;
cfg->num_tlv++;
#ifdef Rel14
cfg->emtc_config.pbch_repetitions_enable_r13.value = pbch_repetitionP;
cfg->emtc_config.pbch_repetitions_enable_r13.tl.tag = NFAPI_EMTC_CONFIG_PBCH_REPETITIONS_ENABLE_R13_TAG;
cfg->num_tlv++;
#endif
LOG_I(MAC,
"%s() NFAPI_CONFIG_REQUEST(num_tlv:%u) DL_BW:%u UL_BW:%u Ncp %d,p_eNB %d,earfcn %d,band %d,phich_resource %u phich_duration %u phich_power_offset %u PSS %d SSS %d PCI %d"
#ifdef Rel14
" PBCH repetition %d"
#endif
"\n"
,__FUNCTION__
,cfg->num_tlv
,cfg->rf_config.dl_channel_bandwidth.value
,cfg->rf_config.ul_channel_bandwidth.value
,NcpP,p_eNBP
,cfg->nfapi_config.earfcn.value
,cfg->nfapi_config.rf_bands.rf_band[0]
,cfg->phich_config.phich_resource.value
,cfg->phich_config.phich_duration.value
,cfg->phich_config.phich_power_offset.value
,cfg->sch_config.primary_synchronization_signal_epre_eprers.value
,cfg->sch_config.secondary_synchronization_signal_epre_eprers.value
,cfg->sch_config.physical_cell_id.value
#ifdef Rel14
,cfg->emtc_config.pbch_repetitions_enable_r13.value
#endif
);
}
void config_sib1(int Mod_idP,
......@@ -254,17 +328,28 @@ void config_sib1(int Mod_idP,
if (tdd_ConfigP) { //TDD
cfg->subframe_config.duplex_mode.value = 0;
cfg->subframe_config.duplex_mode.tl.tag = NFAPI_SUBFRAME_CONFIG_DUPLEX_MODE_TAG;
cfg->num_tlv++;
cfg->tdd_frame_structure_config.subframe_assignment.value = tdd_ConfigP->subframeAssignment;
cfg->tdd_frame_structure_config.subframe_assignment.tl.tag = NFAPI_TDD_FRAME_STRUCTURE_SUBFRAME_ASSIGNMENT_TAG;
cfg->num_tlv++;
cfg->tdd_frame_structure_config.special_subframe_patterns.value = tdd_ConfigP->specialSubframePatterns;
cfg->tdd_frame_structure_config.special_subframe_patterns.tl.tag = NFAPI_TDD_FRAME_STRUCTURE_SPECIAL_SUBFRAME_PATTERNS_TAG;
cfg->num_tlv++;
}
else { // FDD
cfg->subframe_config.duplex_mode.value = 1;
cfg->subframe_config.duplex_mode.tl.tag = NFAPI_SUBFRAME_CONFIG_DUPLEX_MODE_TAG;
cfg->num_tlv++;
// Note no half-duplex here
}
}
int power_off_dB[6] = {78,118,140,170,188,200};
void config_sib2(int Mod_idP,
......@@ -281,46 +366,117 @@ void config_sib2(int Mod_idP,
nfapi_config_request_t *cfg = &RC.mac[Mod_idP]->config[CC_idP];
cfg->subframe_config.pb.value = radioResourceConfigCommonP->pdsch_ConfigCommon.p_b;
cfg->subframe_config.pb.tl.tag = NFAPI_SUBFRAME_CONFIG_PB_TAG;
cfg->num_tlv++;
cfg->rf_config.reference_signal_power.value = radioResourceConfigCommonP->pdsch_ConfigCommon.referenceSignalPower;
cfg->rf_config.reference_signal_power.tl.tag = NFAPI_RF_CONFIG_REFERENCE_SIGNAL_POWER_TAG;
cfg->num_tlv++;
cfg->nfapi_config.max_transmit_power.value = cfg->rf_config.reference_signal_power.value + power_off_dB[cfg->rf_config.dl_channel_bandwidth.value];
cfg->nfapi_config.max_transmit_power.tl.tag = NFAPI_NFAPI_MAXIMUM_TRANSMIT_POWER_TAG;
cfg->num_tlv++;
cfg->prach_config.configuration_index.value = radioResourceConfigCommonP->prach_Config.prach_ConfigInfo.prach_ConfigIndex;
cfg->prach_config.configuration_index.tl.tag = NFAPI_PRACH_CONFIG_CONFIGURATION_INDEX_TAG;
cfg->num_tlv++;
cfg->prach_config.root_sequence_index.value = radioResourceConfigCommonP->prach_Config.rootSequenceIndex;
cfg->prach_config.root_sequence_index.tl.tag = NFAPI_PRACH_CONFIG_ROOT_SEQUENCE_INDEX_TAG;
cfg->num_tlv++;
cfg->prach_config.zero_correlation_zone_configuration.value = radioResourceConfigCommonP->prach_Config.prach_ConfigInfo.zeroCorrelationZoneConfig;
cfg->prach_config.zero_correlation_zone_configuration.tl.tag = NFAPI_PRACH_CONFIG_ZERO_CORRELATION_ZONE_CONFIGURATION_TAG;
cfg->num_tlv++;
cfg->prach_config.high_speed_flag.value = radioResourceConfigCommonP->prach_Config.prach_ConfigInfo.highSpeedFlag;
cfg->prach_config.high_speed_flag.tl.tag = NFAPI_PRACH_CONFIG_HIGH_SPEED_FLAG_TAG;
cfg->num_tlv++;
cfg->prach_config.frequency_offset.value = radioResourceConfigCommonP->prach_Config.prach_ConfigInfo.prach_FreqOffset;
cfg->prach_config.frequency_offset.tl.tag = NFAPI_PRACH_CONFIG_FREQUENCY_OFFSET_TAG;
cfg->num_tlv++;
cfg->pusch_config.hopping_mode.value = radioResourceConfigCommonP->pusch_ConfigCommon.pusch_ConfigBasic.hoppingMode;
cfg->pusch_config.hopping_mode.tl.tag = NFAPI_PUSCH_CONFIG_HOPPING_MODE_TAG;
cfg->num_tlv++;
cfg->pusch_config.number_of_subbands.value = radioResourceConfigCommonP->pusch_ConfigCommon.pusch_ConfigBasic.n_SB;
cfg->pusch_config.number_of_subbands.tl.tag = NFAPI_PUSCH_CONFIG_NUMBER_OF_SUBBANDS_TAG;
cfg->num_tlv++;
cfg->pusch_config.hopping_offset.value = radioResourceConfigCommonP->pusch_ConfigCommon.pusch_ConfigBasic.pusch_HoppingOffset;
cfg->pusch_config.hopping_offset.tl.tag = NFAPI_PUSCH_CONFIG_HOPPING_OFFSET_TAG;
cfg->num_tlv++;
cfg->pucch_config.delta_pucch_shift.value = radioResourceConfigCommonP->pucch_ConfigCommon.deltaPUCCH_Shift;
cfg->pucch_config.delta_pucch_shift.tl.tag = NFAPI_PUCCH_CONFIG_DELTA_PUCCH_SHIFT_TAG;
cfg->num_tlv++;
cfg->pucch_config.n_cqi_rb.value = radioResourceConfigCommonP->pucch_ConfigCommon.nRB_CQI;
cfg->pucch_config.n_cqi_rb.tl.tag = NFAPI_PUCCH_CONFIG_N_CQI_RB_TAG;
cfg->num_tlv++;
cfg->pucch_config.n_an_cs.value = radioResourceConfigCommonP->pucch_ConfigCommon.nCS_AN;
cfg->pucch_config.n_an_cs.tl.tag = NFAPI_PUCCH_CONFIG_N_AN_CS_TAG;
cfg->num_tlv++;
cfg->pucch_config.n1_pucch_an.value = radioResourceConfigCommonP->pucch_ConfigCommon.n1PUCCH_AN;
cfg->pucch_config.n1_pucch_an.tl.tag = NFAPI_PUCCH_CONFIG_N1_PUCCH_AN_TAG;
cfg->num_tlv++;
if (radioResourceConfigCommonP->pusch_ConfigCommon.ul_ReferenceSignalsPUSCH.groupHoppingEnabled == true)
{
cfg->uplink_reference_signal_config.uplink_rs_hopping.value = 1;
}
else if (radioResourceConfigCommonP->pusch_ConfigCommon.ul_ReferenceSignalsPUSCH.sequenceHoppingEnabled == true)
{
cfg->uplink_reference_signal_config.uplink_rs_hopping.value = 2;
}
else // No hopping
{
cfg->uplink_reference_signal_config.uplink_rs_hopping.value = 0;
}
cfg->uplink_reference_signal_config.uplink_rs_hopping.tl.tag = NFAPI_UPLINK_REFERENCE_SIGNAL_CONFIG_UPLINK_RS_HOPPING_TAG;
cfg->num_tlv++;
cfg->uplink_reference_signal_config.group_assignment.value = radioResourceConfigCommonP->pusch_ConfigCommon.ul_ReferenceSignalsPUSCH.groupAssignmentPUSCH;
cfg->uplink_reference_signal_config.group_assignment.tl.tag = NFAPI_UPLINK_REFERENCE_SIGNAL_CONFIG_GROUP_ASSIGNMENT_TAG;
cfg->num_tlv++;
cfg->uplink_reference_signal_config.cyclic_shift_1_for_drms.value = radioResourceConfigCommonP->pusch_ConfigCommon.ul_ReferenceSignalsPUSCH.cyclicShift;
cfg->uplink_reference_signal_config.cyclic_shift_1_for_drms.tl.tag = NFAPI_UPLINK_REFERENCE_SIGNAL_CONFIG_CYCLIC_SHIFT_1_FOR_DRMS_TAG;
cfg->num_tlv++;
// how to enable/disable SRS?
if (radioResourceConfigCommonP->soundingRS_UL_ConfigCommon.present==SoundingRS_UL_ConfigCommon_PR_setup) {
cfg->srs_config.bandwidth_configuration.value = radioResourceConfigCommonP->soundingRS_UL_ConfigCommon.choice.setup.srs_BandwidthConfig;
cfg->srs_config.bandwidth_configuration.tl.tag = NFAPI_SRS_CONFIG_BANDWIDTH_CONFIGURATION_TAG;
cfg->num_tlv++;
cfg->srs_config.srs_subframe_configuration.value = radioResourceConfigCommonP->soundingRS_UL_ConfigCommon.choice.setup.srs_SubframeConfig;
cfg->srs_config.srs_subframe_configuration.tl.tag = NFAPI_SRS_CONFIG_SRS_SUBFRAME_CONFIGURATION_TAG;
cfg->num_tlv++;
cfg->srs_config.srs_acknack_srs_simultaneous_transmission.value = radioResourceConfigCommonP->soundingRS_UL_ConfigCommon.choice.setup.ackNackSRS_SimultaneousTransmission;
cfg->srs_config.srs_acknack_srs_simultaneous_transmission.tl.tag = NFAPI_SRS_CONFIG_SRS_ACKNACK_SRS_SIMULTANEOUS_TRANSMISSION_TAG;
cfg->num_tlv++;
if (radioResourceConfigCommonP->soundingRS_UL_ConfigCommon.choice.setup.srs_MaxUpPts)
if (radioResourceConfigCommonP->soundingRS_UL_ConfigCommon.choice.setup.srs_MaxUpPts) {
cfg->srs_config.max_up_pts.value = 1;
else
}
else {
cfg->srs_config.max_up_pts.value = 0;
}
cfg->srs_config.max_up_pts.tl.tag = NFAPI_SRS_CONFIG_MAX_UP_PTS_TAG;
cfg->num_tlv++;
}
#ifdef Rel14
......@@ -328,8 +484,16 @@ void config_sib2(int Mod_idP,
AssertFatal(radioResourceConfigCommon_BRP!=NULL,"radioResource rou is missing\n");
AssertFatal(radioResourceConfigCommon_BRP->ext4!=NULL,"ext4 is missing\n");
cfg->emtc_config.prach_catm_root_sequence_index.value = radioResourceConfigCommon_BRP->prach_Config.rootSequenceIndex;
cfg->emtc_config.prach_catm_root_sequence_index.tl.tag = NFAPI_EMTC_CONFIG_PRACH_CATM_ROOT_SEQUENCE_INDEX_TAG;
cfg->num_tlv++;
cfg->emtc_config.prach_catm_zero_correlation_zone_configuration.value = radioResourceConfigCommon_BRP->prach_Config.prach_ConfigInfo.zeroCorrelationZoneConfig;
cfg->emtc_config.prach_catm_zero_correlation_zone_configuration.tl.tag = NFAPI_EMTC_CONFIG_PRACH_CATM_ZERO_CORRELATION_ZONE_CONFIGURATION_TAG;
cfg->num_tlv++;
cfg->emtc_config.prach_catm_high_speed_flag.value = radioResourceConfigCommon_BRP->prach_Config.prach_ConfigInfo.highSpeedFlag;
cfg->emtc_config.prach_catm_high_speed_flag.tl.tag = NFAPI_EMTC_CONFIG_PRACH_CATM_HIGH_SPEED_FLAG;
cfg->num_tlv++;
struct PRACH_ConfigSIB_v1310 *ext4_prach=radioResourceConfigCommon_BRP->ext4->prach_ConfigCommon_v1310;
......@@ -337,50 +501,149 @@ void config_sib2(int Mod_idP,
PRACH_ParametersCE_r13_t *p;
cfg->emtc_config.prach_ce_level_0_enable.value=0;
cfg->emtc_config.prach_ce_level_0_enable.tl.tag=NFAPI_EMTC_CONFIG_PRACH_CE_LEVEL_0_ENABLE_TAG;
cfg->num_tlv++;
cfg->emtc_config.prach_ce_level_1_enable.value=0;
cfg->emtc_config.prach_ce_level_1_enable.tl.tag=NFAPI_EMTC_CONFIG_PRACH_CE_LEVEL_1_ENABLE_TAG;
cfg->num_tlv++;
cfg->emtc_config.prach_ce_level_2_enable.value=0;
cfg->emtc_config.prach_ce_level_2_enable.tl.tag=NFAPI_EMTC_CONFIG_PRACH_CE_LEVEL_2_ENABLE_TAG;
cfg->num_tlv++;
cfg->emtc_config.prach_ce_level_3_enable.value=0;
cfg->emtc_config.prach_ce_level_3_enable.tl.tag=NFAPI_EMTC_CONFIG_PRACH_CE_LEVEL_3_ENABLE_TAG;
cfg->num_tlv++;
switch (prach_ParametersListCE_r13->list.count) {
case 4:
p=prach_ParametersListCE_r13->list.array[3];
cfg->emtc_config.prach_ce_level_3_enable.value = 1;
cfg->emtc_config.prach_ce_level_3_enable.tl.tag = NFAPI_EMTC_CONFIG_PRACH_CE_LEVEL_3_ENABLE_TAG;
cfg->num_tlv++;
cfg->emtc_config.prach_ce_level_3_configuration_index.value = p->prach_ConfigIndex_r13;
cfg->emtc_config.prach_ce_level_3_configuration_index.tl.tag = NFAPI_EMTC_CONFIG_PRACH_CE_LEVEL_3_CONFIGURATION_INDEX_TAG;
cfg->num_tlv++;
cfg->emtc_config.prach_ce_level_3_frequency_offset.value = p->prach_FreqOffset_r13;
cfg->emtc_config.prach_ce_level_3_frequency_offset.tl.tag = NFAPI_EMTC_CONFIG_PRACH_CE_LEVEL_3_FREQUENCY_OFFSET_TAG;
cfg->num_tlv++;
cfg->emtc_config.prach_ce_level_3_number_of_repetitions_per_attempt.value = p->numRepetitionPerPreambleAttempt_r13;
if (p->prach_StartingSubframe_r13)
cfg->emtc_config.prach_ce_level_3_number_of_repetitions_per_attempt.tl.tag = NFAPI_EMTC_CONFIG_PRACH_CE_LEVEL_3_NUMBER_OF_REPETITIONS_PER_ATTEMPT_TAG;
cfg->num_tlv++;
if (p->prach_StartingSubframe_r13) {
cfg->emtc_config.prach_ce_level_3_starting_subframe_periodicity.value = *p->prach_StartingSubframe_r13;
cfg->emtc_config.prach_ce_level_3_starting_subframe_periodicity.tl.tag = NFAPI_EMTC_CONFIG_PRACH_CE_LEVEL_3_STARTING_SUBFRAME_PERIODICITY_TAG;
cfg->num_tlv++;
}
cfg->emtc_config.prach_ce_level_3_hopping_enable.value = p->prach_HoppingConfig_r13;
cfg->emtc_config.prach_ce_level_3_hopping_enable.tl.tag = NFAPI_EMTC_CONFIG_PRACH_CE_LEVEL_3_HOPPING_ENABLE_TAG;
cfg->num_tlv++;
cfg->emtc_config.prach_ce_level_3_hopping_offset.value = cfg->rf_config.ul_channel_bandwidth.value-6;
cfg->emtc_config.prach_ce_level_3_hopping_offset.tl.tag = NFAPI_EMTC_CONFIG_PRACH_CE_LEVEL_3_HOPPING_OFFSET_TAG;
cfg->num_tlv++;
case 3:
p=prach_ParametersListCE_r13->list.array[2];
cfg->emtc_config.prach_ce_level_2_enable.value = 1;
cfg->emtc_config.prach_ce_level_2_enable.tl.tag = NFAPI_EMTC_CONFIG_PRACH_CE_LEVEL_2_ENABLE_TAG;
cfg->num_tlv++;
cfg->emtc_config.prach_ce_level_2_configuration_index.value = p->prach_ConfigIndex_r13;
cfg->emtc_config.prach_ce_level_2_configuration_index.tl.tag = NFAPI_EMTC_CONFIG_PRACH_CE_LEVEL_2_CONFIGURATION_INDEX_TAG;
cfg->num_tlv++;
cfg->emtc_config.prach_ce_level_2_frequency_offset.value = p->prach_FreqOffset_r13;
cfg->emtc_config.prach_ce_level_2_frequency_offset.tl.tag = NFAPI_EMTC_CONFIG_PRACH_CE_LEVEL_2_FREQUENCY_OFFSET_TAG;
cfg->num_tlv++;
cfg->emtc_config.prach_ce_level_2_number_of_repetitions_per_attempt.value = p->numRepetitionPerPreambleAttempt_r13;
if (p->prach_StartingSubframe_r13)
cfg->emtc_config.prach_ce_level_2_number_of_repetitions_per_attempt.tl.tag = NFAPI_EMTC_CONFIG_PRACH_CE_LEVEL_2_NUMBER_OF_REPETITIONS_PER_ATTEMPT_TAG;
cfg->num_tlv++;
if (p->prach_StartingSubframe_r13) {
cfg->emtc_config.prach_ce_level_2_starting_subframe_periodicity.value = *p->prach_StartingSubframe_r13;
cfg->emtc_config.prach_ce_level_2_starting_subframe_periodicity.tl.tag = NFAPI_EMTC_CONFIG_PRACH_CE_LEVEL_2_STARTING_SUBFRAME_PERIODICITY_TAG;
cfg->num_tlv++;
}
cfg->emtc_config.prach_ce_level_2_hopping_enable.value = p->prach_HoppingConfig_r13;
cfg->emtc_config.prach_ce_level_2_hopping_enable.tl.tag = NFAPI_EMTC_CONFIG_PRACH_CE_LEVEL_2_HOPPING_ENABLE_TAG;
cfg->num_tlv++;
cfg->emtc_config.prach_ce_level_2_hopping_offset.value = cfg->rf_config.ul_channel_bandwidth.value-6;
cfg->emtc_config.prach_ce_level_2_hopping_offset.tl.tag = NFAPI_EMTC_CONFIG_PRACH_CE_LEVEL_2_HOPPING_OFFSET_TAG;
cfg->num_tlv++;
case 2:
p=prach_ParametersListCE_r13->list.array[1];
cfg->emtc_config.prach_ce_level_1_enable.value = 1;
cfg->emtc_config.prach_ce_level_1_enable.tl.tag = NFAPI_EMTC_CONFIG_PRACH_CE_LEVEL_1_ENABLE_TAG;
cfg->num_tlv++;
cfg->emtc_config.prach_ce_level_1_configuration_index.value = p->prach_ConfigIndex_r13;
cfg->emtc_config.prach_ce_level_1_configuration_index.tl.tag = NFAPI_EMTC_CONFIG_PRACH_CE_LEVEL_1_CONFIGURATION_INDEX_TAG;
cfg->num_tlv++;
cfg->emtc_config.prach_ce_level_1_frequency_offset.value = p->prach_FreqOffset_r13;
cfg->emtc_config.prach_ce_level_1_frequency_offset.tl.tag = NFAPI_EMTC_CONFIG_PRACH_CE_LEVEL_1_FREQUENCY_OFFSET_TAG;
cfg->num_tlv++;
cfg->emtc_config.prach_ce_level_1_number_of_repetitions_per_attempt.value = p->numRepetitionPerPreambleAttempt_r13;
if (p->prach_StartingSubframe_r13)
cfg->emtc_config.prach_ce_level_1_number_of_repetitions_per_attempt.tl.tag = NFAPI_EMTC_CONFIG_PRACH_CE_LEVEL_1_NUMBER_OF_REPETITIONS_PER_ATTEMPT_TAG;
cfg->num_tlv++;
if (p->prach_StartingSubframe_r13) {
cfg->emtc_config.prach_ce_level_1_starting_subframe_periodicity.value = *p->prach_StartingSubframe_r13;
cfg->emtc_config.prach_ce_level_1_starting_subframe_periodicity.tl.tag = NFAPI_EMTC_CONFIG_PRACH_CE_LEVEL_1_STARTING_SUBFRAME_PERIODICITY_TAG;
cfg->num_tlv++;
}
cfg->emtc_config.prach_ce_level_1_hopping_enable.value = p->prach_HoppingConfig_r13;
cfg->emtc_config.prach_ce_level_1_hopping_enable.tl.tag = NFAPI_EMTC_CONFIG_PRACH_CE_LEVEL_1_HOPPING_ENABLE_TAG;
cfg->num_tlv++;
cfg->emtc_config.prach_ce_level_1_hopping_offset.value = cfg->rf_config.ul_channel_bandwidth.value-6;
cfg->emtc_config.prach_ce_level_1_hopping_offset.tl.tag = NFAPI_EMTC_CONFIG_PRACH_CE_LEVEL_1_HOPPING_OFFSET_TAG;
cfg->num_tlv++;
case 1:
p=prach_ParametersListCE_r13->list.array[0];
cfg->emtc_config.prach_ce_level_0_enable.value = 1;
cfg->emtc_config.prach_ce_level_0_enable.tl.tag = NFAPI_EMTC_CONFIG_PRACH_CE_LEVEL_0_ENABLE_TAG;
cfg->num_tlv++;
cfg->emtc_config.prach_ce_level_0_configuration_index.value = p->prach_ConfigIndex_r13;
cfg->emtc_config.prach_ce_level_0_configuration_index.tl.tag = NFAPI_EMTC_CONFIG_PRACH_CE_LEVEL_0_CONFIGURATION_INDEX_TAG;
cfg->num_tlv++;
cfg->emtc_config.prach_ce_level_0_frequency_offset.value = p->prach_FreqOffset_r13;
cfg->emtc_config.prach_ce_level_0_frequency_offset.tl.tag = NFAPI_EMTC_CONFIG_PRACH_CE_LEVEL_0_FREQUENCY_OFFSET_TAG;
cfg->num_tlv++;
cfg->emtc_config.prach_ce_level_0_number_of_repetitions_per_attempt.value = p->numRepetitionPerPreambleAttempt_r13;
if (p->prach_StartingSubframe_r13)
cfg->emtc_config.prach_ce_level_0_number_of_repetitions_per_attempt.tl.tag = NFAPI_EMTC_CONFIG_PRACH_CE_LEVEL_0_NUMBER_OF_REPETITIONS_PER_ATTEMPT_TAG;
cfg->num_tlv++;
if (p->prach_StartingSubframe_r13) {
cfg->emtc_config.prach_ce_level_0_starting_subframe_periodicity.value = *p->prach_StartingSubframe_r13;
cfg->emtc_config.prach_ce_level_0_starting_subframe_periodicity.tl.tag = NFAPI_EMTC_CONFIG_PRACH_CE_LEVEL_0_STARTING_SUBFRAME_PERIODICITY_TAG;
cfg->num_tlv++;
}
cfg->emtc_config.prach_ce_level_0_hopping_enable.value = p->prach_HoppingConfig_r13;
cfg->emtc_config.prach_ce_level_0_hopping_enable.tl.tag = NFAPI_EMTC_CONFIG_PRACH_CE_LEVEL_0_HOPPING_ENABLE_TAG;
cfg->num_tlv++;
cfg->emtc_config.prach_ce_level_0_hopping_offset.value = cfg->rf_config.ul_channel_bandwidth.value-6;
cfg->emtc_config.prach_ce_level_0_hopping_offset.tl.tag = NFAPI_EMTC_CONFIG_PRACH_CE_LEVEL_0_HOPPING_OFFSET_TAG;
cfg->num_tlv++;
}
struct FreqHoppingParameters_r13 *ext4_freqHoppingParameters = radioResourceConfigCommonP->ext4->freqHoppingParameters_r13;
......@@ -391,9 +654,13 @@ void config_sib2(int Mod_idP,
break;
case FreqHoppingParameters_r13__interval_ULHoppingConfigCommonModeA_r13_PR_interval_FDD_r13:
cfg->emtc_config.pucch_interval_ulhoppingconfigcommonmodea.value = ext4_freqHoppingParameters->interval_ULHoppingConfigCommonModeA_r13->choice.interval_FDD_r13;
cfg->emtc_config.pucch_interval_ulhoppingconfigcommonmodea.tl.tag = NFAPI_EMTC_CONFIG_PUCCH_INTERVAL_ULHOPPINGCONFIGCOMMONMODEA_TAG;
cfg->num_tlv++;
break;
case FreqHoppingParameters_r13__interval_ULHoppingConfigCommonModeA_r13_PR_interval_TDD_r13:
cfg->emtc_config.pucch_interval_ulhoppingconfigcommonmodea.value = ext4_freqHoppingParameters->interval_ULHoppingConfigCommonModeA_r13->choice.interval_TDD_r13;
cfg->emtc_config.pucch_interval_ulhoppingconfigcommonmodea.tl.tag = NFAPI_EMTC_CONFIG_PUCCH_INTERVAL_ULHOPPINGCONFIGCOMMONMODEA_TAG;
cfg->num_tlv++;
break;
}
}
......@@ -404,9 +671,13 @@ void config_sib2(int Mod_idP,
break;
case FreqHoppingParameters_r13__interval_ULHoppingConfigCommonModeB_r13_PR_interval_FDD_r13:
cfg->emtc_config.pucch_interval_ulhoppingconfigcommonmodeb.value = ext4_freqHoppingParameters->interval_ULHoppingConfigCommonModeB_r13->choice.interval_FDD_r13;
cfg->emtc_config.pucch_interval_ulhoppingconfigcommonmodeb.tl.tag = NFAPI_EMTC_CONFIG_PUCCH_INTERVAL_ULHOPPINGCONFIGCOMMONMODEB_TAG;
cfg->num_tlv++;
break;
case FreqHoppingParameters_r13__interval_ULHoppingConfigCommonModeB_r13_PR_interval_TDD_r13:
cfg->emtc_config.pucch_interval_ulhoppingconfigcommonmodeb.value = ext4_freqHoppingParameters->interval_ULHoppingConfigCommonModeB_r13->choice.interval_TDD_r13;
cfg->emtc_config.pucch_interval_ulhoppingconfigcommonmodeb.tl.tag = NFAPI_EMTC_CONFIG_PUCCH_INTERVAL_ULHOPPINGCONFIGCOMMONMODEB_TAG;
cfg->num_tlv++;
break;
}
}
......@@ -415,6 +686,10 @@ void config_sib2(int Mod_idP,
}
void config_dedicated(int Mod_idP,
int CC_idP,
uint16_t rnti,
......@@ -480,18 +755,26 @@ int rrc_mac_config_req_eNB(module_id_t Mod_idP,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_RRC_MAC_CONFIG, VCD_FUNCTION_IN);
if (mib!=NULL) {
if (RC.mac == NULL) l2_init_eNB();
LOG_E(MAC, "RC.mac:%p mib:%p\n", RC.mac, mib);
if (RC.mac == NULL) {
LOG_E(MAC, "%s() %s:%d\n", __FUNCTION__, __FILE__, __LINE__);
l2_init_eNB();
LOG_E(MAC, "%s() %s:%d\n", __FUNCTION__, __FILE__, __LINE__);
mac_top_init_eNB();
LOG_E(MAC, "%s() %s:%d\n", __FUNCTION__, __FILE__, __LINE__);
}
RC.mac[Mod_idP]->common_channels[CC_idP].mib = mib;
RC.mac[Mod_idP]->common_channels[CC_idP].physCellId = physCellId;
RC.mac[Mod_idP]->common_channels[CC_idP].p_eNB = p_eNB;
RC.mac[Mod_idP]->common_channels[CC_idP].Ncp = Ncp;
RC.mac[Mod_idP]->common_channels[CC_idP].eutra_band = eutra_band;
RC.mac[Mod_idP]->common_channels[CC_idP].dl_CarrierFreq = dl_CarrierFreq;
if (mib!=NULL) {
LOG_E(MAC, "%s() %s:%d\n", __FUNCTION__, __FILE__, __LINE__);
RC.mac[Mod_idP]->common_channels[CC_idP].mib = mib;
RC.mac[Mod_idP]->common_channels[CC_idP].physCellId = physCellId;
RC.mac[Mod_idP]->common_channels[CC_idP].p_eNB = p_eNB;
RC.mac[Mod_idP]->common_channels[CC_idP].Ncp = Ncp;
RC.mac[Mod_idP]->common_channels[CC_idP].eutra_band = eutra_band;
RC.mac[Mod_idP]->common_channels[CC_idP].dl_CarrierFreq = dl_CarrierFreq;
LOG_I(MAC,
"Configuring MIB for instance %d, CCid %d : (band %d,N_RB_DL %d,Nid_cell %d,p %d,DL freq %u,phich_config.resource %d, phich_config.duration %d)\n",
......@@ -520,7 +803,6 @@ int rrc_mac_config_req_eNB(module_id_t Mod_idP,
);
mac_init_cell_params(Mod_idP,CC_idP);
}
if (schedulingInfoList!=NULL) {
RC.mac[Mod_idP]->common_channels[CC_idP].tdd_Config = tdd_Config;
RC.mac[Mod_idP]->common_channels[CC_idP].schedulingInfoList = schedulingInfoList;
......@@ -560,6 +842,7 @@ int rrc_mac_config_req_eNB(module_id_t Mod_idP,
}
} // mib != NULL
// SRB2_lchan_config->choice.explicitValue.ul_SpecificParameters->logicalChannelGroup
......@@ -635,6 +918,7 @@ int rrc_mac_config_req_eNB(module_id_t Mod_idP,
}
}
LOG_E(MAC, "%s() %s:%d\n", __FUNCTION__, __FILE__, __LINE__);
if (pmch_InfoList != NULL) {
// LOG_I(MAC,"DUY: lcid when entering rrc_mac config_req is %02d\n",(pmch_InfoList->list.array[0]->mbms_SessionInfoList_r9.list.array[0]->logicalChannelIdentity_r9));
......@@ -659,19 +943,75 @@ int rrc_mac_config_req_eNB(module_id_t Mod_idP,
#endif
if (radioResourceConfigCommon!=NULL) {
AssertFatal(RC.mac[Mod_idP]->if_inst->PHY_config_req != NULL,"if_inst->phy_config_request is null\n");
PHY_Config_t phycfg;
phycfg.Mod_id = Mod_idP;
phycfg.CC_id = CC_idP;
phycfg.cfg = &RC.mac[Mod_idP]->config[CC_idP];
if (RC.mac[Mod_idP]->if_inst->PHY_config_req) RC.mac[Mod_idP]->if_inst->PHY_config_req(&phycfg);
LOG_E(MAC, "%s() %s:%d RC.mac[Mod_idP]->if_inst->PHY_config_req:%p\n", __FUNCTION__, __FILE__, __LINE__, RC.mac[Mod_idP]->if_inst->PHY_config_req);
// if in nFAPI mode
if (
(nfapi_mode == 1 || nfapi_mode == 2) &&
(RC.mac[Mod_idP]->if_inst->PHY_config_req == NULL)
)
{
while(RC.mac[Mod_idP]->if_inst->PHY_config_req == NULL) {
// DJP AssertFatal(RC.mac[Mod_idP]->if_inst->PHY_config_req != NULL,"if_inst->phy_config_request is null\n");
usleep(100 * 1000);
printf("Waiting for PHY_config_req\n");
}
}
PHY_Config_t phycfg;
phycfg.Mod_id = Mod_idP;
phycfg.CC_id = CC_idP;
phycfg.cfg = &RC.mac[Mod_idP]->config[CC_idP];
LOG_E(MAC, "%s() %s:%d\n", __FUNCTION__, __FILE__, __LINE__);
if (RC.mac[Mod_idP]->if_inst->PHY_config_req) RC.mac[Mod_idP]->if_inst->PHY_config_req(&phycfg);
LOG_E(MAC, "%s() %s:%d\n", __FUNCTION__, __FILE__, __LINE__);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_RRC_MAC_CONFIG, VCD_FUNCTION_OUT);
return(0);
return(0);
}
/*
// P: New function supporting the MAC interface
void config_sib1_ue()
{
}
// P: New function supporting the MAC interface
void config_sib2_ue()
{
}
// P: New function supporting the MAC interface
void config_meas_ue()
{
}
// P: New function supporting the MAC interface
// to substitute call to phy_config_afterHO_ue().
void config_afterHO_ue()
{
}
// P: New function supporting the MAC interface
void config_sib13_ue()
{
}
// P: New function supporting the MAC interface
void config_dedicated_ue()
{
}
*/
int
rrc_mac_config_req_ue(
......@@ -1021,6 +1361,9 @@ rrc_mac_config_req_ue(
#endif
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_RRC_MAC_CONFIG, VCD_FUNCTION_OUT);
// Panos: Call to the phy_config_request_ue() function of the interface to copy the UE_PHY_Config_t interface
// configuration to the PHY common and dedicated configuration originating from RRC.
return(0);
}
......@@ -235,6 +235,33 @@ typedef struct {
uint8_t R:2;
} __attribute__((__packed__))SCH_SUBHEADER_FIXED;
// Panos:
/*!\brief MAC subheader long with 24bit DST field */
typedef struct {
uint8_t V:4; //Version number: Possible values "0001", "0010", "0011" based on TS36.321 section 6.2.3.
uint32_t SRC:24; //Prose UE source ID. Size 24 bits.
uint32_t DST:24; //Prose UE destination ID. Size 16 or 24 bits.
uint8_t LCID:5;
uint8_t L:7; // Length field indicating the size of the corresponding SDU in byes. Not sure about the size of this field (7).
uint8_t F:1;
uint8_t E:1;
uint8_t R:1;
}__attribute__((__packed__))SLSCH_SUBHEADER_24_Bit_DST;
/*!\brief MAC subheader long with 16bit DST field */
typedef struct {
uint8_t V:4; //Version number: Possible values "0001", "0010", "0011" based on TS36.321 section 6.2.3.
uint32_t SRC:24; //Prose UE source ID. Size 24 bits.
uint32_t DST:16; //Prose UE destination ID. Size 16 or 24 bits.
uint8_t LCID:5;
uint8_t L:7; // Length field indicating the size of the corresponding SDU in byes. Not sure about the size of this field (7).
uint8_t F:1;
uint8_t E:1;
uint8_t R:1;
}__attribute__((__packed__))SLSCH_SUBHEADER_16_Bit_DST;
/*!\brief mac control element: short buffer status report for a specific logical channel group ID*/
typedef struct {
uint8_t Buffer_size:6; // octet 1 LSB
......@@ -250,6 +277,30 @@ typedef struct {
uint8_t Buffer_size0:6;
} __attribute__((__packed__))BSR_LONG;
// Panos:
/*!\brief mac control element: sidelink buffer status report */
typedef struct {
uint8_t DST_1:4;
uint8_t LCGID_1: 2;
uint8_t Buffer_size_1:6;
uint8_t DST_2:4;
uint8_t LCGID_2: 2;
uint8_t Buffer_size_2:6;
}__attribute__((__packed__))SL_BSR;
/*!\brief mac control element: truncated sidelink buffer status report */
typedef struct {
uint8_t DST:4;
uint8_t LCGID: 2;
uint8_t Buffer_size:6;
uint8_t R1:1;
uint8_t R2:1;
uint8_t R3:1;
uint8_t R4:1;
}__attribute__((__packed__))SL_BSR_Truncated;
#define BSR_LONG_SIZE (sizeof(BSR_LONG))
/*!\brief mac control element: timing advance */
typedef struct {
......@@ -1228,6 +1279,17 @@ typedef struct {
MeasGapConfig_t *measGapConfig;
/// Pointers to LogicalChannelConfig indexed by LogicalChannelIdentity. Note NULL means LCHAN is inactive.
LogicalChannelConfig_t *logicalChannelConfig[MAX_NUM_LCID];
/*/// Panos: Pointer to IF_Module_UE instance of the UE
IF_Module_UE_t *if_inst_ue;
/// Panos: UE_MAC interface: Config request structure.
UE_PHY_Config_t UE_config;
/// Panos: UE_MAC interface: UL Config Request Structure
UE_MAC_ul_config_request_t UL_req_ue[MAX_NUM_CCs];
/// Panos: UE_MAC interface: UL Transmission request structure.
UE_MAC_tx_request_t UL_TX_req[MAX_NUM_CCs];*/
/// Scheduling Information
UE_SCHEDULING_INFO scheduling_info;
/// Outgoing CCCH pdu for PHY
......@@ -1319,7 +1381,27 @@ typedef struct {
/// UE BCCH rx processing time including RLC interface (mac_rrc_data_ind)
time_stats_t rx_si;
/// UE PCCH rx processing time including RLC interface (mac_rrc_data_ind)
time_stats_t rx_p;
time_stats_t rx_p;
/// Panos: Mutex for nfapi UL_INFO
pthread_mutex_t UL_INFO_mutex;
/// Panos: UE_Mode variable should be used in the case of Phy_stub operation since we won't have access to PHY_VARS_UE
/// where the UE_mode originally is for the full stack operation mode. The transitions between the states of the UE_Mode
/// will be triggered within phy_stub_ue.c in this case
UE_MODE_t UE_mode[NUMBER_OF_CONNECTED_eNB_MAX];
/// Panos: Phy_stub mode: Boolean variable to distinguish whether a Msg3 or a regular ULSCH data pdu should be generated
/// after the reception of NFAPI_UL_CONFIG_ULSCH_PDU_TYPE.
uint8_t first_ULSCH_Tx;
/// Panos: Pointers to config_request types. Used from nfapi callback functions.
nfapi_dl_config_request_t* dl_config_req;
nfapi_ul_config_request_t* ul_config_req;
nfapi_hi_dci0_request_t* hi_dci0_req;
nfapi_tx_request_t* tx_req;
eth_params_t eth_params_n;
} UE_MAC_INST;
/*! \brief ID of the neighboring cells used for HO*/
typedef struct {
......