Commit 70b6a896 authored by nguimfac's avatar nguimfac

add directory description

parent 17525b52
This diff is collapsed.
......@@ -2,4 +2,20 @@ SEMESTER PROJECT
Title: Porting Avatar to the Sidekick Basic kit for LinkIt ONE and fernvale,
the project is divided into two directories (fernvale linkit) for each device,
each directory should contain the required configure files for linkit ONE and fernvale
each directory should contain the required configure files for linkit ONE and fernvale.
fernavale_linkit-one
|
|--> fernvale
| |
| |--> avatar (files for the emulator)
| |
| |--> openocd (files for remote debbuging)
|
|--> linkIT
| |
| |--> avatar
| |
| |--> openocd
|
|--> note
SEMESTER PROJECT
Title: Porting Avatar to the Sidekick Basic kit for LinkIt ONE and fernvale,
the project is divided into two directories (fernvale linkit) for each device,
each directory should contain the required configure files for linkit ONE and fernvale.
fernavale_linkit-one
|
|--> fernvale
| |
| |--> avatar (files for the emulator)
| |
| |--> openocd (files for remote debbuging)
|
|--> linkIT
| |
| |--> avatar
| |
| |--> openocd
This diff is collapsed.
source [find interface/jlink.cfg] #mod enable the jlink debbug interface
#mod source [find interface/ftdi/olimex-arm-usb-ocd-h.cfg] #mod for olimex inteface
#mod interface ft2232
#mod ft2232_layout axm0432_jtag
#mod ft2232_vid_pid 0x0403 0x6010
# Change the default telnet port...
telnet_port 4444
# GDB connects here
gdb_port 3333
# GDB can also flash my flash!
#gdb_memory_map enable
#gdb_flash_program enable
source [find bitsbytes.tcl]
source [find cpu/arm/arm966.tcl] #mod ****
#mod source [find cpu/arm/arm7tdmi.tcl]
source [find memory.tcl]
source [find mmr_helpers.tcl]
set CHIP_MAKER mediatek # freescale #mod not sure about that
set CHIP_FAMILY mt2502a # mc1322x #mod not sure
set CHIP_NAME mt2502a # mc13224 #mod not sure
set N_RAM 1
set RAM(0,BASE) 0x00400000
set RAM(0,LEN) 0x18000
set RAM(0,HUMAN) "internal SRAM"
set RAM(0,TYPE) "ram"
set RAM(0,RWX) $RWX_RWX
set RAM(0,ACCESS_WIDTH) $ACCESS_WIDTH_ANY
# I AM LAZY... I create 1 region for all MMRs.
set N_MMREGS 1
set MMREGS(0,CHIPSELECT) -1
set MMREGS(0,BASE) 0x80000000
set MMREGS(0,LEN) 0x00030000
set MMREGS(0,HUMAN) "mm-regs"
set MMREGS(0,TYPE) "mmr"
set MMREGS(0,RWX) $RWX_RW
set MMREGS(0,ACCESS_WIDTH) $ACCESS_WIDTH_ANY
set N_XMEM 0
#
######################
# Target configuration
######################
#
set _CHIPNAME mt2502a
set _ENDIAN little
set _CPUTAPID 0x17700f0f #mod 0x1f1f001d
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x01 -irmask 0x0f -expected-id $_CPUTAPID
#jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x01 -irmask 0x03 -expected-id $_CPUTAPID # from my own file
# reset_config trst_and_srst separate # from my own file
reset_config srst_only
jtag_ntrst_delay 200
#jtag_rclk 0
#mod adapter_khz 2000
adapter_khz 2
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
target create $_TARGETNAME arm966 -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm966
#mod target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
#$_TARGETNAME -variant arm7tdmi
#$_TARGETNAME configure -event reset-init {
# sleep 100
# soft_reset_halt
# mww 0x80000018 0x50000000
# mww 0x80000000 0x00000f00
# mww 0x80000008 0x00000e00
# mww 0x80005000 0x00006013
# # mww 0x80005018 0x017f270f
# # mww 0x80005008 0x55
# mww 0x80005018 0x07A9270F
# mww 0x80005008 0x55
# sleep 100
#}
# Internal sram memory
$_TARGETNAME configure -work-area-virt 0x00408000 -work-area-phys 0x00408000 -work-area-size 0x1000 -work-area-backup 1
proc run {file} {
puts "loading $file into location 0x00400000 and executing..."
soft_reset_halt
load_image $file 0x00400000
resume 0x00400000
}
#flash bank mc1322x 0 0 0 0 $_TARGETNAME
$_TARGETNAME configure -event gdb-attach my_attach_proc
$_TARGETNAME configure -event gdb-attach {
echo "gdb attaching..."
halt
#soft_reset_halt
}
#!/bin/sh
# this file is a simple script to run avatar-pandora
# Set the paths the files on the system.
#PYTHONPATH=/home/william/avatar-pandora/avatar-python QEMU_S2E=/home/william/avatar-pandora/s2e-build/qemu-debug/arm-s2e-softmmu/qemu-system-arm QEMU_ARM=/home/william/avatar-pandora/s2e-build/qemu-release/arm-softmmu/qemu-system-arm UBOOT_BINARY=u-boot python3 test_system.py
export PYTHONPATH=/home/william/avatar-pandora/avatar-python
export QEMU_ARM=/home/william/avatar-pandora/s2e-build/qemu-debug/arm-s2e-softmmu/qemu-system-arm
export UBOOT_BINARY=u-boot
export QEMU_S2E=/home/william/avatar-pandora/s2e-build/qemu-debug/arm-s2e-softmmu/qemu-system-arm
python3 qemu_integratorcp_uboot.py
function end_analysis_region (state, plg)
print ("exiting function, stopping here !\n")
plg:setGenerateTestcase(true)
plg:generate_testcase_on_kill(false)
plg:setKill(true)
end
function end_analysis_region (state, plg)
print ("exiting function, stopping here !\n")
plg:setGenerateTestcase(true)
plg:setKill(true)
end
function reset (state, plg)
print ("reset !!!!\n")
plg:setGenerateTestcase(true)
plg:generate_testcase_on_kill(true)
plg:setKill(true)
end
function undef_instr (state, plg)
print ("Oups hit undef instr at ".. string.format("%x", state:readRegister("lr")).."!!\n")
plg:setKill(true)
end
function skip_uart (state, plg)
if plg:isCall() then
print("skipping uart code")
--plg:setSkip(true)
end
end
function make_pkt_symbolic (state, plg)
print ("making pkt symbolic\n")
buff = 0x4033aa
for i = 0,32 do
state:writeMemorySymb("pkt_buff", buff+i, 1)
end
end
function make_pkt_symbolic (state, plg)
print ("making pkt symbolic\n")
--buff = 0x4033aa
buff = 0x4033D6 -- DataRX +2
for i = 0,32 do
state:writeMemorySymb("pkt_buff", buff+i, 1)
end
end
### board_file.cfg ###
# Chip: MT6202A for fernvale, little endian
set CHIPNAME mt2502a
set ENDIAN little
# source target file that does most of the config in init_targets
source [find target/mt2502a.cfg]
### board_file.cfg ###
# Chip: MT6202A for fernvale, little endian
set CHIPNAME mt2502a
set ENDIAN little
# source target file that does most of the config in init_targets
source [find target/mt2502a.cfg]
# on return: _TARGETNAME = video.cpu
# other commands can refer to the "video.cpu" target.
#$_TARGETNAME configure .... events for this CPU..
#
# Segger J-Link
#
# http://www.segger.com/jlink.html
#
interface jlink
# The serial number can be used to select a specific interface in case more than one
# is connected to the host.
#
# Segger software omits leading zeros in serial number displays,
# OpenOCD requires them.
#
# Example: Select J-Link with serial 123456789
#
# jlink serial 000123456789
#
# Olimex ARM-USB-OCD-H
#
# http://www.olimex.com/dev/arm-usb-ocd-h.html
#
interface ftdi
ftdi_device_desc "Olimex OpenOCD JTAG ARM-USB-OCD-H"
ftdi_vid_pid 0x15ba 0x002b
ftdi_layout_init 0x0908 0x0b1b
ftdi_layout_signal nSRST -oe 0x0200
ftdi_layout_signal nTRST -data 0x0100
ftdi_layout_signal LED -data 0x0800
#adapter_khz 1
#!/bin/sh
# Run openocd with jlink.cfg
sudo openocd -f /usr/local/share/openocd/scripts/interface/jlink.cfg -f /usr/local/share/openocd/scripts/board/fernvale.cfg -c "adapter_khz 1" -c "transport select jtag"
\ No newline at end of file
#!/bin/sh
# Run openocd with jlink.cfg
sudo openocd -f /usr/local/share/openocd/scripts/interface/jlink.cfg -f /usr/local/share/openocd/scripts/board/linkIT.cfg -c "adapter_khz 1" -c "transport select jtag"
#!/bin/sh
# Run openocd with olimex using ftdi library
sudo openocd -f /usr/local/share/openocd/scripts/interface/ftdi/olimex-arm-usb-ocd-h.cfg -f /usr/local/schare/openocd/scripts/board/linkIT.cfg -c "adapter_khz 1" -c "transport select jtag"
\ No newline at end of file
# Boards may override chip names, perhaps based on role,
# but the default should match what the vendor uses
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME mt2502a
}
# ONLY use ENDIAN with targets that can change it.
if { [info exists ENDIAN] } {
set _ENDIAN $ENDIAN
} else {
set _ENDIAN little
}
# TAP identifiers may change as chips mature, for example with
# new revision fields (the "3" here). Pick a good default; you
# can pass several such identifiers to the "jtag newtap" command.
if { [info exists CPUTAPID ] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x17700f0f
}
# TRST and SRST both exist, and can be controlled independently
reset_config trst_and_srst separate
#reset_config none separate
# Configure the existing TAP
# In the simplest case the chip has only one TAP, probably for a CPU
# or FPGA. The config file for the Atmel AT91SAM7X256 looks (in part)
#like this:
# Irlen, Ircapture and Irmask can be seen by typing the command
# scan_chain from telnet localhost 4444
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x01 -irmask 0x03 -expected-id $_CPUTAPID
# # Create the ".cpu" target
# After adding a TAP for a CPU, you should set it up so that GDB and
# other commands can use it.
# *** see: http://openocd.org/doc/html/CPU-Configuration.html#CPU-Configuration
# the target configuration file should define _TARGETNAME (or
#_TARGETNAME0 etc) and use it later on when defining debug targets:
# arm7tdmi ???? or arm7ejstm
set _TARGETNAME $_CHIPNAME.cpu
#target create $_TARGETNAME arm7tdmi -chain-position $_TARGETNAME
#target create $_TARGETNAME arm966e -chain-position $_TARGETNAME
target create $_TARGETNAME arm966 -endian $_ENDIAN -chain-position $_TARGETNAME
$_TARGETNAME configure -event reset-init {
# disable watchdog
mww 0xfffffd44 0x00008000
# enable user reset
mww 0xfffffd08 0xa5000001
# CKGR_MOR : enable the main oscillator
mww 0xfffffc20 0x00000601
sleep 10
# CKGR_PLLR: 96.1097 MHz
mww 0xfffffc2c 0x00481c0e
sleep 10
# PMC_MCKR : MCK = PLL / 2 ~= 48 MHz
mww 0xfffffc30 0x00000007
sleep 10
# MC_FMR: flash mode (FWS=1,FMCN=60)
mww 0xffffff60 0x003c0100
sleep 100
}
#Work areas are small RAM areas associated with CPU targets. They are
# used by OpenOCD to speed up downloads, and to download small snippets
# of code to program flash chips. If the chip includes a form of
#“on-chip-ram” - and many do - define a work area if you can.
#Again using the at91sam7 as an example, this can look like:
$_TARGETNAME configure -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0
#flash bank <driver> <base_addr> <size> <chip_width> <bus_width> <target_number> [<target_name> <banks> <sectors_per_bank> <pages_per_sector> <page_size> <num_nvmbits> <ext_freq_khz>]
set _FLASHNAME $_CHIPNAME.flash
#flash bank $_FLASHNAME mt2502a 0 0 0 0 $_TARGETNAME 0 0 0 0 0 0 0 18432
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