Commit f6cab340 authored by Raphael Defosseux's avatar Raphael Defosseux
Browse files

Merge branch 'develop_integration_2019_w08' into 'develop'

Develop integration 2019 week 08

See merge request oai/openairinterface5g!517
parents 9286b58f 929d71d0
......@@ -62,3 +62,4 @@ v1.0.0 -> January 2019. This version first implements the architectural split de
New tools: config library, telnet server, ...
A lot of bugfixes and a proper automated Continuous Integration process validates contributions.
v1.0.1 -> February 2019: Bug fix for the UE L1 simulator.
v1.0.2 -> February 2019: Full OAI support for 3.13.1 UHD
......@@ -94,14 +94,21 @@ function build_on_vm {
echo "############################################################"
echo "Creating VM ($VM_NAME) on Ubuntu Cloud Image base"
echo "############################################################"
acquire_vm_create_lock
uvt-kvm create $VM_NAME release=xenial --memory $VM_MEMORY --cpu $VM_CPU --unsafe-caching --template ci-scripts/template-host.xml
fi
echo "Waiting for VM to be started"
uvt-kvm wait $VM_NAME --insecure
echo "Waiting for VM to be started"
uvt-kvm wait $VM_NAME --insecure
VM_IP_ADDR=`uvt-kvm ip $VM_NAME`
echo "$VM_NAME has for IP addr = $VM_IP_ADDR"
release_vm_create_lock
else
echo "Waiting for VM to be started"
uvt-kvm wait $VM_NAME --insecure
VM_IP_ADDR=`uvt-kvm ip $VM_NAME`
echo "$VM_NAME has for IP addr = $VM_IP_ADDR"
VM_IP_ADDR=`uvt-kvm ip $VM_NAME`
echo "$VM_NAME has for IP addr = $VM_IP_ADDR"
fi
echo "############################################################"
echo "Copying GIT repo into VM ($VM_NAME)"
......
......@@ -67,6 +67,15 @@ syntaxError:openair1/SIMULATION/LTE_PHY/dlsim_tm4.c
// omg, otg commented out in cmakelist to be cleaned up definitely?
arrayIndexOutOfBounds:openair2/UTIL/OMG/omg.c
uninitvar:openair2/UTIL/OTG/otg_rx_socket.c
//-----------------------------------------------------------------------------
// cppcheck is not able to understand that buf is initialized at the first
// iteration of the loop.
nullPointer:common/utils/T/local_tracer.c:243
//-----------------------------------------------------------------------------
// once again cppcheck is not to understand that fds is initialized in the
// first iteration of the loop
nullPointer:common/utils/T/tracer/multi.c:264
nullPointer:common/utils/T/tracer/multi.c:265
//
//*****************************************************************************
//
......
......@@ -49,6 +49,35 @@ function create_usage {
echo ""
}
function acquire_vm_create_lock {
local FlockFile="/tmp/vmclone.lck"
local unlocked="0"
touch ${FlockFile} 2>/dev/null
if [[ $? -ne 0 ]]
then
echo "Cannot access lock file ${FlockFile}"
exit 2
fi
while [ $unlocked -eq 0 ]
do
exec 5>${FlockFile}
flock -nx 5
if [[ $? -ne 0 ]]
then
echo "Another instance of VM creation is running"
sleep 10
else
unlocked="1"
fi
done
chmod 666 ${FlockFile} 2>/dev/null
}
function release_vm_create_lock {
local FlockFile="/tmp/vmclone.lck"
rm -Rf ${FlockFile}
}
function create_vm {
echo "############################################################"
echo "OAI CI VM script"
......@@ -60,10 +89,12 @@ function create_vm {
echo "############################################################"
echo "Creating VM ($VM_NAME) on Ubuntu Cloud Image base"
echo "############################################################"
acquire_vm_create_lock
uvt-kvm create $VM_NAME release=xenial --memory $VM_MEMORY --cpu $VM_CPU --unsafe-caching --template ci-scripts/template-host.xml
echo "Waiting for VM to be started"
uvt-kvm wait $VM_NAME --insecure
VM_IP_ADDR=`uvt-kvm ip $VM_NAME`
echo "$VM_NAME has for IP addr = $VM_IP_ADDR"
release_vm_create_lock
}
......@@ -317,11 +317,18 @@ function install_epc_on_vm {
echo "############################################################"
echo "Creating test EPC VM ($LOC_EPC_VM_NAME) on Ubuntu Cloud Image base"
echo "############################################################"
acquire_vm_create_lock
uvt-kvm create $LOC_EPC_VM_NAME release=xenial --unsafe-caching
echo "Waiting for VM to be started"
uvt-kvm wait $LOC_EPC_VM_NAME --insecure
release_vm_create_lock
else
echo "Waiting for VM to be started"
uvt-kvm wait $LOC_EPC_VM_NAME --insecure
fi
uvt-kvm wait $LOC_EPC_VM_NAME --insecure
local LOC_EPC_VM_IP_ADDR=`uvt-kvm ip $LOC_EPC_VM_NAME`
echo "$LOC_EPC_VM_NAME has for IP addr = $LOC_EPC_VM_IP_ADDR"
scp -o StrictHostKeyChecking=no /etc/apt/apt.conf.d/01proxy ubuntu@$LOC_EPC_VM_IP_ADDR:/home/ubuntu
......
......@@ -46,7 +46,7 @@ void unregister_notifier(gui *_g, unsigned long notifier_id) {
if (g->notifiers[i].id == notifier_id) break;
if (i == g->notifiers_count)
ERR("%s:%d: notifier_id %ld not found\n", __FILE__,__LINE__,notifier_id);
ERR("%s:%d: notifier_id %lu not found\n", __FILE__,__LINE__,notifier_id);
free(g->notifiers[i].notification);
memmove(g->notifiers + i, g->notifiers + i + 1,
......
......@@ -195,5 +195,8 @@ int main(int n, char **v)
handle_event(h, e);
}
free(on_off_name);
free(on_off_action);
return 0;
}
......@@ -273,6 +273,6 @@ void PUTX2(OBUF *o, int i) {
void PUTUL(OBUF *o, unsigned long l) {
char s[128];
sprintf(s, "%ld", l);
sprintf(s, "%lu", l);
PUTS(o, s);
}
......@@ -812,9 +812,6 @@ void phy_scope_UE(FD_lte_phy_scope_ue *form,
free(bit1);
free(bit_pdcch);
free(llr_pdcch);
for (arx=0;arx<nb_antennas_rx;arx++) {
free(chest_t_abs[arx]);
}
//This is done to avoid plotting old data when TB0 is disabled, and TB1 is mapped onto CW0
/*if (phy_vars_ue->transmission_mode[eNB_id]==3 && phy_vars_ue->transmission_mode[eNB_id]==4){
......
This diff is collapsed.
......@@ -295,7 +295,8 @@ void dlsch_scheduler_pre_ue_select_fairRR(
CC_id,
UE_id,
subframeP,
S_DL_NONE);
S_DL_NONE,
rnti);
end_flag[CC_id] = 1;
break;
}
......@@ -418,7 +419,8 @@ void dlsch_scheduler_pre_ue_select_fairRR(
CC_id,
UE_id,
subframeP,
S_DL_NONE);
S_DL_NONE,
rnti);
end_flag[CC_id] = 1;
break;
}
......@@ -541,7 +543,8 @@ void dlsch_scheduler_pre_ue_select_fairRR(
CC_id,
UE_id,
subframeP,
S_DL_NONE);
S_DL_NONE,
rnti);
end_flag[CC_id] = 1;
break;
}
......@@ -810,7 +813,8 @@ schedule_ue_spec_fairRR(module_id_t module_idP,
unsigned char ta_len = 0;
unsigned char sdu_lcids[NB_RB_MAX], lcid, offset, num_sdus = 0;
uint16_t nb_rb, nb_rb_temp, nb_available_rb;
uint16_t TBS, j, sdu_lengths[NB_RB_MAX], rnti, padding = 0, post_padding = 0;
uint16_t TBS, j, sdu_lengths[NB_RB_MAX], padding = 0, post_padding = 0;
rnti_t rnti = 0;
unsigned char dlsch_buffer[MAX_DLSCH_PAYLOAD_BYTES];
unsigned char round = 0;
unsigned char harq_pid = 0;
......@@ -1215,8 +1219,11 @@ schedule_ue_spec_fairRR(module_id_t module_idP,
}
add_ue_dlsch_info(module_idP,
CC_id, UE_id, subframeP,
S_DL_SCHEDULED);
CC_id,
UE_id,
subframeP,
S_DL_SCHEDULED,
rnti);
//eNB_UE_stats->dlsch_trials[round]++;
UE_list->eNB_UE_stats[CC_id][UE_id].
num_retransmission += 1;
......@@ -1678,10 +1685,10 @@ schedule_ue_spec_fairRR(module_id_t module_idP,
if (opt_enabled == 1) {
trace_pdu(DIRECTION_DOWNLINK, (uint8_t *)UE_list->DLSCH_pdu[CC_id][0][UE_id].payload[0],
TBS, module_idP, WS_RA_RNTI, UE_RNTI(module_idP,UE_id),
TBS, module_idP, WS_RA_RNTI, UE_RNTI(module_idP, UE_id),
eNB->frame, eNB->subframe,0,0);
LOG_D(OPT,"[eNB %d][DLSCH] CC_id %d Frame %d rnti %x with size %d\n",
module_idP, CC_id, frameP, UE_RNTI(module_idP,UE_id), TBS);
module_idP, CC_id, frameP, UE_RNTI(module_idP, UE_id), TBS);
}
T(T_ENB_MAC_UE_DL_PDU_WITH_DATA, T_INT(module_idP), T_INT(CC_id), T_INT(rnti), T_INT(frameP), T_INT(subframeP),
......@@ -1691,7 +1698,8 @@ schedule_ue_spec_fairRR(module_id_t module_idP,
CC_id,
UE_id,
subframeP,
S_DL_SCHEDULED);
S_DL_SCHEDULED,
rnti);
// store stats
eNB->eNB_stats[CC_id].dlsch_bytes_tx+=sdu_length_total;
eNB->eNB_stats[CC_id].dlsch_pdus_tx+=1;
......
......@@ -441,7 +441,7 @@ void init_ue_sched_info(void);
void add_ue_ulsch_info(module_id_t module_idP, int CC_id, int UE_id,
sub_frame_t subframe, UE_ULSCH_STATUS status);
void add_ue_dlsch_info(module_id_t module_idP, int CC_id, int UE_id,
sub_frame_t subframe, UE_DLSCH_STATUS status);
sub_frame_t subframe, UE_DLSCH_STATUS status, rnti_t rnti);
int find_UE_id(module_id_t module_idP, rnti_t rnti);
int find_RA_id(module_id_t mod_idP, int CC_idP, rnti_t rntiP);
rnti_t UE_RNTI(module_id_t module_idP, int UE_id);
......@@ -1209,7 +1209,6 @@ void fill_nfapi_dlsch_config(eNB_MAC_INST * eNB,
void fill_nfapi_harq_information(module_id_t module_idP,
int CC_idP,
uint16_t rntiP,
uint16_t absSFP,
nfapi_ul_config_harq_information *
harq_information, uint8_t cce_idxP);
......@@ -1221,9 +1220,10 @@ void fill_nfapi_ulsch_harq_information(module_id_t module_idP,
sub_frame_t subframeP);
uint16_t fill_nfapi_uci_acknak(module_id_t module_idP,
int CC_idP,
uint16_t rntiP,
uint16_t absSFP, uint8_t cce_idxP);
int CC_idP,
uint16_t rntiP,
uint16_t absSFP,
uint8_t cce_idxP);
void fill_nfapi_dl_dci_1A(nfapi_dl_config_request_pdu_t * dl_config_pdu,
uint8_t aggregation_level,
......
......@@ -460,7 +460,12 @@ void decode_slice_positioning(module_id_t Mod_idP,
// This fuction sorts the UE in order their dlsch buffer and CQI
void sort_UEs(module_id_t Mod_idP, int slice_idx, int frameP, sub_frame_t subframeP) {
void
sort_UEs(module_id_t Mod_idP,
int slice_idx,
int frameP,
sub_frame_t subframeP)
{
int i;
int list[MAX_MOBILES_PER_ENB];
int list_size = 0;
......@@ -468,16 +473,13 @@ void sort_UEs(module_id_t Mod_idP, int slice_idx, int frameP, sub_frame_t subfra
UE_list_t *UE_list = &RC.mac[Mod_idP]->UE_list;
for (i = 0; i < MAX_MOBILES_PER_ENB; i++) {
if (UE_list->active[i] == FALSE) continue;
if (UE_RNTI(Mod_idP, i) == NOT_A_RNTI) continue;
if (UE_list->UE_sched_ctrl[i].ul_out_of_sync == 1) continue;
if (!ue_dl_slice_membership(Mod_idP, i, slice_idx)) continue;
list[list_size] = i;
list_size++;
if (UE_list->active[i] == TRUE &&
UE_RNTI(Mod_idP, i) != NOT_A_RNTI &&
UE_list->UE_sched_ctrl[i].ul_out_of_sync != 1 &&
ue_dl_slice_membership(Mod_idP, i, slice_idx)) {
list[list_size++] = i;
}
}
decode_sorting_policy(Mod_idP, slice_idx);
......@@ -1170,12 +1172,15 @@ dlsch_scheduler_pre_processor(module_id_t Mod_id,
uint8_t CC_id;
uint16_t i, j;
int min_rb_unit[NFAPI_CC_MAX];
slice_info_t *sli = &RC.mac[Mod_id]->slice_info;
eNB_MAC_INST *eNB = RC.mac[Mod_id];
slice_info_t *sli = &eNB->slice_info;
uint16_t (*nb_rbs_required)[MAX_MOBILES_PER_ENB] = sli->pre_processor_results[slice_idx].nb_rbs_required;
uint16_t (*nb_rbs_accounted)[MAX_MOBILES_PER_ENB] = sli->pre_processor_results[slice_idx].nb_rbs_accounted;
uint16_t (*nb_rbs_remaining)[MAX_MOBILES_PER_ENB] = sli->pre_processor_results[slice_idx].nb_rbs_remaining;
uint8_t (*MIMO_mode_indicator)[N_RBG_MAX] = sli->pre_processor_results[slice_idx].MIMO_mode_indicator;
UE_list_t *UE_list = &RC.mac[Mod_id]->UE_list;
UE_list_t *UE_list = &eNB->UE_list;
UE_sched_ctrl *ue_sched_ctl;
// int rrc_status = RRC_IDLE;
#ifdef TM5
......@@ -1191,7 +1196,10 @@ dlsch_scheduler_pre_processor(module_id_t Mod_id,
// Initialize scheduling information for all active UEs
memset(&sli->pre_processor_results[slice_idx], 0, sizeof(sli->pre_processor_results[slice_idx]));
// FIXME: After the memset above, some of the resets in reset() are redundant
dlsch_scheduler_pre_processor_reset(Mod_id, slice_idx, frameP, subframeP,
dlsch_scheduler_pre_processor_reset(Mod_id,
slice_idx,
frameP,
subframeP,
min_rb_unit,
nb_rbs_required,
rballoc_sub,
......@@ -1199,44 +1207,63 @@ dlsch_scheduler_pre_processor(module_id_t Mod_id,
mbsfn_flag); // FIXME: Not sure if useful
// STATUS
// Store the DLSCH buffer for each logical channel
store_dlsch_buffer(Mod_id, slice_idx, frameP, subframeP);
store_dlsch_buffer(Mod_id,
slice_idx,
frameP,
subframeP);
// Calculate the number of RBs required by each UE on the basis of logical channel's buffer
assign_rbs_required(Mod_id, slice_idx, frameP, subframeP, nb_rbs_required, min_rb_unit);
assign_rbs_required(Mod_id,
slice_idx,
frameP,
subframeP,
nb_rbs_required,
min_rb_unit);
// Sorts the user on the basis of dlsch logical channel buffer and CQI
sort_UEs(Mod_id, slice_idx, frameP, subframeP);
sort_UEs(Mod_id,
slice_idx,
frameP,
subframeP);
// ACCOUNTING
// This procedure decides the number of RBs to allocate
dlsch_scheduler_pre_processor_accounting(Mod_id, slice_idx, frameP, subframeP,
min_rb_unit,
nb_rbs_required,
nb_rbs_accounted);
dlsch_scheduler_pre_processor_accounting(Mod_id,
slice_idx,
frameP,
subframeP,
min_rb_unit,
nb_rbs_required,
nb_rbs_accounted);
// POSITIONING
// This procedure does the main allocation of the RBs
dlsch_scheduler_pre_processor_positioning(Mod_id, slice_idx,
min_rb_unit,
nb_rbs_required,
nb_rbs_accounted,
nb_rbs_remaining,
rballoc_sub,
MIMO_mode_indicator);
dlsch_scheduler_pre_processor_positioning(Mod_id,
slice_idx,
min_rb_unit,
nb_rbs_required,
nb_rbs_accounted,
nb_rbs_remaining,
rballoc_sub,
MIMO_mode_indicator);
// SHARING
// If there are available RBs left in the slice, allocate them to the highest priority UEs
if (RC.mac[Mod_id]->slice_info.intraslice_share_active) {
dlsch_scheduler_pre_processor_intraslice_sharing(Mod_id, slice_idx,
min_rb_unit,
nb_rbs_required,
nb_rbs_accounted,
nb_rbs_remaining,
rballoc_sub,
MIMO_mode_indicator);
if (eNB->slice_info.intraslice_share_active) {
dlsch_scheduler_pre_processor_intraslice_sharing(Mod_id,
slice_idx,
min_rb_unit,
nb_rbs_required,
nb_rbs_accounted,
nb_rbs_remaining,
rballoc_sub,
MIMO_mode_indicator);
}
#ifdef TM5
// This has to be revisited!!!!
for (CC_id = 0; CC_id < RC.nb_mac_CC[Mod_id]; CC_id++) {
COMMON_channels_t *cc = &RC.mac[Mod_id]->common_channels[CC_id];
COMMON_channels_t *cc = &eNB->common_channels[CC_id];
int N_RBG = to_rbg(cc->mib->message.dl_Bandwidth);
i1 = 0;
i2 = 0;
......@@ -1244,35 +1271,25 @@ dlsch_scheduler_pre_processor(module_id_t Mod_id,
for (j = 0; j < N_RBG; j++) {
if (MIMO_mode_indicator[CC_id][j] == 2) {
i1 = i1 + 1;
i1++;
} else if (MIMO_mode_indicator[CC_id][j] == 1) {
i2 = i2 + 1;
i2++;
} else if (MIMO_mode_indicator[CC_id][j] == 0) {
i3 = i3 + 1;
i3++;
}
}
if ((i1 < N_RBG) && (i2 > 0) && (i3 == 0)) {
PHY_vars_eNB_g[Mod_id][CC_id]->check_for_SUMIMO_transmissions =
PHY_vars_eNB_g[Mod_id][CC_id]->
check_for_SUMIMO_transmissions + 1;
}
if (i3 == N_RBG && i1 == 0 && i2 == 0) {
PHY_vars_eNB_g[Mod_id][CC_id]->FULL_MUMIMO_transmissions =
PHY_vars_eNB_g[Mod_id][CC_id]->FULL_MUMIMO_transmissions +
1;
}
if ((i1 < N_RBG) && (i3 > 0)) {
PHY_vars_eNB_g[Mod_id][CC_id]->check_for_MUMIMO_transmissions =
PHY_vars_eNB_g[Mod_id][CC_id]->
check_for_MUMIMO_transmissions + 1;
if (i1 < N_RBG) {
if (i2 > 0 && i3 == 0) {
PHY_vars_eNB_g[Mod_id][CC_id]->check_for_SUMIMO_transmissions = PHY_vars_eNB_g[Mod_id][CC_id]->check_for_SUMIMO_transmissions + 1;
} else if (i3 > 0) {
PHY_vars_eNB_g[Mod_id][CC_id]->check_for_MUMIMO_transmissions = PHY_vars_eNB_g[Mod_id][CC_id]->check_for_MUMIMO_transmissions + 1;
}
} else if (i3 == N_RBG && i1 == 0 && i2 == 0) {
PHY_vars_eNB_g[Mod_id][CC_id]->FULL_MUMIMO_transmissions = PHY_vars_eNB_g[Mod_id][CC_id]->FULL_MUMIMO_transmissions + 1;
}
PHY_vars_eNB_g[Mod_id][CC_id]->check_for_total_transmissions = PHY_vars_eNB_g[Mod_id][CC_id]->check_for_total_transmissions + 1;
PHY_vars_eNB_g[Mod_id][CC_id]->check_for_total_transmissions =
PHY_vars_eNB_g[Mod_id][CC_id]->check_for_total_transmissions +
1;
}
#endif
......@@ -1283,22 +1300,30 @@ dlsch_scheduler_pre_processor(module_id_t Mod_id,
for (i = 0; i < UE_num_active_CC(UE_list, UE_id); i++) {
CC_id = UE_list->ordered_CCids[i][UE_id];
//PHY_vars_eNB_g[Mod_id]->mu_mimo_mode[UE_id].dl_pow_off = dl_pow_off[UE_id];
COMMON_channels_t *cc = &RC.mac[Mod_id]->common_channels[CC_id];
COMMON_channels_t *cc = &eNB->common_channels[CC_id];
int N_RBG = to_rbg(cc->mib->message.dl_Bandwidth);
if (ue_sched_ctl->pre_nb_available_rbs[CC_id] > 0) {
LOG_D(MAC, "******************DL Scheduling Information for UE%d ************************\n", UE_id);
LOG_D(MAC, "dl power offset UE%d = %d \n", UE_id, ue_sched_ctl->dl_pow_off[CC_id]);
LOG_D(MAC, "***********RB Alloc for every subband for UE%d ***********\n", UE_id);
LOG_D(MAC, "******************DL Scheduling Information for UE%d ************************\n",
UE_id);
LOG_D(MAC, "dl power offset UE%d = %d \n",
UE_id,
ue_sched_ctl->dl_pow_off[CC_id]);
LOG_D(MAC, "***********RB Alloc for every subband for UE%d ***********\n",
UE_id);
for (j = 0; j < N_RBG; j++) {
//PHY_vars_eNB_g[Mod_id]->mu_mimo_mode[UE_id].rballoc_sub[UE_id] = rballoc_sub_UE[CC_id][UE_id][UE_id];
LOG_D(MAC, "RB Alloc for UE%d and Subband%d = %d\n", UE_id, j, ue_sched_ctl->rballoc_sub_UE[CC_id][j]);
LOG_D(MAC, "RB Alloc for UE%d and Subband%d = %d\n",
UE_id, j,
ue_sched_ctl->rballoc_sub_UE[CC_id][j]);
}
//PHY_vars_eNB_g[Mod_id]->mu_mimo_mode[UE_id].pre_nb_available_rbs = pre_nb_available_rbs[CC_id][UE_id];
LOG_D(MAC, "[eNB %d][SLICE %d]Total RBs allocated for UE%d = %d\n",
Mod_id, RC.mac[Mod_id]->slice_info.dl[slice_idx].id, UE_id,
Mod_id,
eNB->slice_info.dl[slice_idx].id,
UE_id,
ue_sched_ctl->pre_nb_available_rbs[CC_id]);
}
}
......
......@@ -107,7 +107,7 @@ int s1ap_eNB_handle_trace_start(uint32_t assoc_id,
{
S1AP_TraceStart_t *container;
S1AP_TraceStartIEs_t *ie;
struct s1ap_eNB_ue_context_s *ue_desc_p;
struct s1ap_eNB_ue_context_s *ue_desc_p = NULL;
struct s1ap_eNB_mme_data_s *mme_ref_p;
DevAssert(pdu != NULL);
......
......@@ -270,7 +270,7 @@ static void enb_config_display(void)
printf( " ENB CONFIG FILE CONTENT LOADED:\n");
printf( "----------------------------------------------------------------------\n");
for (i = 0; i < g_enb_properties.number; i++) {
printf( "ENB CONFIG for instance %u:\n\n", i);
printf( "ENB CONFIG for instance %d:\n\n", i);
printf( "\teNB name: \t%s\n",g_enb_properties.properties[i]->eNB_name);
printf( "\teNB ID: \t%"PRIu32"\n",g_enb_properties.properties[i]->eNB_id);
printf( "\tCell type: \t%s\n",g_enb_properties.properties[i]->cell_type == CELL_MACRO_ENB ? "CELL_MACRO_ENB":"CELL_HOME_ENB");
......
......@@ -1103,7 +1103,7 @@ et_config_parse_opt_line (
fprintf(stderr, "Please provide a valid -D/--delay-on-exit argument, %s is not a valid value\n", delay_on_exit);
exit(1);
}
printf("Delay on exit is %u\n", delay_on_exit);
printf("Delay on exit is %d\n", (int) delay_on_exit);
}
break;
......
......@@ -28,7 +28,12 @@
#include <pthread.h>
#include <unistd.h>
#include <stdio.h>
#include <uhd/version.hpp>
#if UHD_VERSION < 3110000
#include <uhd/utils/thread_priority.hpp>
#else
#include <uhd/utils/thread.hpp>
#endif
#include <uhd/usrp/multi_usrp.hpp>
#include <uhd/version.hpp>
#include <boost/lexical_cast.hpp>
......@@ -183,7 +188,7 @@ static int sync_to_gps(openair0_device *device) {
num_gps_locked++;
std::cout << boost::format("GPS Locked\n");
} else {
std::cerr << "WARNING: GPS not locked - time will not be accurate until locked" << std::endl;
LOG_W(HW,"WARNING: GPS not locked - time will not be accurate until locked\n");
}
//Set to GPS time
......@@ -724,6 +729,7 @@ void *freq_thread(void *arg) {
usrp_state_t *s = (usrp_state_t *)device->priv;
s->usrp->set_tx_freq(device->openair0_cfg[0].tx_freq[0]);
s->usrp->set_rx_freq(device->openair0_cfg[0].rx_freq[0]);
return NULL;
}
/*! \brief Set frequencies (TX/RX). Spawns a thread to handle the frequency change to not block the calling thread
* \param device the hardware to use
......@@ -1073,16 +1079,16 @@ extern "C" {
uhd::device_addrs_t device_adds = uhd::device::find(args);
if (device_adds.size() == 0) {
std::cerr<<"No USRP Device Found. " << std::endl;
LOG_E(HW,"No USRP Device Found.\n ");
free(s);
return -1;
} else if (device_adds.size() > 1) {
std::cerr<<"More than one USRP Device Found. Please specify device more precisely in config file." << std::endl;
LOG_E(HW,"More than one USRP Device Found. Please specify device more precisely in config file.\n");
free(s);
return -1;
}
std::cerr << "Found USRP " << device_adds[0].get("type") << "\n";
LOG_I(HW,"Found USRP %s\n", device_adds[0].get("type").c_str());
double usrp_master_clock;
if (device_adds[0].get("type") == "b200") {
......@@ -1090,7 +1096,7 @@ extern "C" {
device->type = USRP_B200_DEV;
usrp_master_clock = 30.72e6;
args += boost::str(boost::format(",master_clock_rate=%f") % usrp_master_clock);
args += ",num_send_frames=256,num_recv_frames=256, send_frame_size=15360, recv_frame_size=15360" ;
args += ",num_send_frames=256,num_recv_frames=256, send_frame_size=7680, recv_frame_size=7680" ;
}
if (device_adds[0].get("type") == "n3xx") {
......@@ -1287,8 +1293,9 @@ extern "C" {
samples/=10000;
LOG_I(PHY,"RF board max packet size %u, size for 100µs jitter %d \n", max, samples);