Skip to content
Snippets Groups Projects
Commit 06e700a0 authored by Francesco Mani's avatar Francesco Mani
Browse files

bitmap for scheduling dlsch and ulsch in UE list

parent 84bed899
No related branches found
No related tags found
9 merge requests!1757Draft: Use pMAX value in configuration file, instead of hardcoded '23' in asn1_msg.c,!1493fix DL arq errors in UE,!1093Issue in generating NR PRACH for High Speed case,!1074PBCH test case support for non-zero bchpyload,!918Develop nfapi,!847Nr vcd,!814Develop Integration Branch -- 2020 week 19,!810Nr pucch2,!802Nr pucch
...@@ -326,6 +326,11 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, ...@@ -326,6 +326,11 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
protocol_ctxt_t ctxt; protocol_ctxt_t ctxt;
int CC_id; int CC_id;
int UE_id;
uint64_t *dlsch_in_slot_bitmap=NULL;
uint64_t *ulsch_in_slot_bitmap=NULL;
if (phy_test) UE_id=0;
NR_COMMON_channels_t *cc = RC.nrmac[module_idP]->common_channels; NR_COMMON_channels_t *cc = RC.nrmac[module_idP]->common_channels;
...@@ -340,23 +345,25 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, ...@@ -340,23 +345,25 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
RC.nrmac[module_idP]->frame = frame_rxP; RC.nrmac[module_idP]->frame = frame_rxP;
RC.nrmac[module_idP]->slot = slot_rxP; RC.nrmac[module_idP]->slot = slot_rxP;
uint64_t *dlsch_in_slot_bitmap = &RC.nrmac[module_idP]->dlsch_in_slot_bitmap; // static bitmap signaling which slot in a tdd period contains dlsch if (phy_test) {
uint64_t *ulsch_in_slot_bitmap = &RC.nrmac[module_idP]->ulsch_in_slot_bitmap; // static bitmap signaling which slot in a tdd period contains ulsch dlsch_in_slot_bitmap = &RC.nrmac[module_idP]->UE_list.dlsch_in_slot_bitmap[UE_id]; // static bitmap signaling which slot in a tdd period contains dlsch
ulsch_in_slot_bitmap = &RC.nrmac[module_idP]->UE_list.ulsch_in_slot_bitmap[UE_id]; // static bitmap signaling which slot in a tdd period contains ulsch
// hardcoding dlsch to be in slot 1 // hardcoding dlsch to be in slot 1
if (phy_test && !(slot_txP%cc->num_slots_per_tdd)) { if (!(slot_txP%cc->num_slots_per_tdd)) {
if(slot_txP==0) if(slot_txP==0)
*dlsch_in_slot_bitmap = 0x02; *dlsch_in_slot_bitmap = 0x02;
else else
*dlsch_in_slot_bitmap = 0x00; *dlsch_in_slot_bitmap = 0x00;
} }
// hardcoding ulsch to be in slot 8 // hardcoding ulsch to be in slot 8
if (phy_test && !(slot_rxP%cc->num_slots_per_tdd)) { if (!(slot_rxP%cc->num_slots_per_tdd)) {
if(slot_rxP==0) if(slot_rxP==0)
*ulsch_in_slot_bitmap = 0x100; *ulsch_in_slot_bitmap = 0x100;
else else
*ulsch_in_slot_bitmap = 0x00; *ulsch_in_slot_bitmap = 0x00;
}
} }
// Check if there are downlink symbols in the slot, // Check if there are downlink symbols in the slot,
......
...@@ -122,9 +122,11 @@ typedef struct { ...@@ -122,9 +122,11 @@ typedef struct {
boolean_t active[MAX_MOBILES_PER_GNB]; boolean_t active[MAX_MOBILES_PER_GNB];
rnti_t rnti[MAX_MOBILES_PER_GNB]; rnti_t rnti[MAX_MOBILES_PER_GNB];
NR_CellGroupConfig_t *secondaryCellGroup[MAX_MOBILES_PER_GNB]; NR_CellGroupConfig_t *secondaryCellGroup[MAX_MOBILES_PER_GNB];
uint64_t dlsch_in_slot_bitmap[MAX_MOBILES_PER_GNB]; // static bitmap signaling which slot in a tdd period contains dlsch
uint64_t ulsch_in_slot_bitmap[MAX_MOBILES_PER_GNB]; // static bitmap signaling which slot in a tdd period contains ulsch
} NR_UE_list_t; } NR_UE_list_t;
/*! \brief top level eNB MAC structure */ /*! \brief top level gNB MAC structure */
typedef struct gNB_MAC_INST_s { typedef struct gNB_MAC_INST_s {
/// Ethernet parameters for northbound midhaul interface /// Ethernet parameters for northbound midhaul interface
eth_params_t eth_params_n; eth_params_t eth_params_n;
...@@ -155,9 +157,6 @@ typedef struct gNB_MAC_INST_s { ...@@ -155,9 +157,6 @@ typedef struct gNB_MAC_INST_s {
nfapi_nr_tx_data_request_t TX_req[NFAPI_CC_MAX]; nfapi_nr_tx_data_request_t TX_req[NFAPI_CC_MAX];
NR_UE_list_t UE_list; NR_UE_list_t UE_list;
uint64_t dlsch_in_slot_bitmap; // static bitmap signaling which slot in a tdd period contains dlsch
uint64_t ulsch_in_slot_bitmap; // static bitmap signaling which slot in a tdd period contains ulsch
/// UL handle /// UL handle
uint32_t ul_handle; uint32_t ul_handle;
......
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment