Commit 57129bc0 authored by shahab's avatar shahab
Browse files

Uplink Slicing

parent fdac4d17
......@@ -655,6 +655,21 @@ int flexran_get_meas_gap_config_offset(mid_t mod_id, mid_t ue_id) {
return -1;
}
int flexran_get_rrc_status(const mid_t mod_id, const rnti_t rntiP){
struct rrc_eNB_ue_context_s* ue_context_p = NULL;
ue_context_p = rrc_eNB_get_ue_context(&eNB_rrc_inst[mod_id],rntiP);
if (ue_context_p != NULL) {
return(ue_context_p->ue_context.Status);
} else {
return RRC_INACTIVE;
}
}
int flexran_get_ue_aggregated_max_bitrate_dl (mid_t mod_id, mid_t ue_id) {
return ((UE_list_t *)enb_ue[mod_id])->UE_sched_ctrl[ue_id].ue_AggregatedMaximumBitrateDL;
}
......
......@@ -742,7 +742,9 @@ flexran_schedule_ue_spec_default(mid_t mod_id,
if ((n_active_slices > 0) && (n_active_slices <= MAX_NUM_SLICES)) {
LOG_N(MAC,"[eNB %d]frame %d subframe %d: number of active slices has changed: %d-->%d\n",
mod_id, frame, subframe, n_active_slices_current, n_active_slices);
n_active_slices_current = n_active_slices;
} else {
LOG_W(MAC,"invalid number of slices %d, revert to the previous value %d\n",n_active_slices, n_active_slices_current);
n_active_slices = n_active_slices_current;
......@@ -756,18 +758,22 @@ flexran_schedule_ue_spec_default(mid_t mod_id,
total_slice_percentage=total_slice_percentage - slice_percentage_current[i] + slice_percentage[i];
LOG_N(MAC,"[eNB %d][SLICE %d] frame %d subframe %d: total percentage %f, slice RB percentage has changed: %f-->%f\n",
mod_id, i, frame, subframe, total_slice_percentage, slice_percentage_current[i], slice_percentage[i]);
slice_percentage_current[i] = slice_percentage[i];
} else {
LOG_W(MAC,"[eNB %d][SLICE %d] invalid total RB share (%f->%f), revert the previous value (%f->%f)\n",
mod_id,i,
total_slice_percentage,
total_slice_percentage - slice_percentage_current[i] + slice_percentage[i],
slice_percentage[i],slice_percentage_current[i]);
slice_percentage[i]= slice_percentage_current[i];
}
} else {
LOG_W(MAC,"[eNB %d][SLICE %d] invalid slice RB share, revert the previous value (%f->%f)\n",mod_id, i, slice_percentage[i],slice_percentage_current[i]);
slice_percentage[i]= slice_percentage_current[i];
}
......@@ -778,10 +784,14 @@ flexran_schedule_ue_spec_default(mid_t mod_id,
if ((slice_maxmcs[i] >= 0) && (slice_maxmcs[i] < 29)){
LOG_N(MAC,"[eNB %d][SLICE %d] frame %d subframe %d: slice MAX MCS has changed: %d-->%d\n",
mod_id, i, frame, subframe, slice_maxmcs_current[i], slice_maxmcs[i]);
slice_maxmcs_current[i] = slice_maxmcs[i];
} else {
LOG_W(MAC,"[eNB %d][SLICE %d] invalid slice max mcs %d, revert the previous value %d\n",mod_id, i, slice_percentage[i],slice_percentage[i]);
slice_maxmcs[i]= slice_maxmcs_current[i];
}
}
......@@ -789,7 +799,9 @@ flexran_schedule_ue_spec_default(mid_t mod_id,
if (update_dl_scheduler_current[i] != update_dl_scheduler[i]){
LOG_N(MAC,"[eNB %d][SLICE %d] frame %d subframe %d: DL scheduler for this slice is updated: %s \n",
mod_id, i, frame, subframe, dl_scheduler_type[i]);
update_dl_scheduler_current[i] = update_dl_scheduler[i];
}
// Run each enabled slice-specific schedulers one by one
......
......@@ -59,6 +59,12 @@
// #define ENABLE_MAC_PAYLOAD_DEBUG
// #define DEBUG_eNB_SCHEDULER 1
// RB share for each slice for past and current time
float slice_percentage_uplink[MAX_NUM_SLICES] = {1.0, 0.0, 0.0, 0.0};
float slice_percentage_current_uplink[MAX_NUM_SLICES] = {1.0, 0.0, 0.0, 0.0};
// // This table holds the allowable PRB sizes for ULSCH transmissions
// uint8_t rb_table[33] = {1,2,3,4,5,6,8,9,10,12,15,16,18,20,24,25,27,30,32,36,40,45,48,50,54,60,72,75,80,81,90,96,100};
......@@ -500,6 +506,7 @@
// }
void _ulsch_scheduler_pre_processor(module_id_t module_idP,
int slice_id,
int frameP,
sub_frame_t subframeP,
uint16_t *first_rb)
......@@ -515,7 +522,8 @@ void _ulsch_scheduler_pre_processor(module_id_t module_idP,
UE_list_t *UE_list = &eNB_mac_inst[module_idP].UE_list;
UE_TEMPLATE *UE_template = 0;
LTE_DL_FRAME_PARMS *frame_parms = 0;
uint16_t nb_rbs_allowed_slice[MAX_NUM_CCs][MAX_NUM_SLICES];
//LOG_I(MAC,"assign max mcs min rb\n");
// maximize MCS and then allocate required RB according to the buffer occupancy with the limit of max available UL RB
......@@ -576,15 +584,17 @@ void _ulsch_scheduler_pre_processor(module_id_t module_idP,
max_num_ue_to_be_scheduled+=1;
nb_rbs_allowed_slice[CC_id][slice_id] = flexran_nb_rbs_allowed_slice(slice_percentage_uplink[slice_id], flexran_get_N_RB_UL(module_idP, CC_id));
if (total_ue_count == 0) {
average_rbs_per_user[CC_id] = 0;
} else if (total_ue_count == 1 ) { // increase the available RBs, special case,
average_rbs_per_user[CC_id] = frame_parms->N_RB_UL-first_rb[CC_id]+1;
} else if( (total_ue_count <= (frame_parms->N_RB_DL-first_rb[CC_id])) &&
average_rbs_per_user[CC_id] = nb_rbs_allowed_slice[CC_id][slice_id]-first_rb[CC_id]+1;
} else if( (total_ue_count <= (nb_rbs_allowed_slice[CC_id][slice_id]-first_rb[CC_id])) &&
(total_ue_count <= max_num_ue_to_be_scheduled)) {
average_rbs_per_user[CC_id] = (uint16_t) floor((frame_parms->N_RB_UL-first_rb[CC_id])/total_ue_count);
average_rbs_per_user[CC_id] = (uint16_t) floor((nb_rbs_allowed_slice[CC_id][slice_id]-first_rb[CC_id])/total_ue_count);
} else if (max_num_ue_to_be_scheduled > 0 ) {
average_rbs_per_user[CC_id] = (uint16_t) floor((frame_parms->N_RB_UL-first_rb[CC_id])/max_num_ue_to_be_scheduled);
average_rbs_per_user[CC_id] = (uint16_t) floor((nb_rbs_allowed_slice[CC_id][slice_id]-first_rb[CC_id])/max_num_ue_to_be_scheduled);
} else {
average_rbs_per_user[CC_id]=1;
LOG_W(MAC,"[eNB %d] frame %d subframe %d: UE %d CC %d: can't get average rb per user (should not be here)\n",
......@@ -648,7 +658,7 @@ void _ulsch_scheduler_pre_processor(module_id_t module_idP,
CC_id = UE_list->ordered_ULCCids[n][UE_id];
UE_template = &UE_list->UE_template[CC_id][UE_id];
frame_parms = mac_xface->get_lte_frame_parms(module_idP,CC_id);
total_remaining_rbs[CC_id]=frame_parms->N_RB_UL - first_rb[CC_id] - total_allocated_rbs[CC_id];
total_remaining_rbs[CC_id]=nb_rbs_allowed_slice[CC_id][slice_id] - first_rb[CC_id] - total_allocated_rbs[CC_id];
if (total_ue_count == 1 ) {
total_remaining_rbs[CC_id]+=1;
......@@ -675,7 +685,7 @@ void _ulsch_scheduler_pre_processor(module_id_t module_idP,
frame_parms= mac_xface->get_lte_frame_parms(module_idP,CC_id);
if (total_allocated_rbs[CC_id]>0) {
LOG_D(MAC,"[eNB %d] total RB allocated for all UEs = %d/%d\n", module_idP, total_allocated_rbs[CC_id], frame_parms->N_RB_UL - first_rb[CC_id]);
LOG_D(MAC,"[eNB %d] total RB allocated for all UEs = %d/%d\n", module_idP, total_allocated_rbs[CC_id], nb_rbs_allowed_slice[CC_id][slice_id] - first_rb[CC_id]);
}
}
}
......@@ -888,10 +898,11 @@ void flexran_agent_schedule_ulsch_rnti(module_id_t module_idP,
int slice_id = 0;
_ulsch_scheduler_pre_processor(module_idP,
slice_id,
frameP,
subframeP,
first_rb);
......@@ -993,7 +1004,9 @@ abort();
UE_sched_ctrl->ul_failure_timer);
// reset the scheduling request
UE_template->ul_SR = 0;
status = mac_eNB_get_rrc_status(module_idP,rnti);
// status = mac_eNB_get_rrc_status(module_idP,rnti);
status = flexran_get_rrc_status(module_idP, rnti);
if (status < RRC_CONNECTED)
cqi_req = 0;
else if (UE_sched_ctrl->cqi_req_timer>30) {
......
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