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160 results
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with 128 additions and 111 deletions
...@@ -69,7 +69,7 @@ int last_ulsch_ue_id_volte[MAX_NUM_CCs] = {-1}; ...@@ -69,7 +69,7 @@ int last_ulsch_ue_id_volte[MAX_NUM_CCs] = {-1};
uint16_t pre_nb_rbs_required[2][MAX_NUM_CCs][NUMBER_OF_UE_MAX]; uint16_t pre_nb_rbs_required[2][MAX_NUM_CCs][NUMBER_OF_UE_MAX];
uint8_t dlsch_ue_select_tbl_in_use; uint8_t dlsch_ue_select_tbl_in_use;
uint8_t new_dlsch_ue_select_tbl_in_use; uint8_t new_dlsch_ue_select_tbl_in_use;
boolean_t pre_scd_activeUE[NUMBER_OF_UE_MAX]; bool pre_scd_activeUE[NUMBER_OF_UE_MAX];
eNB_UE_STATS pre_scd_eNB_UE_stats[MAX_NUM_CCs][NUMBER_OF_UE_MAX]; eNB_UE_STATS pre_scd_eNB_UE_stats[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
#endif #endif
...@@ -125,7 +125,7 @@ void pre_scd_nb_rbs_required( module_id_t module_idP, ...@@ -125,7 +125,7 @@ void pre_scd_nb_rbs_required( module_id_t module_idP,
UE_info_t *UE_info = &RC.mac[module_idP]->UE_info; UE_info_t *UE_info = &RC.mac[module_idP]->UE_info;
for (UE_id = 0; UE_id <NUMBER_OF_UE_MAX; UE_id++) { for (UE_id = 0; UE_id <NUMBER_OF_UE_MAX; UE_id++) {
if (pre_scd_activeUE[UE_id] != TRUE) if (pre_scd_activeUE[UE_id] != true)
continue; continue;
// store dlsch buffer // store dlsch buffer
...@@ -210,7 +210,7 @@ void dlsch_scheduler_pre_ue_select_fairRR( ...@@ -210,7 +210,7 @@ void dlsch_scheduler_pre_ue_select_fairRR(
DL_req = &eNB->DL_req[CC_id].dl_config_request_body; DL_req = &eNB->DL_req[CC_id].dl_config_request_body;
for (UE_id = 0; UE_id < NUMBER_OF_UE_MAX; UE_id++) { for (UE_id = 0; UE_id < NUMBER_OF_UE_MAX; UE_id++) {
if (UE_info->active[UE_id] == FALSE) { if (UE_info->active[UE_id] == false) {
continue; continue;
} }
...@@ -331,7 +331,7 @@ void dlsch_scheduler_pre_ue_select_fairRR( ...@@ -331,7 +331,7 @@ void dlsch_scheduler_pre_ue_select_fairRR(
break; break;
} }
if (UE_info->active[UE_id] == FALSE) { if (UE_info->active[UE_id] == false) {
continue; continue;
} }
...@@ -459,7 +459,7 @@ void dlsch_scheduler_pre_ue_select_fairRR( ...@@ -459,7 +459,7 @@ void dlsch_scheduler_pre_ue_select_fairRR(
break; break;
} }
if (UE_info->active[UE_id] == FALSE) { if (UE_info->active[UE_id] == false) {
continue; continue;
} }
...@@ -607,7 +607,7 @@ static void dlsch_scheduler_pre_processor_reset_fairRR( ...@@ -607,7 +607,7 @@ static void dlsch_scheduler_pre_processor_reset_fairRR(
if (rnti == NOT_A_RNTI) if (rnti == NOT_A_RNTI)
continue; continue;
if (UE_info->active[UE_id] != TRUE) if (UE_info->active[UE_id] != true)
continue; continue;
LOG_D(MAC, "Running preprocessor for UE %d (%x)\n", UE_id, rnti); LOG_D(MAC, "Running preprocessor for UE %d (%x)\n", UE_id, rnti);
...@@ -755,7 +755,7 @@ static void assign_rbs_required_fairRR( ...@@ -755,7 +755,7 @@ static void assign_rbs_required_fairRR(
// clear rb allocations across all CC_id // clear rb allocations across all CC_id
for (UE_id = 0; UE_id < MAX_MOBILES_PER_ENB; UE_id++) { for (UE_id = 0; UE_id < MAX_MOBILES_PER_ENB; UE_id++) {
if (UE_info->active[UE_id] != TRUE) if (UE_info->active[UE_id] != true)
continue; continue;
pCCid = UE_PCCID(Mod_id, UE_id); pCCid = UE_PCCID(Mod_id, UE_id);
...@@ -945,7 +945,7 @@ void dlsch_scheduler_pre_processor_fairRR (module_id_t Mod_id, ...@@ -945,7 +945,7 @@ void dlsch_scheduler_pre_processor_fairRR (module_id_t Mod_id,
min_rb_unit[CC_id] = get_min_rb_unit(Mod_id, CC_id); min_rb_unit[CC_id] = get_min_rb_unit(Mod_id, CC_id);
for (i = 0; i < NUMBER_OF_UE_MAX; i++) { for (i = 0; i < NUMBER_OF_UE_MAX; i++) {
if (UE_info->active[i] != TRUE) if (UE_info->active[i] != true)
continue; continue;
UE_id = i; UE_id = i;
...@@ -2241,7 +2241,7 @@ void ulsch_scheduler_pre_ue_select_fairRR( ...@@ -2241,7 +2241,7 @@ void ulsch_scheduler_pre_ue_select_fairRR(
// UE round >0 // UE round >0
for ( UE_id = 0; UE_id < NUMBER_OF_UE_MAX; UE_id++ ) { for ( UE_id = 0; UE_id < NUMBER_OF_UE_MAX; UE_id++ ) {
if (UE_info->active[UE_id] == FALSE) if (UE_info->active[UE_id] == false)
continue; continue;
rnti = UE_RNTI(module_idP,UE_id); rnti = UE_RNTI(module_idP,UE_id);
...@@ -2251,7 +2251,7 @@ void ulsch_scheduler_pre_ue_select_fairRR( ...@@ -2251,7 +2251,7 @@ void ulsch_scheduler_pre_ue_select_fairRR(
CC_id = UE_PCCID(module_idP,UE_id); CC_id = UE_PCCID(module_idP,UE_id);
if (UE_info->UE_template[CC_id][UE_id].configured == FALSE) if (UE_info->UE_template[CC_id][UE_id].configured == false)
continue; continue;
if (UE_info->UE_sched_ctrl[UE_id].ul_failure_timer > 0 if (UE_info->UE_sched_ctrl[UE_id].ul_failure_timer > 0
...@@ -2401,7 +2401,7 @@ void ulsch_scheduler_pre_ue_select_fairRR( ...@@ -2401,7 +2401,7 @@ void ulsch_scheduler_pre_ue_select_fairRR(
} }
for ( UE_id = 0; UE_id < NUMBER_OF_UE_MAX; UE_id++ ) { for ( UE_id = 0; UE_id < NUMBER_OF_UE_MAX; UE_id++ ) {
if (UE_info->active[UE_id] == FALSE) if (UE_info->active[UE_id] == false)
continue; continue;
rnti = UE_RNTI(module_idP,UE_id); rnti = UE_RNTI(module_idP,UE_id);
...@@ -2414,7 +2414,7 @@ void ulsch_scheduler_pre_ue_select_fairRR( ...@@ -2414,7 +2414,7 @@ void ulsch_scheduler_pre_ue_select_fairRR(
if (UE_id > last_ulsch_ue_id[CC_id]) if (UE_id > last_ulsch_ue_id[CC_id])
continue; continue;
if (UE_info->UE_template[CC_id][UE_id].configured == FALSE) if (UE_info->UE_template[CC_id][UE_id].configured == false)
continue; continue;
if (UE_info->UE_sched_ctrl[UE_id].ul_failure_timer > 0 if (UE_info->UE_sched_ctrl[UE_id].ul_failure_timer > 0
......
...@@ -1989,7 +1989,7 @@ find_UE_id(module_id_t mod_idP, ...@@ -1989,7 +1989,7 @@ find_UE_id(module_id_t mod_idP,
return -1; return -1;
for (UE_id = 0; UE_id < MAX_MOBILES_PER_ENB; UE_id++) { for (UE_id = 0; UE_id < MAX_MOBILES_PER_ENB; UE_id++) {
if (UE_info->active[UE_id] == TRUE) { if (UE_info->active[UE_id] == true) {
int CC_id = UE_PCCID(mod_idP, UE_id); int CC_id = UE_PCCID(mod_idP, UE_id);
if (CC_id>=0 && CC_id<NFAPI_CC_MAX && UE_info->UE_template[CC_id][UE_id].rnti == rntiP) { if (CC_id>=0 && CC_id<NFAPI_CC_MAX && UE_info->UE_template[CC_id][UE_id].rnti == rntiP) {
return UE_id; return UE_id;
...@@ -2063,7 +2063,7 @@ UE_RNTI(module_id_t mod_idP, ...@@ -2063,7 +2063,7 @@ UE_RNTI(module_id_t mod_idP,
} }
//------------------------------------------------------------------------------ //------------------------------------------------------------------------------
boolean_t bool
is_UE_active(module_id_t mod_idP, is_UE_active(module_id_t mod_idP,
int ue_idP) int ue_idP)
//------------------------------------------------------------------------------ //------------------------------------------------------------------------------
...@@ -2187,20 +2187,20 @@ add_new_ue(module_id_t mod_idP, ...@@ -2187,20 +2187,20 @@ add_new_ue(module_id_t mod_idP,
UE_info->num_UEs); UE_info->num_UEs);
for (i = 0; i < MAX_MOBILES_PER_ENB; i++) { for (i = 0; i < MAX_MOBILES_PER_ENB; i++) {
if (UE_info->active[i] == TRUE) if (UE_info->active[i] == true)
continue; continue;
UE_id = i; UE_id = i;
memset(&UE_info->UE_template[cc_idP][UE_id], 0, sizeof(UE_TEMPLATE)); memset(&UE_info->UE_template[cc_idP][UE_id], 0, sizeof(UE_TEMPLATE));
UE_info->UE_template[cc_idP][UE_id].rnti = rntiP; UE_info->UE_template[cc_idP][UE_id].rnti = rntiP;
UE_info->UE_template[cc_idP][UE_id].configured = FALSE; UE_info->UE_template[cc_idP][UE_id].configured = false;
UE_info->numactiveCCs[UE_id] = 1; UE_info->numactiveCCs[UE_id] = 1;
UE_info->numactiveULCCs[UE_id] = 1; UE_info->numactiveULCCs[UE_id] = 1;
UE_info->pCC_id[UE_id] = cc_idP; UE_info->pCC_id[UE_id] = cc_idP;
UE_info->ordered_CCids[0][UE_id] = cc_idP; UE_info->ordered_CCids[0][UE_id] = cc_idP;
UE_info->ordered_ULCCids[0][UE_id] = cc_idP; UE_info->ordered_ULCCids[0][UE_id] = cc_idP;
UE_info->num_UEs++; UE_info->num_UEs++;
UE_info->active[UE_id] = TRUE; UE_info->active[UE_id] = true;
add_ue_list(&UE_info->list, UE_id); add_ue_list(&UE_info->list, UE_id);
dump_ue_list(&UE_info->list); dump_ue_list(&UE_info->list);
pp_impl_param_t* dl = &RC.mac[mod_idP]->pre_processor_dl; pp_impl_param_t* dl = &RC.mac[mod_idP]->pre_processor_dl;
...@@ -2280,7 +2280,7 @@ rrc_mac_remove_ue(module_id_t mod_idP, ...@@ -2280,7 +2280,7 @@ rrc_mac_remove_ue(module_id_t mod_idP,
UE_id, UE_id,
pCC_id, pCC_id,
rntiP); rntiP);
UE_info->active[UE_id] = FALSE; UE_info->active[UE_id] = false;
UE_info->num_UEs--; UE_info->num_UEs--;
remove_ue_list(&UE_info->list, UE_id); remove_ue_list(&UE_info->list, UE_id);
...@@ -3488,7 +3488,7 @@ has_ul_grant(module_id_t module_idP, ...@@ -3488,7 +3488,7 @@ has_ul_grant(module_id_t module_idP,
} }
//------------------------------------------------------------------------------ //------------------------------------------------------------------------------
boolean_t bool
CCE_allocation_infeasible(int module_idP, CCE_allocation_infeasible(int module_idP,
int CC_idP, int CC_idP,
int format_flag, int format_flag,
...@@ -3501,7 +3501,7 @@ CCE_allocation_infeasible(int module_idP, ...@@ -3501,7 +3501,7 @@ CCE_allocation_infeasible(int module_idP,
nfapi_dl_config_request_pdu_t *dl_config_pdu = &DL_req->dl_config_pdu_list[DL_req->number_pdu]; nfapi_dl_config_request_pdu_t *dl_config_pdu = &DL_req->dl_config_pdu_list[DL_req->number_pdu];
nfapi_hi_dci0_request_body_t *HI_DCI0_req = &RC.mac[module_idP]->HI_DCI0_req[CC_idP][subframe].hi_dci0_request_body; nfapi_hi_dci0_request_body_t *HI_DCI0_req = &RC.mac[module_idP]->HI_DCI0_req[CC_idP][subframe].hi_dci0_request_body;
nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu = &HI_DCI0_req->hi_dci0_pdu_list[HI_DCI0_req->number_of_dci + HI_DCI0_req->number_of_hi]; nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu = &HI_DCI0_req->hi_dci0_pdu_list[HI_DCI0_req->number_of_dci + HI_DCI0_req->number_of_hi];
boolean_t res = TRUE; bool res = true;
if (format_flag != 2) { // DL DCI if (format_flag != 2) { // DL DCI
if (DL_req->number_pdu == MAX_NUM_DL_PDU) { if (DL_req->number_pdu == MAX_NUM_DL_PDU) {
...@@ -3517,7 +3517,7 @@ CCE_allocation_infeasible(int module_idP, ...@@ -3517,7 +3517,7 @@ CCE_allocation_infeasible(int module_idP,
subframe, format_flag, rnti, aggregation); subframe, format_flag, rnti, aggregation);
if (allocate_CCEs(module_idP, CC_idP, 0, subframe, 0) != -1) if (allocate_CCEs(module_idP, CC_idP, 0, subframe, 0) != -1)
res = FALSE; res = false;
DL_req->number_pdu--; DL_req->number_pdu--;
} }
...@@ -3532,7 +3532,7 @@ CCE_allocation_infeasible(int module_idP, ...@@ -3532,7 +3532,7 @@ CCE_allocation_infeasible(int module_idP,
HI_DCI0_req->number_of_dci++; HI_DCI0_req->number_of_dci++;
if (allocate_CCEs(module_idP, CC_idP, 0, subframe, 0) != -1) if (allocate_CCEs(module_idP, CC_idP, 0, subframe, 0) != -1)
res = FALSE; res = false;
HI_DCI0_req->number_of_dci--; HI_DCI0_req->number_of_dci--;
} }
...@@ -5029,7 +5029,7 @@ SR_indication(module_id_t mod_idP, ...@@ -5029,7 +5029,7 @@ SR_indication(module_id_t mod_idP,
if (UE_id != -1) { if (UE_id != -1) {
UE_scheduling_ctrl = &(UE_info->UE_sched_ctrl[UE_id]); UE_scheduling_ctrl = &(UE_info->UE_sched_ctrl[UE_id]);
if ((UE_scheduling_ctrl->cdrx_configured == TRUE) && if ((UE_scheduling_ctrl->cdrx_configured == true) &&
(UE_scheduling_ctrl->dci0_ongoing_timer > 0) && (UE_scheduling_ctrl->dci0_ongoing_timer > 0) &&
(UE_scheduling_ctrl->dci0_ongoing_timer < 8)) { (UE_scheduling_ctrl->dci0_ongoing_timer < 8)) {
LOG_D(MAC, "[eNB %d][SR %x] Frame %d subframeP %d Signaling SR for UE %d on CC_id %d. \ LOG_D(MAC, "[eNB %d][SR %x] Frame %d subframeP %d Signaling SR for UE %d on CC_id %d. \
...@@ -5052,7 +5052,7 @@ SR_indication(module_id_t mod_idP, ...@@ -5052,7 +5052,7 @@ SR_indication(module_id_t mod_idP,
} }
UE_info->UE_template[cc_idP][UE_id].ul_SR = 1; UE_info->UE_template[cc_idP][UE_id].ul_SR = 1;
UE_info->UE_template[cc_idP][UE_id].ul_active = TRUE; UE_info->UE_template[cc_idP][UE_id].ul_active = true;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_SR_INDICATION, 1); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_SR_INDICATION, 1);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_SR_INDICATION, 0); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_SR_INDICATION, 0);
} }
......
...@@ -242,7 +242,7 @@ rx_sdu(const module_id_t enb_mod_idP, ...@@ -242,7 +242,7 @@ rx_sdu(const module_id_t enb_mod_idP,
} }
/* CDRX UL HARQ timers */ /* CDRX UL HARQ timers */
if (UE_scheduling_control->cdrx_configured == TRUE) { if (UE_scheduling_control->cdrx_configured == true) {
/* Synchronous UL HARQ */ /* Synchronous UL HARQ */
UE_scheduling_control->ul_synchronous_harq_timer[CC_idP][harq_pid] = 5; UE_scheduling_control->ul_synchronous_harq_timer[CC_idP][harq_pid] = 5;
/* /*
...@@ -1003,7 +1003,7 @@ rx_sdu(const module_id_t enb_mod_idP, ...@@ -1003,7 +1003,7 @@ rx_sdu(const module_id_t enb_mod_idP,
/* CDRX UL HARQ timers */ /* CDRX UL HARQ timers */
if (UE_id != -1) { if (UE_id != -1) {
if (UE_scheduling_control->cdrx_configured == TRUE) { if (UE_scheduling_control->cdrx_configured == true) {
/* Synchronous UL HARQ */ /* Synchronous UL HARQ */
UE_scheduling_control->ul_synchronous_harq_timer[CC_idP][harq_pid] = 5; UE_scheduling_control->ul_synchronous_harq_timer[CC_idP][harq_pid] = 5;
/* /*
...@@ -1447,7 +1447,7 @@ schedule_ulsch_rnti(module_id_t module_idP, ...@@ -1447,7 +1447,7 @@ schedule_ulsch_rnti(module_id_t module_idP,
continue; continue;
// don't schedule if Msg5 is not received yet // don't schedule if Msg5 is not received yet
if (UE_info->UE_template[CC_id][UE_id].configured == FALSE) { if (UE_info->UE_template[CC_id][UE_id].configured == false) {
LOG_D(MAC, LOG_D(MAC,
"[eNB %d] frame %d, subframe %d, UE %d: not configured, skipping " "[eNB %d] frame %d, subframe %d, UE %d: not configured, skipping "
"UE scheduling \n", "UE scheduling \n",
...@@ -2033,7 +2033,7 @@ void schedule_ulsch_rnti_emtc(module_id_t module_idP, ...@@ -2033,7 +2033,7 @@ void schedule_ulsch_rnti_emtc(module_id_t module_idP,
} }
/* Don't schedule if Msg4 is not received yet */ /* Don't schedule if Msg4 is not received yet */
if (UE_template->configured == FALSE) { if (UE_template->configured == false) {
LOG_D(MAC,"[eNB %d] frame %d subframe %d, UE %d: not configured, skipping UE scheduling \n", LOG_D(MAC,"[eNB %d] frame %d subframe %d, UE %d: not configured, skipping UE scheduling \n",
module_idP, module_idP,
frameP, frameP,
......
...@@ -811,9 +811,9 @@ typedef struct { ...@@ -811,9 +811,9 @@ typedef struct {
/// TBS from last UL scheduling /// TBS from last UL scheduling
int TBS_UL[8]; int TBS_UL[8];
/// Flag to indicate UL has been scheduled at least once /// Flag to indicate UL has been scheduled at least once
boolean_t ul_active; bool ul_active;
/// Flag to indicate UE has been configured (ACK from RRCConnectionSetup received) /// Flag to indicate UE has been configured (ACK from RRCConnectionSetup received)
boolean_t configured; bool configured;
/// MCS from last scheduling /// MCS from last scheduling
uint8_t mcs[8]; uint8_t mcs[8];
...@@ -1026,16 +1026,16 @@ typedef struct { ...@@ -1026,16 +1026,16 @@ typedef struct {
/* C-DRX related timers */ /* C-DRX related timers */
/* Note: only valid for FDD and LTE UE when this comment is written (11-01-19)*/ /* Note: only valid for FDD and LTE UE when this comment is written (11-01-19)*/
/// is TRUE if the cqi mask feature is activated by RRC configuration /// is true if the cqi mask feature is activated by RRC configuration
boolean_t cqi_mask_boolean; bool cqi_mask_boolean;
/// is TRUE if the following drx parameters are configured for UE /// is true if the following drx parameters are configured for UE
boolean_t cdrx_configured; bool cdrx_configured;
/* /*
* if TRUE, the eNB has configured the CDRX locally, but is waiting for the UE to acknowledge * if true, the eNB has configured the CDRX locally, but is waiting for the UE to acknowledge
* the activation. This is needed, during the RRC configuration process, when the context is * the activation. This is needed, during the RRC configuration process, when the context is
* configured on the eNB side, but not yet on the UE side... * configured on the eNB side, but not yet on the UE side...
*/ */
boolean_t cdrx_waiting_ack; bool cdrx_waiting_ack;
/* /*
* Is set when a ULSCH scheduling is done and run until the first corresponding transmission is done (4 subframes). * Is set when a ULSCH scheduling is done and run until the first corresponding transmission is done (4 subframes).
* When set, SR cannot be set for the UE. This allows OAI to avoid concidering a SR as uncompleted if the UE sends * When set, SR cannot be set for the UE. This allows OAI to avoid concidering a SR as uncompleted if the UE sends
...@@ -1043,16 +1043,16 @@ typedef struct { ...@@ -1043,16 +1043,16 @@ typedef struct {
* create a lost in timers synchronization. * create a lost in timers synchronization.
*/ */
uint8_t dci0_ongoing_timer; uint8_t dci0_ongoing_timer;
/// is TRUE if the UE is in "Active Time", hence listening to PDCCH /// is true if the UE is in "Active Time", hence listening to PDCCH
boolean_t in_active_time; bool in_active_time;
/// OnDurationTimer /// OnDurationTimer
uint16_t on_duration_timer; uint16_t on_duration_timer;
uint16_t on_duration_timer_thres; uint16_t on_duration_timer_thres;
/// drx-InactivityTimer /// drx-InactivityTimer
uint16_t drx_inactivity_timer; uint16_t drx_inactivity_timer;
uint16_t drx_inactivity_timer_thres; uint16_t drx_inactivity_timer_thres;
/// is TRUE if UE is currently in short DRX cycle /// is true if UE is currently in short DRX cycle
boolean_t in_short_drx_cycle; bool in_short_drx_cycle;
/// drxShortCycleTimer int (1..16) (number of short DRX cycles duration before long DRX cycles) /// drxShortCycleTimer int (1..16) (number of short DRX cycles duration before long DRX cycles)
uint8_t drx_shortCycle_timer_value; uint8_t drx_shortCycle_timer_value;
/// shortDRX-Cycle (duration of one short DRX cycle) /// shortDRX-Cycle (duration of one short DRX cycle)
...@@ -1060,8 +1060,8 @@ typedef struct { ...@@ -1060,8 +1060,8 @@ typedef struct {
/// DRX short cycle timer before switching to long DRX cycle = drx_shortCycle_timer_value * short_drx_cycle_duration /// DRX short cycle timer before switching to long DRX cycle = drx_shortCycle_timer_value * short_drx_cycle_duration
uint16_t drx_shortCycle_timer; uint16_t drx_shortCycle_timer;
uint16_t drx_shortCycle_timer_thres; uint16_t drx_shortCycle_timer_thres;
/// is TRUE if UE is currently in long DRX cycle /// is true if UE is currently in long DRX cycle
boolean_t in_long_drx_cycle; bool in_long_drx_cycle;
/// longDRX-CycleStartOffset (long DRX cycle timer) /// longDRX-CycleStartOffset (long DRX cycle timer)
uint16_t drx_longCycle_timer; uint16_t drx_longCycle_timer;
uint16_t drx_longCycle_timer_thres; uint16_t drx_longCycle_timer_thres;
...@@ -1183,7 +1183,7 @@ typedef struct { ...@@ -1183,7 +1183,7 @@ typedef struct {
UE_sched_ctrl_t UE_sched_ctrl[MAX_MOBILES_PER_ENB]; UE_sched_ctrl_t UE_sched_ctrl[MAX_MOBILES_PER_ENB];
UE_list_t list; UE_list_t list;
int num_UEs; int num_UEs;
boolean_t active[MAX_MOBILES_PER_ENB]; bool active[MAX_MOBILES_PER_ENB];
} UE_info_t; } UE_info_t;
/*! \brief deleting control information*/ /*! \brief deleting control information*/
...@@ -1191,9 +1191,9 @@ typedef struct { ...@@ -1191,9 +1191,9 @@ typedef struct {
///rnti of UE ///rnti of UE
rnti_t rnti; rnti_t rnti;
///remove UE context flag ///remove UE context flag
boolean_t removeContextFlg; bool removeContextFlg;
///remove RA flag ///remove RA flag
boolean_t raFlag; bool raFlag;
} UE_free_ctrl_t; } UE_free_ctrl_t;
/*! \brief REMOVE UE list used by eNB to order UEs/CC for deleting*/ /*! \brief REMOVE UE list used by eNB to order UEs/CC for deleting*/
typedef struct { typedef struct {
......
...@@ -71,7 +71,7 @@ extern rb_id_t mbms_rab_id; ...@@ -71,7 +71,7 @@ extern rb_id_t mbms_rab_id;
extern uint16_t pre_nb_rbs_required[2][MAX_NUM_CCs][NUMBER_OF_UE_MAX]; extern uint16_t pre_nb_rbs_required[2][MAX_NUM_CCs][NUMBER_OF_UE_MAX];
extern uint8_t dlsch_ue_select_tbl_in_use; extern uint8_t dlsch_ue_select_tbl_in_use;
extern uint8_t new_dlsch_ue_select_tbl_in_use; extern uint8_t new_dlsch_ue_select_tbl_in_use;
extern boolean_t pre_scd_activeUE[NUMBER_OF_UE_MAX]; extern bool pre_scd_activeUE[NUMBER_OF_UE_MAX];
extern eNB_UE_STATS pre_scd_eNB_UE_stats[MAX_NUM_CCs][NUMBER_OF_UE_MAX]; extern eNB_UE_STATS pre_scd_eNB_UE_stats[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
#endif #endif
......
...@@ -400,7 +400,7 @@ int find_RA_id(module_id_t mod_idP, int CC_idP, rnti_t rntiP); ...@@ -400,7 +400,7 @@ int find_RA_id(module_id_t mod_idP, int CC_idP, rnti_t rntiP);
rnti_t UE_RNTI(module_id_t module_idP, int UE_id); rnti_t UE_RNTI(module_id_t module_idP, int UE_id);
int UE_PCCID(module_id_t module_idP, int UE_id); int UE_PCCID(module_id_t module_idP, int UE_id);
uint8_t find_active_UEs(module_id_t module_idP); uint8_t find_active_UEs(module_id_t module_idP);
boolean_t is_UE_active(module_id_t module_idP, int UE_id); bool is_UE_active(module_id_t module_idP, int UE_id);
uint8_t get_aggregation(uint8_t bw_index, uint8_t cqi, uint8_t dci_fmt); uint8_t get_aggregation(uint8_t bw_index, uint8_t cqi, uint8_t dci_fmt);
int8_t find_active_UEs_with_traffic(module_id_t module_idP); int8_t find_active_UEs_with_traffic(module_id_t module_idP);
...@@ -416,11 +416,11 @@ int get_nCCE_offset(int *CCE_table, ...@@ -416,11 +416,11 @@ int get_nCCE_offset(int *CCE_table,
int allocate_CCEs(int module_idP, int CC_idP, frame_t frameP, sub_frame_t subframeP, int test_only); int allocate_CCEs(int module_idP, int CC_idP, frame_t frameP, sub_frame_t subframeP, int test_only);
boolean_t CCE_allocation_infeasible(int module_idP, bool CCE_allocation_infeasible(int module_idP,
int CC_idP, int CC_idP,
int common_flag, int common_flag,
int subframe, int subframe,
int aggregation, int rnti); int aggregation, int rnti);
/* tries to allocate a CCE. If it succeeds, reserves NFAPI DCI and DLSCH config */ /* tries to allocate a CCE. If it succeeds, reserves NFAPI DCI and DLSCH config */
int CCE_try_allocate_dlsch(int module_id, int CCE_try_allocate_dlsch(int module_id,
int CC_id, int CC_id,
...@@ -741,13 +741,12 @@ BSR_SHORT *get_bsr_short(module_id_t module_idP, uint8_t bsr_len); ...@@ -741,13 +741,12 @@ BSR_SHORT *get_bsr_short(module_id_t module_idP, uint8_t bsr_len);
*/ */
BSR_LONG *get_bsr_long(module_id_t module_idP, uint8_t bsr_len); BSR_LONG *get_bsr_long(module_id_t module_idP, uint8_t bsr_len);
/*! \fn boolean_t update_bsr(module_id_t module_idP, frame_t frameP,sub_frame_t subframeP) /*! \fn bool update_bsr(module_id_t module_idP, frame_t frameP,sub_frame_t subframeP)
\brief get the rlc stats and update the bsr level for each lcid \brief get the rlc stats and update the bsr level for each lcid
\param[in] Mod_id instance of the UE \param[in] Mod_id instance of the UE
\param[in] frame Frame index \param[in] frame Frame index
*/ */
boolean_t update_bsr(module_id_t module_idP, frame_t frameP, bool update_bsr(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP, eNB_index_t eNB_index);
sub_frame_t subframeP, eNB_index_t eNB_index);
/*! \fn locate_BsrIndexByBufferSize (int *table, int size, int value) /*! \fn locate_BsrIndexByBufferSize (int *table, int size, int value)
\brief locate the BSR level in the table as defined in 36.321. This function requires that he values in table to be monotonic, either increasing or decreasing. The returned value is not less than 0, nor greater than n-1, where n is the size of table. \brief locate the BSR level in the table as defined in 36.321. This function requires that he values in table to be monotonic, either increasing or decreasing. The returned value is not less than 0, nor greater than n-1, where n is the size of table.
......
...@@ -638,7 +638,7 @@ dlsch_scheduler_pre_processor(module_id_t Mod_id, ...@@ -638,7 +638,7 @@ dlsch_scheduler_pre_processor(module_id_t Mod_id,
LOG_E(MAC, "UE %d has RNTI NOT_A_RNTI!\n", UE_id); LOG_E(MAC, "UE %d has RNTI NOT_A_RNTI!\n", UE_id);
continue; continue;
} }
if (UE_info->active[UE_id] != TRUE) { if (UE_info->active[UE_id] != true) {
LOG_E(MAC, "UE %d RNTI %x is NOT active!\n", UE_id, rnti); LOG_E(MAC, "UE %d RNTI %x is NOT active!\n", UE_id, rnti);
continue; continue;
} }
......
...@@ -2325,8 +2325,8 @@ ue_get_sdu(module_id_t module_idP, int CC_id, frame_t frameP, ...@@ -2325,8 +2325,8 @@ ue_get_sdu(module_id_t module_idP, int CC_id, frame_t frameP,
uint8_t bsr_len = 0, bsr_ce_len = 0, bsr_header_len = 0; uint8_t bsr_len = 0, bsr_ce_len = 0, bsr_header_len = 0;
uint8_t phr_header_len = 0, phr_ce_len = 0, phr_len = 0; uint8_t phr_header_len = 0, phr_ce_len = 0, phr_len = 0;
uint8_t lcid = 0, lcid_rlc_pdu_count = 0; uint8_t lcid = 0, lcid_rlc_pdu_count = 0;
boolean_t is_lcid_processed = FALSE; bool is_lcid_processed = false;
boolean_t is_all_lcid_processed = FALSE; bool is_all_lcid_processed = false;
uint16_t sdu_lengths[8] = { 0, 0, 0, 0, 0, 0, 0, 0 }; uint16_t sdu_lengths[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
uint8_t sdu_lcids[8] = { 0, 0, 0, 0, 0, 0, 0, 0 }; uint8_t sdu_lcids[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
uint8_t payload_offset = 0, num_sdus = 0; uint8_t payload_offset = 0, num_sdus = 0;
...@@ -2444,11 +2444,11 @@ ue_get_sdu(module_id_t module_idP, int CC_id, frame_t frameP, ...@@ -2444,11 +2444,11 @@ ue_get_sdu(module_id_t module_idP, int CC_id, frame_t frameP,
// Check for DCCH first // Check for DCCH first
// TO DO: Multiplex in the order defined by the logical channel prioritization // TO DO: Multiplex in the order defined by the logical channel prioritization
for (lcid = DCCH; for (lcid = DCCH;
(lcid < MAX_NUM_LCID) && (is_all_lcid_processed == FALSE); lcid++) { (lcid < MAX_NUM_LCID) && (is_all_lcid_processed == false); lcid++) {
if (UE_mac_inst[module_idP].scheduling_info.LCID_status[lcid] == if (UE_mac_inst[module_idP].scheduling_info.LCID_status[lcid] ==
LCID_NOT_EMPTY) { LCID_NOT_EMPTY) {
lcid_rlc_pdu_count = 0; lcid_rlc_pdu_count = 0;
is_lcid_processed = FALSE; is_lcid_processed = false;
lcid_buffer_occupancy_old = lcid_buffer_occupancy_old =
mac_rlc_get_buffer_occupancy_ind(module_idP, mac_rlc_get_buffer_occupancy_ind(module_idP,
UE_mac_inst[module_idP]. UE_mac_inst[module_idP].
...@@ -2536,8 +2536,8 @@ ue_get_sdu(module_id_t module_idP, int CC_id, frame_t frameP, ...@@ -2536,8 +2536,8 @@ ue_get_sdu(module_id_t module_idP, int CC_id, frame_t frameP,
//No more remaining TBS after this PDU //No more remaining TBS after this PDU
//exit the function //exit the function
rlc_pdu_header_len_last = 1; rlc_pdu_header_len_last = 1;
is_lcid_processed = TRUE; is_lcid_processed = true;
is_all_lcid_processed = TRUE; is_all_lcid_processed = true;
} else { } else {
rlc_pdu_header_len_last = rlc_pdu_header_len_last =
(sdu_lengths[num_sdus] > 128) ? 3 : 2; (sdu_lengths[num_sdus] > 128) ? 3 : 2;
...@@ -2547,8 +2547,8 @@ ue_get_sdu(module_id_t module_idP, int CC_id, frame_t frameP, ...@@ -2547,8 +2547,8 @@ ue_get_sdu(module_id_t module_idP, int CC_id, frame_t frameP,
(bsr_len + phr_len + total_rlc_pdu_header_len + (bsr_len + phr_len + total_rlc_pdu_header_len +
rlc_pdu_header_len_last + sdu_length_total)) { rlc_pdu_header_len_last + sdu_length_total)) {
rlc_pdu_header_len_last = 1; rlc_pdu_header_len_last = 1;
is_lcid_processed = TRUE; is_lcid_processed = true;
is_all_lcid_processed = TRUE; is_all_lcid_processed = true;
} }
} }
...@@ -2559,7 +2559,7 @@ ue_get_sdu(module_id_t module_idP, int CC_id, frame_t frameP, ...@@ -2559,7 +2559,7 @@ ue_get_sdu(module_id_t module_idP, int CC_id, frame_t frameP,
lcid_rlc_pdu_count++; lcid_rlc_pdu_count++;
} else { } else {
/* avoid infinite loop ... */ /* avoid infinite loop ... */
is_lcid_processed = TRUE; is_lcid_processed = true;
} }
/* Get updated BO after multiplexing this PDU */ /* Get updated BO after multiplexing this PDU */
...@@ -3164,7 +3164,7 @@ ue_scheduler(const module_id_t module_idP, ...@@ -3164,7 +3164,7 @@ ue_scheduler(const module_id_t module_idP,
} }
//Check whether Regular BSR is triggered //Check whether Regular BSR is triggered
if (update_bsr(module_idP, txFrameP, txSubframeP, eNB_indexP) == TRUE) { if (update_bsr(module_idP, txFrameP, txSubframeP, eNB_indexP) == true) {
// call SR procedure to generate pending SR and BSR for next PUCCH/PUSCH TxOp. This should implement the procedures // call SR procedure to generate pending SR and BSR for next PUCCH/PUSCH TxOp. This should implement the procedures
// outlined in Sections 5.4.4 an 5.4.5 of 36.321 // outlined in Sections 5.4.4 an 5.4.5 of 36.321
UE_mac_inst[module_idP].scheduling_info.SR_pending = 1; UE_mac_inst[module_idP].scheduling_info.SR_pending = 1;
...@@ -3251,11 +3251,11 @@ ue_scheduler(const module_id_t module_idP, ...@@ -3251,11 +3251,11 @@ ue_scheduler(const module_id_t module_idP,
// to be improved // to be improved
boolean_t bool
update_bsr(module_id_t module_idP, frame_t frameP, update_bsr(module_id_t module_idP, frame_t frameP,
sub_frame_t subframeP, eNB_index_t eNB_index) { sub_frame_t subframeP, eNB_index_t eNB_index) {
mac_rlc_status_resp_t rlc_status; mac_rlc_status_resp_t rlc_status;
boolean_t bsr_regular_triggered = FALSE; bool bsr_regular_triggered = false;
uint8_t lcid; uint8_t lcid;
uint8_t lcgid; uint8_t lcgid;
uint8_t num_lcid_with_data = 0; // for LCID with data only if LCGID is defined uint8_t num_lcid_with_data = 0; // for LCID with data only if LCGID is defined
...@@ -3352,7 +3352,7 @@ update_bsr(module_id_t module_idP, frame_t frameP, ...@@ -3352,7 +3352,7 @@ update_bsr(module_id_t module_idP, frame_t frameP,
(lcgid_buffer_remain (lcgid_buffer_remain
[UE_mac_inst[module_idP].scheduling_info.LCGID[lcid]] == [UE_mac_inst[module_idP].scheduling_info.LCGID[lcid]] ==
0)) { 0)) {
bsr_regular_triggered = TRUE; bsr_regular_triggered = true;
LOG_D(MAC, LOG_D(MAC,
"[UE %d] PDCCH Tick : MAC BSR Triggered LCID%d LCGID%d data become available at frame %d subframe %d\n", "[UE %d] PDCCH Tick : MAC BSR Triggered LCID%d LCGID%d data become available at frame %d subframe %d\n",
module_idP, lcid, module_idP, lcid,
...@@ -3364,7 +3364,7 @@ update_bsr(module_id_t module_idP, frame_t frameP, ...@@ -3364,7 +3364,7 @@ update_bsr(module_id_t module_idP, frame_t frameP,
// Trigger Regular BSR if ReTxBSR Timer has expired and UE has data for transmission // Trigger Regular BSR if ReTxBSR Timer has expired and UE has data for transmission
if (UE_mac_inst[module_idP].scheduling_info.retxBSR_SF == 0) { if (UE_mac_inst[module_idP].scheduling_info.retxBSR_SF == 0) {
bsr_regular_triggered = TRUE; bsr_regular_triggered = true;
if ((UE_mac_inst[module_idP].BSR_reporting_active & if ((UE_mac_inst[module_idP].BSR_reporting_active &
BSR_TRIGGER_REGULAR) == 0) { BSR_TRIGGER_REGULAR) == 0) {
......
...@@ -74,7 +74,7 @@ extern uint8_t rb_table[34]; ...@@ -74,7 +74,7 @@ extern uint8_t rb_table[34];
extern uint16_t pre_nb_rbs_required[2][MAX_NUM_CCs][NUMBER_OF_UE_MAX]; extern uint16_t pre_nb_rbs_required[2][MAX_NUM_CCs][NUMBER_OF_UE_MAX];
extern uint8_t dlsch_ue_select_tbl_in_use; extern uint8_t dlsch_ue_select_tbl_in_use;
extern uint8_t new_dlsch_ue_select_tbl_in_use; extern uint8_t new_dlsch_ue_select_tbl_in_use;
extern boolean_t pre_scd_activeUE[NUMBER_OF_UE_MAX]; extern bool pre_scd_activeUE[NUMBER_OF_UE_MAX];
extern eNB_UE_STATS pre_scd_eNB_UE_stats[MAX_NUM_CCs][NUMBER_OF_UE_MAX]; extern eNB_UE_STATS pre_scd_eNB_UE_stats[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
#endif*/ #endif*/
......
...@@ -580,7 +580,7 @@ int nr_rrc_mac_config_req_ue_logicalChannelBearer( ...@@ -580,7 +580,7 @@ int nr_rrc_mac_config_req_ue_logicalChannelBearer(
int cc_idP, int cc_idP,
uint8_t gNB_index, uint8_t gNB_index,
long logicalChannelIdentity, long logicalChannelIdentity,
boolean_t status){ bool status){
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id); NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
mac->logicalChannelBearer_exist[logicalChannelIdentity] = status; mac->logicalChannelBearer_exist[logicalChannelIdentity] = status;
return 0; return 0;
......
...@@ -415,7 +415,7 @@ typedef struct { ...@@ -415,7 +415,7 @@ typedef struct {
uint8_t BSR_reporting_active; uint8_t BSR_reporting_active;
/// LogicalChannelConfig has bearer. /// LogicalChannelConfig has bearer.
boolean_t logicalChannelBearer_exist[NR_MAX_NUM_LCID]; bool logicalChannelBearer_exist[NR_MAX_NUM_LCID];
NR_UE_SCHEDULING_INFO scheduling_info; NR_UE_SCHEDULING_INFO scheduling_info;
/// PHR /// PHR
...@@ -546,7 +546,7 @@ typedef struct prach_association_pattern { ...@@ -546,7 +546,7 @@ typedef struct prach_association_pattern {
// SSB details // SSB details
typedef struct ssb_info { typedef struct ssb_info {
boolean_t transmitted; // True if the SSB index is transmitted according to the SSB positions map configuration bool transmitted; // True if the SSB index is transmitted according to the SSB positions map configuration
prach_occasion_info_t *mapped_ro[MAX_NB_RO_PER_SSB_IN_ASSOCIATION_PATTERN]; // List of mapped RACH Occasions to this SSB index prach_occasion_info_t *mapped_ro[MAX_NB_RO_PER_SSB_IN_ASSOCIATION_PATTERN]; // List of mapped RACH Occasions to this SSB index
uint16_t nb_mapped_ro; // Total number of mapped ROs to this SSB index uint16_t nb_mapped_ro; // Total number of mapped ROs to this SSB index
} ssb_info_t; } ssb_info_t;
......
...@@ -85,14 +85,12 @@ int8_t nr_ue_decode_BCCH_DL_SCH(module_id_t module_id, ...@@ -85,14 +85,12 @@ int8_t nr_ue_decode_BCCH_DL_SCH(module_id_t module_id,
\param cc_id component carrier id \param cc_id component carrier id
\param gNB_index gNB index \param gNB_index gNB index
\param long logicalChannelIdentity \param long logicalChannelIdentity
\param boolean_t status*/ \param bool status*/
int nr_rrc_mac_config_req_ue_logicalChannelBearer( int nr_rrc_mac_config_req_ue_logicalChannelBearer(module_id_t module_id,
module_id_t module_id, int cc_idP,
int cc_idP, uint8_t gNB_index,
uint8_t gNB_index, long logicalChannelIdentity,
long logicalChannelIdentity, bool status);
boolean_t status
);
/**\brief primitive from RRC layer to MAC layer for configuration L1/L2, now supported 4 rrc messages: MIB, cell_group_config for MAC/PHY, spcell_config(serving cell config) /**\brief primitive from RRC layer to MAC layer for configuration L1/L2, now supported 4 rrc messages: MIB, cell_group_config for MAC/PHY, spcell_config(serving cell config)
\param module_id module id \param module_id module id
...@@ -154,14 +152,14 @@ void fill_scheduled_response(nr_scheduled_response_t *scheduled_response, ...@@ -154,14 +152,14 @@ void fill_scheduled_response(nr_scheduled_response_t *scheduled_response,
*/ */
int8_t nr_ue_get_SR(module_id_t module_idP, frame_t frameP, slot_t slotP); int8_t nr_ue_get_SR(module_id_t module_idP, frame_t frameP, slot_t slotP);
/*! \fn boolean_t update_bsr(module_id_t module_idP, frame_t frameP, slot_t slotP, uint8_t gNB_index) /*! \fn bool update_bsr(module_id_t module_idP, frame_t frameP, slot_t slotP, uint8_t gNB_index)
\brief get the rlc stats and update the bsr level for each lcid \brief get the rlc stats and update the bsr level for each lcid
\param[in] Mod_id instance of the UE \param[in] Mod_id instance of the UE
\param[in] frameP Frame index \param[in] frameP Frame index
\param[in] slot slotP number \param[in] slot slotP number
\param[in] uint8_t gNB_index \param[in] uint8_t gNB_index
*/ */
boolean_t nr_update_bsr(module_id_t module_idP, frame_t frameP, slot_t slotP, uint8_t gNB_index); bool nr_update_bsr(module_id_t module_idP, frame_t frameP, slot_t slotP, uint8_t gNB_index);
/*! \fn nr_locate_BsrIndexByBufferSize (int *table, int size, int value) /*! \fn nr_locate_BsrIndexByBufferSize (int *table, int size, int value)
\brief locate the BSR level in the table as defined in 38.321. This function requires that he values in table to be monotonic, either increasing or decreasing. The returned value is not less than 0, nor greater than n-1, where n is the size of table. \brief locate the BSR level in the table as defined in 38.321. This function requires that he values in table to be monotonic, either increasing or decreasing. The returned value is not less than 0, nor greater than n-1, where n is the size of table.
......
...@@ -325,7 +325,7 @@ void ssb_rach_config(RA_config_t *ra, NR_PRACH_RESOURCES_t *prach_resources, NR_ ...@@ -325,7 +325,7 @@ void ssb_rach_config(RA_config_t *ra, NR_PRACH_RESOURCES_t *prach_resources, NR_
// ======================================= // =======================================
NR_RACH_ConfigCommon__ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR ssb_perRACH_config = nr_rach_ConfigCommon->ssb_perRACH_OccasionAndCB_PreamblesPerSSB->present; NR_RACH_ConfigCommon__ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR ssb_perRACH_config = nr_rach_ConfigCommon->ssb_perRACH_OccasionAndCB_PreamblesPerSSB->present;
boolean_t multiple_ssb_per_ro; // true if more than one or exactly one SSB per RACH occasion, false if more than one RO per SSB bool multiple_ssb_per_ro; // true if more than one or exactly one SSB per RACH occasion, false if more than one RO per SSB
uint8_t ssb_rach_ratio; // Nb of SSBs per RACH or RACHs per SSB uint8_t ssb_rach_ratio; // Nb of SSBs per RACH or RACHs per SSB
int total_preambles_per_ssb; int total_preambles_per_ssb;
uint8_t ssb_nb_in_ro; uint8_t ssb_nb_in_ro;
......
...@@ -2002,7 +2002,7 @@ int find_pucch_resource_set(NR_UE_MAC_INST_t *mac, int uci_size) { ...@@ -2002,7 +2002,7 @@ int find_pucch_resource_set(NR_UE_MAC_INST_t *mac, int uci_size) {
* processing slots of reception/transmission * processing slots of reception/transmission
* gNB_id identifier * gNB_id identifier
* *
* RETURN : TRUE a valid resource has been found * RETURN : true a valid resource has been found
* *
* DESCRIPTION : return tx harq process identifier for given transmission slot * DESCRIPTION : return tx harq process identifier for given transmission slot
* TS 38.213 9.2.1 PUCCH Resource Sets * TS 38.213 9.2.1 PUCCH Resource Sets
...@@ -2132,7 +2132,7 @@ uint8_t get_downlink_ack(NR_UE_MAC_INST_t *mac, ...@@ -2132,7 +2132,7 @@ uint8_t get_downlink_ack(NR_UE_MAC_INST_t *mac,
int number_harq_feedback = 0; int number_harq_feedback = 0;
uint32_t dai_current = 0; uint32_t dai_current = 0;
uint32_t dai_max = 0; uint32_t dai_max = 0;
bool two_transport_blocks = FALSE; bool two_transport_blocks = false;
int number_of_code_word = 1; int number_of_code_word = 1;
int U_DAI_c = 0; int U_DAI_c = 0;
int N_m_c_rx = 0; int N_m_c_rx = 0;
...@@ -2154,7 +2154,7 @@ uint8_t get_downlink_ack(NR_UE_MAC_INST_t *mac, ...@@ -2154,7 +2154,7 @@ uint8_t get_downlink_ack(NR_UE_MAC_INST_t *mac,
bwpd->pdsch_Config->choice.setup && bwpd->pdsch_Config->choice.setup &&
bwpd->pdsch_Config->choice.setup->maxNrofCodeWordsScheduledByDCI && bwpd->pdsch_Config->choice.setup->maxNrofCodeWordsScheduledByDCI &&
bwpd->pdsch_Config->choice.setup->maxNrofCodeWordsScheduledByDCI[0] == 2) { bwpd->pdsch_Config->choice.setup->maxNrofCodeWordsScheduledByDCI[0] == 2) {
two_transport_blocks = TRUE; two_transport_blocks = true;
number_of_code_word = 2; number_of_code_word = 2;
} }
...@@ -2254,7 +2254,7 @@ uint8_t get_downlink_ack(NR_UE_MAC_INST_t *mac, ...@@ -2254,7 +2254,7 @@ uint8_t get_downlink_ack(NR_UE_MAC_INST_t *mac,
* For a monitoring occasion of a PDCCH with DCI format 1_0 or DCI format 1_1 in at least one serving cell, * For a monitoring occasion of a PDCCH with DCI format 1_0 or DCI format 1_1 in at least one serving cell,
* when a UE receives a PDSCH with one transport block and the value of higher layer parameter maxNrofCodeWordsScheduledByDCI is 2, * when a UE receives a PDSCH with one transport block and the value of higher layer parameter maxNrofCodeWordsScheduledByDCI is 2,
* the HARQ-ACK response is associated with the first transport block and the UE generates a NACK for the second transport block * the HARQ-ACK response is associated with the first transport block and the UE generates a NACK for the second transport block
* if spatial bundling is not applied (HARQ-ACK-spatial-bundling-PUCCH = FALSE) and generates HARQ-ACK value of ACK for the second * if spatial bundling is not applied (HARQ-ACK-spatial-bundling-PUCCH = false) and generates HARQ-ACK value of ACK for the second
* transport block if spatial bundling is applied. * transport block if spatial bundling is applied.
*/ */
...@@ -2265,7 +2265,7 @@ uint8_t get_downlink_ack(NR_UE_MAC_INST_t *mac, ...@@ -2265,7 +2265,7 @@ uint8_t get_downlink_ack(NR_UE_MAC_INST_t *mac,
ack_data[code_word][i] = 0; /* nack data transport block which has been missed */ ack_data[code_word][i] = 0; /* nack data transport block which has been missed */
number_harq_feedback++; number_harq_feedback++;
} }
if (two_transport_blocks == TRUE) { if (two_transport_blocks == true) {
dai_total[code_word][i] = dai[code_word][i]; /* for a single cell, dai_total is the same as dai of first cell */ dai_total[code_word][i] = dai[code_word][i]; /* for a single cell, dai_total is the same as dai of first cell */
} }
} }
...@@ -2296,7 +2296,7 @@ uint8_t get_downlink_ack(NR_UE_MAC_INST_t *mac, ...@@ -2296,7 +2296,7 @@ uint8_t get_downlink_ack(NR_UE_MAC_INST_t *mac,
o_ACK = o_ACK | (ack_data[1][m] << O_bit_number_cw1); o_ACK = o_ACK | (ack_data[1][m] << O_bit_number_cw1);
} }
if (two_transport_blocks == TRUE) { if (two_transport_blocks == true) {
O_bit_number_cw0 = (8 * j) + 2*(V_temp - 1); O_bit_number_cw0 = (8 * j) + 2*(V_temp - 1);
} }
else { else {
...@@ -2311,7 +2311,7 @@ uint8_t get_downlink_ack(NR_UE_MAC_INST_t *mac, ...@@ -2311,7 +2311,7 @@ uint8_t get_downlink_ack(NR_UE_MAC_INST_t *mac,
j = j + 1; j = j + 1;
} }
if (two_transport_blocks == TRUE) { if (two_transport_blocks == true) {
O_ACK = 2 * ( 4 * j + V_temp2); /* for two transport blocks */ O_ACK = 2 * ( 4 * j + V_temp2); /* for two transport blocks */
} }
else { else {
......
...@@ -1247,7 +1247,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in ...@@ -1247,7 +1247,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
} }
//Check whether Regular BSR is triggered //Check whether Regular BSR is triggered
if (nr_update_bsr(mod_id, txFrameP, txSlotP, gNB_indexP) == TRUE) { if (nr_update_bsr(mod_id, txFrameP, txSlotP, gNB_indexP) == true) {
// call SR procedure to generate pending SR and BSR for next PUCCH/PUSCH TxOp. This should implement the procedures // call SR procedure to generate pending SR and BSR for next PUCCH/PUSCH TxOp. This should implement the procedures
// outlined in Sections 5.4.4 an 5.4.5 of 38.321 // outlined in Sections 5.4.4 an 5.4.5 of 38.321
mac->scheduling_info.SR_pending = 1; mac->scheduling_info.SR_pending = 1;
...@@ -1260,10 +1260,10 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in ...@@ -1260,10 +1260,10 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
} }
boolean_t bool
nr_update_bsr(module_id_t module_idP, frame_t frameP, slot_t slotP, uint8_t gNB_index) { nr_update_bsr(module_id_t module_idP, frame_t frameP, slot_t slotP, uint8_t gNB_index) {
mac_rlc_status_resp_t rlc_status; mac_rlc_status_resp_t rlc_status;
boolean_t bsr_regular_triggered = FALSE; bool bsr_regular_triggered = false;
uint8_t lcid; uint8_t lcid;
uint8_t lcgid; uint8_t lcgid;
uint8_t num_lcid_with_data = 0; // for LCID with data only if LCGID is defined uint8_t num_lcid_with_data = 0; // for LCID with data only if LCGID is defined
...@@ -1356,7 +1356,7 @@ nr_update_bsr(module_id_t module_idP, frame_t frameP, slot_t slotP, uint8_t gNB_ ...@@ -1356,7 +1356,7 @@ nr_update_bsr(module_id_t module_idP, frame_t frameP, slot_t slotP, uint8_t gNB_
which belong to any LCG and for which data is already available for transmission which belong to any LCG and for which data is already available for transmission
*/ */
{ {
bsr_regular_triggered = TRUE; bsr_regular_triggered = true;
LOG_D(NR_MAC, "[UE %d] PDCCH Tick : MAC BSR Triggered LCID%d LCGID%d data become available at frame %d slot %d\n", LOG_D(NR_MAC, "[UE %d] PDCCH Tick : MAC BSR Triggered LCID%d LCGID%d data become available at frame %d slot %d\n",
module_idP, lcid, module_idP, lcid,
mac->scheduling_info.LCGID[lcid], mac->scheduling_info.LCGID[lcid],
...@@ -1367,7 +1367,7 @@ nr_update_bsr(module_id_t module_idP, frame_t frameP, slot_t slotP, uint8_t gNB_ ...@@ -1367,7 +1367,7 @@ nr_update_bsr(module_id_t module_idP, frame_t frameP, slot_t slotP, uint8_t gNB_
// Trigger Regular BSR if ReTxBSR Timer has expired and UE has data for transmission // Trigger Regular BSR if ReTxBSR Timer has expired and UE has data for transmission
if (mac->scheduling_info.retxBSR_SF == 0) { if (mac->scheduling_info.retxBSR_SF == 0) {
bsr_regular_triggered = TRUE; bsr_regular_triggered = true;
if ((mac->BSR_reporting_active & NR_BSR_TRIGGER_REGULAR) == 0) { if ((mac->BSR_reporting_active & NR_BSR_TRIGGER_REGULAR) == 0) {
LOG_I(NR_MAC, "[UE %d] PDCCH Tick : MAC BSR Triggered ReTxBSR Timer expiry at frame %d slot %d\n", LOG_I(NR_MAC, "[UE %d] PDCCH Tick : MAC BSR Triggered ReTxBSR Timer expiry at frame %d slot %d\n",
...@@ -1628,7 +1628,7 @@ static void build_ro_list(NR_UE_MAC_INST_t *mac) { ...@@ -1628,7 +1628,7 @@ static void build_ro_list(NR_UE_MAC_INST_t *mac) {
int y2; // PRACH Configuration Index table additional variable used to compute the valid frame numbers int y2; // PRACH Configuration Index table additional variable used to compute the valid frame numbers
uint8_t slot_shift_for_map; uint8_t slot_shift_for_map;
uint8_t map_shift; uint8_t map_shift;
boolean_t even_slot_invalid; bool even_slot_invalid;
int64_t s_map; int64_t s_map;
uint8_t prach_conf_start_symbol; // Starting symbol of the PRACH occasions in the PRACH slot uint8_t prach_conf_start_symbol; // Starting symbol of the PRACH occasions in the PRACH slot
uint8_t N_t_slot; // Number of PRACH occasions in a 14-symbols PRACH slot uint8_t N_t_slot; // Number of PRACH occasions in a 14-symbols PRACH slot
...@@ -1900,7 +1900,7 @@ static void map_ssb_to_ro(NR_UE_MAC_INST_t *mac) { ...@@ -1900,7 +1900,7 @@ static void map_ssb_to_ro(NR_UE_MAC_INST_t *mac) {
mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup; mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup;
NR_RACH_ConfigCommon__ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR ssb_perRACH_config = setup->ssb_perRACH_OccasionAndCB_PreamblesPerSSB->present; NR_RACH_ConfigCommon__ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR ssb_perRACH_config = setup->ssb_perRACH_OccasionAndCB_PreamblesPerSSB->present;
boolean_t multiple_ssb_per_ro; // true if more than one or exactly one SSB per RACH occasion, false if more than one RO per SSB bool multiple_ssb_per_ro; // true if more than one or exactly one SSB per RACH occasion, false if more than one RO per SSB
uint8_t ssb_rach_ratio; // Nb of SSBs per RACH or RACHs per SSB uint8_t ssb_rach_ratio; // Nb of SSBs per RACH or RACHs per SSB
uint16_t required_nb_of_prach_occasion; // Nb of RACH occasions required to map all the SSBs uint16_t required_nb_of_prach_occasion; // Nb of RACH occasions required to map all the SSBs
uint8_t required_nb_of_prach_conf_period; // Nb of PRACH configuration periods required to map all the SSBs uint8_t required_nb_of_prach_conf_period; // Nb of PRACH configuration periods required to map all the SSBs
......
...@@ -365,6 +365,18 @@ void nr_store_dlsch_buffer(module_id_t module_id, ...@@ -365,6 +365,18 @@ void nr_store_dlsch_buffer(module_id_t module_id,
} }
} }
void abort_nr_dl_harq(NR_UE_info_t* UE, int8_t harq_pid) {
NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl;
NR_UE_harq_t *harq = &sched_ctrl->harq_processes[harq_pid];
harq->ndi ^= 1;
harq->round = 0;
UE->mac_stats.dl.errors++;
add_tail_nr_list(&sched_ctrl->available_dl_harq, harq_pid);
}
bool allocate_dl_retransmission(module_id_t module_id, bool allocate_dl_retransmission(module_id_t module_id,
frame_t frame, frame_t frame,
sub_frame_t slot, sub_frame_t slot,
...@@ -378,6 +390,17 @@ bool allocate_dl_retransmission(module_id_t module_id, ...@@ -378,6 +390,17 @@ bool allocate_dl_retransmission(module_id_t module_id,
NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl; NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl;
NR_sched_pdsch_t *retInfo = &sched_ctrl->harq_processes[current_harq_pid].sched_pdsch; NR_sched_pdsch_t *retInfo = &sched_ctrl->harq_processes[current_harq_pid].sched_pdsch;
NR_CellGroupConfig_t *cg = UE->CellGroup; NR_CellGroupConfig_t *cg = UE->CellGroup;
NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static;
//TODO remove this and handle retransmission with old nrOfLayers
// once ps structure is removed
if(ps->nrOfLayers < retInfo->nrOfLayers) {
LOG_W(NR_MAC,"Cannot schedule retransmission. RI changed from %d to %d\n",
retInfo->nrOfLayers, ps->nrOfLayers);
abort_nr_dl_harq(UE, current_harq_pid);
remove_front_nr_list(&sched_ctrl->retrans_dl_harq);
return false;
}
NR_BWP_DownlinkDedicated_t *bwpd = NR_BWP_DownlinkDedicated_t *bwpd =
cg && cg &&
...@@ -401,7 +424,6 @@ bool allocate_dl_retransmission(module_id_t module_id, ...@@ -401,7 +424,6 @@ bool allocate_dl_retransmission(module_id_t module_id,
const uint16_t bwpSize = coresetid == 0 ? RC.nrmac[module_id]->cset0_bwp_size : NRRIV2BW(genericParameters->locationAndBandwidth, MAX_BWP_SIZE); const uint16_t bwpSize = coresetid == 0 ? RC.nrmac[module_id]->cset0_bwp_size : NRRIV2BW(genericParameters->locationAndBandwidth, MAX_BWP_SIZE);
int rbStart = 0; // start wrt BWPstart int rbStart = 0; // start wrt BWPstart
NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static;
int rbSize = 0; int rbSize = 0;
const int tda = get_dl_tda(RC.nrmac[module_id], scc, slot); const int tda = get_dl_tda(RC.nrmac[module_id], scc, slot);
AssertFatal(tda>=0,"Unable to find PDSCH time domain allocation in list\n"); AssertFatal(tda>=0,"Unable to find PDSCH time domain allocation in list\n");
...@@ -1355,6 +1377,8 @@ void nr_schedule_ue_spec(module_id_t module_id, ...@@ -1355,6 +1377,8 @@ void nr_schedule_ue_spec(module_id_t module_id,
/* save which time allocation has been used, to be used on /* save which time allocation has been used, to be used on
* retransmissions */ * retransmissions */
harq->sched_pdsch.time_domain_allocation = ps->time_domain_allocation; harq->sched_pdsch.time_domain_allocation = ps->time_domain_allocation;
/* save nr of layers for retransmissions */
harq->sched_pdsch.nrOfLayers = ps->nrOfLayers;
// ta command is sent, values are reset // ta command is sent, values are reset
if (sched_ctrl->ta_apply) { if (sched_ctrl->ta_apply) {
......
...@@ -826,14 +826,8 @@ static void handle_dl_harq(NR_UE_info_t * UE, ...@@ -826,14 +826,8 @@ static void handle_dl_harq(NR_UE_info_t * UE,
harq->ndi ^= 1; harq->ndi ^= 1;
} else if (harq->round >= harq_round_max - 1) { } else if (harq->round >= harq_round_max - 1) {
add_tail_nr_list(&UE->UE_sched_ctrl.available_dl_harq, harq_pid); abort_nr_dl_harq(UE, harq_pid);
harq->round = 0; LOG_D(NR_MAC, "retransmission error for UE %04x (total %"PRIu64")\n", UE->rnti, UE->mac_stats.dl.errors);
harq->ndi ^= 1;
NR_mac_stats_t *stats = &UE->mac_stats;
stats->dl.errors++;
LOG_D(NR_MAC, "retransmission error for UE %04x (total %"PRIu64")\n", UE->rnti, stats->dl.errors);
} else { } else {
LOG_D(PHY,"NACK for: pid %d, ue %04x\n",harq_pid, UE->rnti); LOG_D(PHY,"NACK for: pid %d, ue %04x\n",harq_pid, UE->rnti);
add_tail_nr_list(&UE->UE_sched_ctrl.retrans_dl_harq, harq_pid); add_tail_nr_list(&UE->UE_sched_ctrl.retrans_dl_harq, harq_pid);
......
...@@ -522,4 +522,6 @@ size_t dump_mac_stats(gNB_MAC_INST *gNB, char *output, size_t strlen, bool reset ...@@ -522,4 +522,6 @@ size_t dump_mac_stats(gNB_MAC_INST *gNB, char *output, size_t strlen, bool reset
void process_CellGroup(NR_CellGroupConfig_t *CellGroup, NR_UE_sched_ctrl_t *sched_ctrl); void process_CellGroup(NR_CellGroupConfig_t *CellGroup, NR_UE_sched_ctrl_t *sched_ctrl);
void abort_nr_dl_harq(NR_UE_info_t* UE, int8_t harq_pid);
#endif /*__LAYER2_NR_MAC_PROTO_H__*/ #endif /*__LAYER2_NR_MAC_PROTO_H__*/
...@@ -211,8 +211,8 @@ void mac_top_init_gNB(void) ...@@ -211,8 +211,8 @@ void mac_top_init_gNB(void)
RC.nrmac[i]->pre_processor_dl = nr_init_fr1_dlsch_preprocessor(i, 0); RC.nrmac[i]->pre_processor_dl = nr_init_fr1_dlsch_preprocessor(i, 0);
RC.nrmac[i]->pre_processor_ul = nr_init_fr1_ulsch_preprocessor(i, 0); RC.nrmac[i]->pre_processor_ul = nr_init_fr1_ulsch_preprocessor(i, 0);
} }
pthread_create(&RC.nrmac[i]->stats_thread,NULL,nrmac_stats_thread,(void*)RC.nrmac[i]); if (!IS_SOFTMODEM_NOSTATS_BIT)
pthread_create(&RC.nrmac[i]->stats_thread, NULL, nrmac_stats_thread, (void*)RC.nrmac[i]);
}//END for (i = 0; i < RC.nb_nr_macrlc_inst; i++) }//END for (i = 0; i < RC.nb_nr_macrlc_inst; i++)
AssertFatal(rlc_module_init(1) == 0,"Could not initialize RLC layer\n"); AssertFatal(rlc_module_init(1) == 0,"Could not initialize RLC layer\n");
......
...@@ -440,6 +440,7 @@ typedef struct NR_sched_pdsch { ...@@ -440,6 +440,7 @@ typedef struct NR_sched_pdsch {
/// only important for retransmissions; otherwise, the TDA in /// only important for retransmissions; otherwise, the TDA in
/// NR_pdsch_semi_static_t has precedence /// NR_pdsch_semi_static_t has precedence
int time_domain_allocation; int time_domain_allocation;
uint8_t nrOfLayers;
} NR_sched_pdsch_t; } NR_sched_pdsch_t;
typedef struct NR_UE_harq { typedef struct NR_UE_harq {
...@@ -673,7 +674,6 @@ typedef struct { ...@@ -673,7 +674,6 @@ typedef struct {
} NR_UE_sched_ctrl_t; } NR_UE_sched_ctrl_t;
typedef struct { typedef struct {
boolean_t fiveG_connected;
uicc_t *uicc; uicc_t *uicc;
} NRUEcontext_t; } NRUEcontext_t;
......