Newer
Older

knopp
committed
* Licensed to the OpenAirInterface (OAI) Software Alliance under one
* or more contributor license agreements. See the NOTICE file
* distributed with this work for additional information regarding
* copyright ownership. The OpenAirInterface Software Alliance
* licenses this file to You under the OAI Public License, Version 1.1
* (the "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*! \file ue_procedures.c
* \author Navid Nikaein and Raymond Knopp
* \date 2010 - 2014
* \version 1
* \email: navid.nikaein@eurecom.fr
* @ingroup _mac

Florian Kaltenberger
committed
#ifdef EXMIMO
#include <pthread.h>
#endif
#include "extern.h"
#include "defs.h"
#include "proto.h"
#ifdef PHY_EMUL
# include "SIMULATION/PHY_EMULATION/impl_defs.h"
#else
# include "SCHED/defs.h"
# include "PHY/impl_defs_top.h"
#endif
#include "PHY_INTERFACE/extern.h"
#include "COMMON/mac_rrc_primitives.h"
#include "RRC/L2_INTERFACE/openair_rrc_L2_interface.h"
#include "RRC/LITE/extern.h"
#include "UTIL/LOG/log.h"
#include "UTIL/LOG/vcd_signal_dumper.h"
#include "OCG.h"
#include "OCG_extern.h"
Panos Matzakos
committed
#include "openair2/PHY_INTERFACE/phy_stub_UE.h"
#ifdef PHY_EMUL
#endif

Florian Kaltenberger
committed
#include "pdcp.h"
#if defined(ENABLE_ITTI)
# include "intertask_interface.h"
#endif
#include "SIMULATION/TOOLS/defs.h" // for taus
#define DEBUG_HEADER_PARSING 1
Panos Matzakos
committed
extern UL_IND_t *UL_INFO;
extern uint8_t nfapi_mode;
/*
#ifndef USER_MODE
#define msg debug_msg
#endif
mapping BSR_names[] = {
{"NONE", 0},
{"SHORT BSR", 1},
{"TRUNCATED BSR", 2},
{"LONG BSR", 3},
{"PADDING BSR", 4},
{NULL, -1}
};
void ue_init_mac(module_id_t module_idP)
{
nikaeinn
committed
int i;
// default values as deined in 36.331 sec 9.2.2
LOG_I(MAC,"[UE%d] Applying default macMainConfig\n",module_idP);
//UE_mac_inst[module_idP].scheduling_info.macConfig=NULL;
UE_mac_inst[module_idP].scheduling_info.retxBSR_Timer= RetxBSR_Timer_r12_sf10240;
UE_mac_inst[module_idP].scheduling_info.periodicBSR_Timer=PeriodicBSR_Timer_r12_infinity;
UE_mac_inst[module_idP].scheduling_info.periodicPHR_Timer = MAC_MainConfig__phr_Config__setup__periodicPHR_Timer_sf20;
UE_mac_inst[module_idP].scheduling_info.prohibitPHR_Timer = MAC_MainConfig__phr_Config__setup__prohibitPHR_Timer_sf20;
UE_mac_inst[module_idP].scheduling_info.PathlossChange_db = MAC_MainConfig__phr_Config__setup__dl_PathlossChange_dB1;
UE_mac_inst[module_idP].PHR_state = MAC_MainConfig__phr_Config_PR_setup;
UE_mac_inst[module_idP].scheduling_info.SR_COUNTER=0;
UE_mac_inst[module_idP].scheduling_info.sr_ProhibitTimer=0;
UE_mac_inst[module_idP].scheduling_info.sr_ProhibitTimer_Running=0;
UE_mac_inst[module_idP].scheduling_info.maxHARQ_Tx=MAC_MainConfig__ul_SCH_Config__maxHARQ_Tx_n5;
UE_mac_inst[module_idP].scheduling_info.ttiBundling=0;
UE_mac_inst[module_idP].scheduling_info.extendedBSR_Sizes_r10=0;
UE_mac_inst[module_idP].scheduling_info.extendedPHR_r10=0;
UE_mac_inst[module_idP].scheduling_info.drx_config=NULL;
UE_mac_inst[module_idP].scheduling_info.phr_config=NULL;
// set init value 0xFFFF, make sure periodic timer and retx time counters are NOT active, after bsr transmission set the value configured by the NW.
UE_mac_inst[module_idP].scheduling_info.periodicBSR_SF = MAC_UE_BSR_TIMER_NOT_RUNNING;
UE_mac_inst[module_idP].scheduling_info.retxBSR_SF = MAC_UE_BSR_TIMER_NOT_RUNNING;
UE_mac_inst[module_idP].BSR_reporting_active = BSR_TRIGGER_NONE;
UE_mac_inst[module_idP].scheduling_info.periodicPHR_SF = get_sf_perioidicPHR_Timer(UE_mac_inst[module_idP].scheduling_info.periodicPHR_Timer);
UE_mac_inst[module_idP].scheduling_info.prohibitPHR_SF = get_sf_prohibitPHR_Timer(UE_mac_inst[module_idP].scheduling_info.prohibitPHR_Timer);
UE_mac_inst[module_idP].scheduling_info.PathlossChange_db = get_db_dl_PathlossChange(UE_mac_inst[module_idP].scheduling_info.PathlossChange);
for (i=0; i < MAX_NUM_LCID; i++) {
LOG_D(MAC,"[UE%d] Applying default logical channel config for LCGID %d\n",module_idP,i);
UE_mac_inst[module_idP].scheduling_info.Bj[i]=-1;
UE_mac_inst[module_idP].scheduling_info.bucket_size[i]=-1;
if (i < DTCH) { // initilize all control channels lcgid to 0
UE_mac_inst[module_idP].scheduling_info.LCGID[i]=0;
} else { // initialize all the data channels lcgid to 1
UE_mac_inst[module_idP].scheduling_info.LCGID[i]=1;
UE_mac_inst[module_idP].scheduling_info.LCID_status[i]=LCID_EMPTY;
UE_mac_inst[module_idP].scheduling_info.LCID_buffer_remain[i] = 0;
Panos Matzakos
committed
if(nfapi_mode == 3) {
pthread_mutex_init(&UE_mac_inst[module_idP].UL_INFO_mutex,NULL);
UE_mac_inst[module_idP].UE_mode[0] = NOT_SYNCHED; //PRACH;
Panos Matzakos
committed
UE_mac_inst[module_idP].first_ULSCH_Tx =0;
UE_mac_inst[module_idP].dl_config_req = NULL;
UE_mac_inst[module_idP].ul_config_req = NULL;
UE_mac_inst[module_idP].hi_dci0_req = NULL;
UE_mac_inst[module_idP].tx_req = NULL;
}
for (i=0; i <NUM_MAX_CBA_GROUP; i++) {
UE_mac_inst[module_idP].cba_last_access[i]= round(uniform_rngen(1,30));
#endif
}
unsigned char *parse_header(unsigned char *mac_header,
unsigned char *num_ce,
unsigned char *num_sdu,
unsigned char *rx_ces,
unsigned char *rx_lcids,
unsigned short *rx_lengths,
unsigned short tb_length)
{
unsigned char not_done=1,num_ces=0,num_cont_res = 0,num_padding = 0,num_sdus=0,lcid, num_sdu_cnt;
unsigned char *mac_header_ptr = mac_header;
unsigned short length,ce_len=0;
while (not_done==1) {
if (((SCH_SUBHEADER_FIXED *)mac_header_ptr)->E == 0) {
// printf("E=0\n");
not_done = 0;
}
lcid = ((SCH_SUBHEADER_FIXED *)mac_header_ptr)->LCID;
if (lcid < UE_CONT_RES) {
//printf("[MAC][UE] header %x.%x.%x\n",mac_header_ptr[0],mac_header_ptr[1],mac_header_ptr[2]);
if (not_done==0) {// last MAC SDU, length is implicit
mac_header_ptr++;
length = tb_length-(mac_header_ptr-mac_header)-ce_len;
for (num_sdu_cnt=0; num_sdu_cnt < num_sdus ; num_sdu_cnt++) {
length -= rx_lengths[num_sdu_cnt];
} else {
if (((SCH_SUBHEADER_LONG *)mac_header_ptr)->F == 1) {
length = ((((SCH_SUBHEADER_LONG *)mac_header_ptr)->L_MSB & 0x7f ) << 8 ) | (((SCH_SUBHEADER_LONG *)mac_header_ptr)->L_LSB & 0xff);
mac_header_ptr += 3;
#ifdef DEBUG_HEADER_PARSING
LOG_D(MAC,"[UE] parse long sdu, size %x \n",length);
#endif
} else { //if (((SCH_SUBHEADER_SHORT *)mac_header_ptr)->F == 0) {
length = ((SCH_SUBHEADER_SHORT *)mac_header_ptr)->L;
mac_header_ptr += 2;
}
}
#ifdef DEBUG_HEADER_PARSING
LOG_D(MAC,"[UE] sdu %d lcid %d length %d (offset now %ld)\n",
num_sdus,lcid,length,mac_header_ptr-mac_header);
#endif
rx_lcids[num_sdus] = lcid;
rx_lengths[num_sdus] = length;
num_sdus++;
} else { // This is a control element subheader
if (lcid == SHORT_PADDING) {
mac_header_ptr++;
} else {
rx_ces[num_ces] = lcid;
num_ces++;
mac_header_ptr ++;
ce_len++;
// FNA: check MAC Header is one of thoses defined in Annex B of 36.321
// Check there is only 1 Contention Resolution
if (num_cont_res) {
LOG_W(MAC,"[UE] Msg4 Wrong received format: More than 1 Contention Resolution\n");
// exit parsing
return NULL;
}
// UE_CONT_RES shall never be the last subheader unless this is the only MAC subheader
if ((not_done == 0) && ((num_sdus) || (num_ces > 1) || (num_padding))) {
LOG_W(MAC,"[UE] Msg4 Wrong received format: Contention Resolution after num_ces=%d num_sdus=%d num_padding=%d\n",num_ces,num_sdus,num_padding);
// exit parsing
return NULL;
}
num_cont_res ++;
ce_len+=6;
#ifdef DEBUG_HEADER_PARSING
LOG_D(MAC,"[UE] ce %d lcid %d (offset now %ld)\n",num_ces,lcid,mac_header_ptr-mac_header);
#endif
*num_ce = num_ces;
*num_sdu = num_sdus;
return(mac_header_ptr);
}
uint32_t ue_get_SR(module_id_t module_idP,int CC_id,frame_t frameP,uint8_t eNB_id,uint16_t rnti, sub_frame_t subframe)
{
// no UL-SCH resources available for this tti && UE has a valid PUCCH resources for SR configuration for this tti
// int MGL=6;// measurement gap length in ms
int MGRP = 0; // measurement gap repetition period in ms
int gapOffset = -1;
int T = 0;
DevCheck(module_idP < (int)NB_UE_INST, module_idP, NB_UE_INST, 0);
AssertFatal(CC_id==0,
"Transmission on secondary CCs is not supported yet\n");
// determin the measurement gap
if (UE_mac_inst[module_idP].measGapConfig !=NULL) {
if (UE_mac_inst[module_idP].measGapConfig->choice.setup.gapOffset.present == MeasGapConfig__setup__gapOffset_PR_gp0) {
MGRP= 40;
gapOffset= UE_mac_inst[module_idP].measGapConfig->choice.setup.gapOffset.choice.gp0;
} else if (UE_mac_inst[module_idP].measGapConfig->choice.setup.gapOffset.present == MeasGapConfig__setup__gapOffset_PR_gp1) {
MGRP= 80;
gapOffset= UE_mac_inst[module_idP].measGapConfig->choice.setup.gapOffset.choice.gp1;
} else {
LOG_W(MAC, "Measurement GAP offset is unknown\n");
}
T=MGRP/10;
DevAssert( T != 0 );
//check the measurement gap and sr prohibit timer
if ((subframe == gapOffset %10) && ((frameP %T) == (floor(gapOffset/10)))
&& (UE_mac_inst[module_idP].scheduling_info.sr_ProhibitTimer_Running ==0)) {
UE_mac_inst[module_idP].scheduling_info.SR_pending=1;
return(0);
}
if ((UE_mac_inst[module_idP].physicalConfigDedicated != NULL) &&
(UE_mac_inst[module_idP].scheduling_info.SR_pending==1) &&
(UE_mac_inst[module_idP].scheduling_info.SR_COUNTER <
(1<<(2+UE_mac_inst[module_idP].physicalConfigDedicated->schedulingRequestConfig->choice.setup.dsr_TransMax)))
) {
LOG_D(MAC,"[UE %d][SR %x] Frame %d subframe %d PHY asks for SR (SR_COUNTER/dsr_TransMax %d/%d), SR_pending %d\n",
module_idP,rnti,frameP,subframe,
UE_mac_inst[module_idP].scheduling_info.SR_COUNTER,
(1<<(2+UE_mac_inst[module_idP].physicalConfigDedicated->schedulingRequestConfig->choice.setup.dsr_TransMax)),
UE_mac_inst[module_idP].scheduling_info.SR_pending);
UE_mac_inst[module_idP].scheduling_info.SR_COUNTER++;
// start the sr-prohibittimer : rel 9 and above
if (UE_mac_inst[module_idP].scheduling_info.sr_ProhibitTimer > 0) { // timer configured
UE_mac_inst[module_idP].scheduling_info.sr_ProhibitTimer--;
UE_mac_inst[module_idP].scheduling_info.sr_ProhibitTimer_Running=1;
UE_mac_inst[module_idP].scheduling_info.sr_ProhibitTimer_Running=0;
LOG_D(MAC,"[UE %d][SR %x] Frame %d subframe %d send SR indication (SR_COUNTER/dsr_TransMax %d/%d), SR_pending %d\n",
module_idP,rnti,frameP,subframe,
UE_mac_inst[module_idP].scheduling_info.SR_COUNTER,
(1<<(2+UE_mac_inst[module_idP].physicalConfigDedicated->schedulingRequestConfig->choice.setup.dsr_TransMax)),
UE_mac_inst[module_idP].scheduling_info.SR_pending);
//UE_mac_inst[module_idP].ul_active =1;
return(1); //instruct phy to signal SR
} else {
// notify RRC to relase PUCCH/SRS
// clear any configured dl/ul
// initiate RA
if (UE_mac_inst[module_idP].scheduling_info.SR_pending){
// release all pucch resource
UE_mac_inst[module_idP].physicalConfigDedicated = NULL;
UE_mac_inst[module_idP].ul_active=0;
UE_mac_inst[module_idP].BSR_reporting_active=BSR_TRIGGER_NONE;
LOG_I(MAC,"[UE %d] Release all SRs \n", module_idP);
}
UE_mac_inst[module_idP].scheduling_info.SR_pending=0;
UE_mac_inst[module_idP].scheduling_info.SR_COUNTER=0;
return(0);
}
}
//------------------------------------------------------------------------------
void
uint8_t CC_id,
frame_t frameP,
sub_frame_t subframeP,
uint8_t* sdu,
uint16_t sdu_len,
uint8_t eNB_index
)
//------------------------------------------------------------------------------
{
unsigned char rx_ces[MAX_NUM_CE],num_ce,num_sdu,i,*payload_ptr;
unsigned char rx_lcids[NB_RB_MAX];
unsigned short rx_lengths[NB_RB_MAX];
unsigned char *tx_sdu;
start_meas(&UE_mac_inst[module_idP].rx_dlsch_sdu);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SEND_SDU, VCD_FUNCTION_IN);
LOG_T(MAC,"sdu: %x.%x.%x\n",sdu[0],sdu[1],sdu[2]);
nikaeinn
committed
trace_pdu(1, sdu, sdu_len, module_idP, 3, UE_mac_inst[module_idP].crnti,
LOG_D(OPT,"[UE %d][DLSCH] Frame %d trace pdu for rnti %x with size %d\n",
module_idP, frameP, UE_mac_inst[module_idP].crnti, sdu_len);
}
payload_ptr = parse_header(sdu,&num_ce,&num_sdu,rx_ces,rx_lcids,rx_lengths,sdu_len);
#ifdef DEBUG_HEADER_PARSING
LOG_D(MAC,"[UE %d] ue_send_sdu : Frame %d eNB_index %d : num_ce %d num_sdu %d\n",module_idP,
frameP,eNB_index,num_ce,num_sdu);
#endif
#if defined(ENABLE_MAC_PAYLOAD_DEBUG)
LOG_T(MAC,"[UE %d] First 32 bytes of DLSCH : \n", module_idP);
LOG_T(MAC,"%x.",sdu[i]);
LOG_T(MAC,"\n");
#endif
for (i=0; i<num_ce; i++) {
// printf("ce %d : %d\n",i,rx_ces[i]);
switch (rx_ces[i]) {
case UE_CONT_RES:
LOG_I(MAC,"[UE %d][RAPROC] Frame %d : received contention resolution msg: %x.%x.%x.%x.%x.%x, Terminating RA procedure\n",
module_idP,frameP,payload_ptr[0],payload_ptr[1],payload_ptr[2],payload_ptr[3],payload_ptr[4],payload_ptr[5]);
if (UE_mac_inst[module_idP].RA_active == 1) {
LOG_I(MAC,"[UE %d][RAPROC] Frame %d : Clearing RA_active flag\n", module_idP, frameP);
UE_mac_inst[module_idP].RA_active=0;
// check if RA procedure has finished completely (no contention)
tx_sdu = &UE_mac_inst[module_idP].CCCH_pdu.payload[3];
//Note: 3 assumes sizeof(SCH_SUBHEADER_SHORT) + PADDING CE, which is when UL-Grant has TBS >= 9 (64 bits)
// (other possibility is 1 for TBS=7 (SCH_SUBHEADER_FIXED), or 2 for TBS=8 (SCH_SUBHEADER_FIXED+PADDING or SCH_SUBHEADER_SHORT)
for (i=0; i<6; i++)
if (tx_sdu[i] != payload_ptr[i]) {
LOG_E(MAC,"[UE %d][RAPROC] Contention detected, RA failed\n",module_idP);
if(nfapi_mode == 3) { // Panos: phy_stub mode
// Panos: Modification for phy_stub mode operation here. We only need to make sure that the ue_mode is back to
// PRACH state.
UE_mac_inst[module_idP].UE_mode[eNB_index] = PRACH;
//ra_failed(module_idP,CC_id,eNB_index);UE_mac_inst[module_idP].RA_contention_resolution_timer_active = 0;
}
else { // Full stack mode
ra_failed(module_idP,CC_id,eNB_index);
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SEND_SDU, VCD_FUNCTION_OUT);
return;
}
LOG_I(MAC,"[UE %d][RAPROC] Frame %d : Clearing contention resolution timer\n", module_idP, frameP);
UE_mac_inst[module_idP].RA_contention_resolution_timer_active = 0;
Panos Matzakos
committed
if(nfapi_mode == 3) // phy_stub mode
{
//Panos: Modification for phy_stub mode operation here. We only need to change the ue_mode to PUSCH
UE_mac_inst[module_idP].UE_mode[eNB_index] = PUSCH;
}
else { // Full stack mode
ra_succeeded(module_idP,CC_id,eNB_index);
}
}
payload_ptr+=6;
break;
case TIMING_ADV_CMD:
#ifdef DEBUG_HEADER_PARSING
LOG_D(MAC,"[UE] CE %d : UE Timing Advance : %d\n",i,payload_ptr[0]);
#endif
Panos Matzakos
committed
// Panos: Eliminate call to process_timing_advance for the phy_stub UE operation mode. Is this correct?
if (nfapi_mode!=3)
{
process_timing_advance(module_idP,CC_id,payload_ptr[0]);
}
payload_ptr++;
break;
case DRX_CMD:
#ifdef DEBUG_HEADER_PARSING
LOG_D(MAC,"[UE] CE %d : UE DRX :",i);
#endif
payload_ptr++;
break;
}
for (i=0; i<num_sdu; i++) {
#ifdef DEBUG_HEADER_PARSING
LOG_D(MAC,"[UE] SDU %d : LCID %d, length %d\n",i,rx_lcids[i],rx_lengths[i]);
#endif
if (rx_lcids[i] == CCCH) {
LOG_D(MAC,"[UE %d] rnti %x Frame %d : DLSCH -> DL-CCCH, RRC message (eNB %d, %d bytes)\n",
module_idP,
UE_mac_inst[module_idP].crnti,
frameP,
eNB_index,
rx_lengths[i]);
#if defined(ENABLE_MAC_PAYLOAD_DEBUG)
int j;
LOG_T(MAC,"%x.",(uint8_t)payload_ptr[j]);
LOG_T(MAC,"\n");
#endif
mac_rrc_data_ind(module_idP,
frameP,subframeP,
CCCH,
(uint8_t*)payload_ptr,
rx_lengths[i],
ENB_FLAG_NO,
eNB_index,
0);
} else if ((rx_lcids[i] == DCCH) || (rx_lcids[i] == DCCH1)) {
LOG_D(MAC,"[UE %d] Frame %d : DLSCH -> DL-DCCH%d, RRC message (eNB %d, %d bytes)\n", module_idP, frameP, rx_lcids[i],eNB_index,rx_lengths[i]);
mac_rlc_data_ind(module_idP,
UE_mac_inst[module_idP].crnti,
nikaeinn
committed
eNB_index,
frameP,
ENB_FLAG_NO,
MBMS_FLAG_NO,
rx_lcids[i],
(char *)payload_ptr,
rx_lengths[i],
1,
NULL);
} else if ((rx_lcids[i] < NB_RB_MAX) && (rx_lcids[i] > DCCH1 )) {
LOG_D(MAC,"[UE %d] Frame %d : DLSCH -> DL-DTCH%d (eNB %d, %d bytes)\n", module_idP, frameP,rx_lcids[i], eNB_index,rx_lengths[i]);
#if defined(ENABLE_MAC_PAYLOAD_DEBUG)
int j;
for (j=0;j<rx_lengths[i];j++)
LOG_T(MAC,"%x.",(unsigned char)payload_ptr[j]);
LOG_T(MAC,"\n");
#endif
UE_mac_inst[module_idP].crnti,
nikaeinn
committed
eNB_index,
frameP,
ENB_FLAG_NO,
MBMS_FLAG_NO,
rx_lcids[i],
(char *)payload_ptr,
rx_lengths[i],
1,
NULL);
} else {
LOG_E(MAC,"[UE %d] Frame %d : unknown LCID %d (eNB %d)\n", module_idP, frameP,rx_lcids[i], eNB_index);
}
payload_ptr+= rx_lengths[i];
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SEND_SDU, VCD_FUNCTION_OUT);
stop_meas(&UE_mac_inst[module_idP].rx_dlsch_sdu);
}
void ue_decode_si(module_id_t module_idP,int CC_id,frame_t frameP, uint8_t eNB_index, void *pdu,uint16_t len)
{
#if UE_TIMING_TRACE
start_meas(&UE_mac_inst[module_idP].rx_si);
#endif
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_DECODE_SI, VCD_FUNCTION_IN);
LOG_D(MAC,"[UE %d] Frame %d Sending SI to RRC (LCID Id %d,len %d)\n",module_idP,frameP,BCCH,len);
BCCH,
(uint8_t *)pdu,
len,
eNB_index,
0);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_DECODE_SI, VCD_FUNCTION_OUT);
stop_meas(&UE_mac_inst[module_idP].rx_si);
if (opt_enabled == 1) {
trace_pdu(0,
(uint8_t *)pdu,
len,
module_idP,
4,
0xffff,
UE_mac_inst[module_idP].rxFrame,
UE_mac_inst[module_idP].rxSubframe,
0,
0);
LOG_D(OPT,"[UE %d][BCH] Frame %d trace pdu for CC_id %d rnti %x with size %d\n",
module_idP, frameP, CC_id, 0xffff, len);
}
}
void ue_decode_p(module_id_t module_idP,int CC_id,frame_t frameP, uint8_t eNB_index, void *pdu,uint16_t len)
{
#if UE_TIMING_TRACE
start_meas(&UE_mac_inst[module_idP].rx_p);
#endif
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_DECODE_PCCH, VCD_FUNCTION_IN);
LOG_D(MAC,"[UE %d] Frame %d Sending Paging message to RRC (LCID Id %d,len %d)\n",module_idP,frameP,PCCH,len);
mac_rrc_data_ind(module_idP,
CC_id,
frameP,0, // unknown subframe
P_RNTI,
PCCH,
(uint8_t *)pdu,
len,
ENB_FLAG_NO,
eNB_index,
0);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_DECODE_PCCH, VCD_FUNCTION_OUT);
stop_meas(&UE_mac_inst[module_idP].rx_p);
if (opt_enabled == 1) {
trace_pdu(0,
(uint8_t *)pdu,
len,
module_idP,
4,
P_RNTI,
UE_mac_inst[module_idP].rxFrame,
UE_mac_inst[module_idP].rxSubframe,
0,
0);
LOG_D(OPT,"[UE %d][BCH] Frame %d trace pdu for CC_id %d rnti %x with size %d\n",
module_idP, frameP, CC_id, P_RNTI, len);
}
}
unsigned char *parse_mch_header(unsigned char *mac_header,
unsigned char *num_sdu,
unsigned char *rx_lcids,
unsigned short *rx_lengths,
unsigned short tb_length)
{
unsigned char not_done=1, num_sdus=0, lcid, i;
unsigned char *mac_header_ptr = mac_header;
unsigned short length;
while (not_done == 1) {
if (((SCH_SUBHEADER_FIXED *)mac_header_ptr)->E == 0) {
not_done = 0;
}
lcid = ((SCH_SUBHEADER_FIXED *)mac_header_ptr)->LCID;
if (lcid < SHORT_PADDING) {// subheader for MSI, MCCH or MTCH
if (not_done == 0) { // last MAC SDU, length is implicit
mac_header_ptr++;
length = tb_length- (mac_header_ptr - mac_header);
length -= rx_lengths[i];
} else { // not the last MAC SDU
if ( ((SCH_SUBHEADER_LONG *)mac_header_ptr)->F == 1) {// subheader has length of 3octets
// length = ((SCH_SUBHEADER_LONG *)mac_header_ptr)->L;
length = ((((SCH_SUBHEADER_LONG *)mac_header_ptr)->L_MSB & 0x7f ) << 8 ) | (((SCH_SUBHEADER_LONG *)mac_header_ptr)->L_LSB & 0xff);
mac_header_ptr += 3;
} else { // subheader has length of 2octets
length = ((SCH_SUBHEADER_SHORT *)mac_header_ptr)->L;
mac_header_ptr += 2;
}
rx_lcids[num_sdus] = lcid;
rx_lengths[num_sdus] = length;
num_sdus++;
} else { // subheader for padding
// if (lcid == SHORT_PADDING)
mac_header_ptr++;
}
*num_sdu = num_sdus;
return(mac_header_ptr);
}
// this function is for sending mch_sdu from phy to mac
void ue_send_mch_sdu(module_id_t module_idP, uint8_t CC_id, frame_t frameP, uint8_t *sdu, uint16_t sdu_len, uint8_t eNB_index, uint8_t sync_area)
{
unsigned char num_sdu, i, *payload_ptr;
unsigned char rx_lcids[NB_RB_MAX];
unsigned short rx_lengths[NB_RB_MAX];
start_meas(&UE_mac_inst[module_idP].rx_mch_sdu);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SEND_MCH_SDU, VCD_FUNCTION_IN);
LOG_D(MAC,"[UE %d] Frame %d : process the mch PDU for sync area %d \n",module_idP,frameP, sync_area);
LOG_D(MAC,"[UE %d] sdu: %x.%x\n", module_idP,sdu[0], sdu[1]);
LOG_D(MAC,"[UE %d] parse_mch_header, demultiplex\n",module_idP);
payload_ptr = parse_mch_header(sdu, &num_sdu, rx_lcids, rx_lengths, sdu_len);
LOG_D(MAC,"[UE %d] parse_mch_header, found %d sdus\n",module_idP,num_sdu);
for (i=0; i<num_sdu; i++) {
if (rx_lcids[i] == MCH_SCHDL_INFO) {
if (UE_mac_inst[module_idP].mcch_status==1) {
LOG_I(MAC,"[UE %d] Frame %d : MCH->MSI for sync area %d (eNB %d, %d bytes)\n",module_idP,frameP, sync_area, eNB_index, rx_lengths[i]);
// ??store necessary scheduling info to ue_mac_inst in order to
// calculate exact position of interested service (for the complex case has >1 mtch)
// set msi_status to 1
UE_mac_inst[module_idP].msi_status = 1;
} else if (rx_lcids[i] == MCCH_LCHANID) {
LOG_I(MAC,"[UE %d] Frame %d : SDU %d MCH->MCCH for sync area %d (eNB %d, %d bytes)\n",module_idP,frameP, i, sync_area, eNB_index, rx_lengths[i]);
mac_rrc_data_ind(module_idP,
MCCH,
payload_ptr, rx_lengths[i], 0, eNB_index, sync_area);
} else if (rx_lcids[i] == MTCH) {
if (UE_mac_inst[module_idP].msi_status==1) {
LOG_I(MAC,"[UE %d] Frame %d : MCH->MTCH for sync area %d (eNB %d, %d bytes)\n",module_idP,frameP, sync_area, eNB_index, rx_lengths[i]);
mac_rlc_data_ind(
module_idP,
nikaeinn
committed
eNB_index,
frameP,
ENB_FLAG_NO,
MBMS_FLAG_YES,
MTCH, /*+ (maxDRB + 3),*/
(char *)payload_ptr,
rx_lengths[i],
1,
NULL);
} else {
LOG_W(MAC,"[UE %d] Frame %d : unknown sdu %d rx_lcids[%d]=%d mcch status %d eNB %d \n",
module_idP,
frameP,
rx_lengths[i],
i,
rx_lcids[i],
UE_mac_inst[module_idP].mcch_status, eNB_index);
}
payload_ptr += rx_lengths[i];
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SEND_MCH_SDU, VCD_FUNCTION_OUT);
stop_meas(&UE_mac_inst[module_idP].rx_mch_sdu);
}
int8_t ue_get_mbsfn_sf_alloction (module_id_t module_idP, uint8_t mbsfn_sync_area, unsigned char eNB_index)
{
// currently there is one-to-one mapping between sf allocation pattern and sync area
if (mbsfn_sync_area >= MAX_MBSFN_AREA) {
LOG_W( MAC, "[UE %"PRIu8"] MBSFN synchronization area %"PRIu8" out of range for eNB %"PRIu8"\n", module_idP, mbsfn_sync_area, eNB_index );
return -1;
} else if (UE_mac_inst[module_idP].mbsfn_SubframeConfig[mbsfn_sync_area] != NULL) {
return mbsfn_sync_area;
LOG_W( MAC, "[UE %"PRIu8"] MBSFN Subframe Config pattern %"PRIu8" not found \n", module_idP, mbsfn_sync_area );
return -1;
int ue_query_mch(module_id_t module_idP, uint8_t CC_id, uint32_t frameP, uint32_t subframe, uint8_t eNB_index,uint8_t *sync_area, uint8_t *mcch_active)
{
int mcch_flag=0, mtch_flag=0, msi_flag=0;
int mbsfn_period = 0;// 1<<(UE_mac_inst[module_idP].mbsfn_SubframeConfig[0]->radioframeAllocationPeriod);
int mcch_period = 0;// 32<<(UE_mac_inst[module_idP].mbsfn_AreaInfo[0]->mcch_Config_r9.mcch_RepetitionPeriod_r9);
int frame_FDD=1;
start_meas(&UE_mac_inst[module_idP].ue_query_mch);
if (UE_mac_inst[module_idP].pmch_Config[0]) {
mch_scheduling_period = 8<<(UE_mac_inst[module_idP].pmch_Config[0]->mch_SchedulingPeriod_r9);
for (i=0;
i< UE_mac_inst[module_idP].num_active_mbsfn_area;
i++ ) {
// assume, that there is always a mapping
if ((j=ue_get_mbsfn_sf_alloction(module_idP,i,eNB_index)) == -1) {
return -1; // continue;
ii=0;
msi_pos=0;
mbsfn_period = 1<<(UE_mac_inst[module_idP].mbsfn_SubframeConfig[0]->radioframeAllocationPeriod);
mcch_period = 32<<(UE_mac_inst[module_idP].mbsfn_AreaInfo[0]->mcch_Config_r9.mcch_RepetitionPeriod_r9);
"[UE %d] Frame %d subframe %d: Checking MBSFN Sync Area %d/%d with SF allocation %d/%d for MCCH and MTCH (mbsfn period %d, mcch period %d,mac sched period (%d,%ld))\n",
module_idP,frameP, subframe,i,UE_mac_inst[module_idP].num_active_mbsfn_area,
j,UE_mac_inst[module_idP].num_sf_allocation_pattern,mbsfn_period,mcch_period,
mch_scheduling_period,UE_mac_inst[module_idP].mbsfn_SubframeConfig[j]->radioframeAllocationOffset);
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
// get the real MCS value
switch (UE_mac_inst[module_idP].mbsfn_AreaInfo[i]->mcch_Config_r9.signallingMCS_r9) {
case 0:
mcch_mcs = 2;
break;
case 1:
mcch_mcs = 7;
break;
case 2:
mcch_mcs = 13;
break;
case 3:
mcch_mcs = 19;
break;
}
if (frameP % mbsfn_period == UE_mac_inst[module_idP].mbsfn_SubframeConfig[j]->radioframeAllocationOffset) { // MBSFN frameP
if (UE_mac_inst[module_idP].mbsfn_SubframeConfig[j]->subframeAllocation.present == MBSFN_SubframeConfig__subframeAllocation_PR_oneFrame) { // one-frameP format
if (UE_mac_inst[module_idP].pmch_Config[0]) {
// Find the first subframe in this MCH to transmit MSI
if (frameP % mch_scheduling_period == UE_mac_inst[module_idP].mbsfn_SubframeConfig[j]->radioframeAllocationOffset ) {
while (ii == 0) {
ii = UE_mac_inst[module_idP].mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & (0x80>>msi_pos);
msi_pos++;
}
}
}
if (UE_mac_inst[module_idP].tdd_Config == NULL) frame_FDD=1;
else frame_FDD=0;
// Check if the subframe is for MSI, MCCH or MTCHs and Set the correspoding flag to 1
switch (subframe) {
case 1:
if (frame_FDD==1) {
if ((UE_mac_inst[module_idP].mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_FDD_SF1) == MBSFN_FDD_SF1) {
msi_flag = 1;
if ( (frameP % mcch_period == UE_mac_inst[module_idP].mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_Offset_r9) &&
((UE_mac_inst[module_idP].mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_FDD_SF1) == MBSFN_FDD_SF1) ) {
mcch_flag = 1;
mtch_flag = 1;
}
}
break;
case 2:
if (frame_FDD==1) {
if ((UE_mac_inst[module_idP].mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_FDD_SF2) == MBSFN_FDD_SF2) {
msi_flag = 1;
if ( (frameP % mcch_period == UE_mac_inst[module_idP].mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_Offset_r9) &&
((UE_mac_inst[module_idP].mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_FDD_SF2) == MBSFN_FDD_SF2) ) {
mcch_flag = 1;
mtch_flag = 1;
}
}
break;
case 3:
if (frame_FDD==0) { //TDD
if ((UE_mac_inst[module_idP].mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_TDD_SF3) == MBSFN_TDD_SF3) {
msi_flag = 1;
if ( (frameP % mcch_period == UE_mac_inst[module_idP].mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_Offset_r9) &&
((UE_mac_inst[module_idP].mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_TDD_SF3) == MBSFN_TDD_SF3) ) {
mcch_flag = 1;
mtch_flag = 1;
}
} else { // FDD
if ((UE_mac_inst[module_idP].mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_FDD_SF3) == MBSFN_FDD_SF3) {
msi_flag = 1;
if ((frameP % mcch_period == UE_mac_inst[module_idP].mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_Offset_r9) &&
((UE_mac_inst[module_idP].mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_FDD_SF3) == MBSFN_FDD_SF3) ) {
mcch_flag = 1;
mtch_flag = 1;
}
}
break;
case 4:
if (frame_FDD==0) {
if ((UE_mac_inst[module_idP].mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_TDD_SF4) == MBSFN_TDD_SF4) {
msi_flag = 1;
if ((frameP % mcch_period == UE_mac_inst[module_idP].mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_Offset_r9) &&
((UE_mac_inst[module_idP].mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_TDD_SF4) == MBSFN_TDD_SF4) ) {
mcch_flag = 1;
mtch_flag = 1;
}
}
break;
case 6:
if (frame_FDD==1) {
if ((UE_mac_inst[module_idP].mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_FDD_SF6) == MBSFN_FDD_SF6) {
msi_flag = 1;
if ((frameP % mcch_period == UE_mac_inst[module_idP].mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_Offset_r9) &&
((UE_mac_inst[module_idP].mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_FDD_SF6) == MBSFN_FDD_SF6) ) {
mcch_flag = 1;
mtch_flag = 1;
}
break;
case 7:
if (frame_FDD==0) { // TDD
if ((UE_mac_inst[module_idP].mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_TDD_SF7) == MBSFN_TDD_SF7) {
msi_flag = 1;
if ((frameP % mcch_period == UE_mac_inst[module_idP].mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_Offset_r9) &&
((UE_mac_inst[module_idP].mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_TDD_SF7) == MBSFN_TDD_SF7) ) {
mcch_flag = 1;
mtch_flag = 1;
}
} else { // FDD
if ((UE_mac_inst[module_idP].mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_FDD_SF7) == MBSFN_FDD_SF7) {
msi_flag = 1;
if ((frameP % mcch_period == UE_mac_inst[module_idP].mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_Offset_r9) &&
((UE_mac_inst[module_idP].mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_FDD_SF7) == MBSFN_FDD_SF7) ) {
mcch_flag = 1;
mtch_flag = 1;
}
break;
case 8:
if (frame_FDD==0) { //TDD
if ((UE_mac_inst[module_idP].mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_TDD_SF8) == MBSFN_TDD_SF8) {
msi_flag = 1;
if ( (frameP % mcch_period == UE_mac_inst[module_idP].mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_Offset_r9) &&
((UE_mac_inst[module_idP].mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_TDD_SF8) == MBSFN_TDD_SF8) ) {
mcch_flag = 1;
mtch_flag = 1;
}
} else { // FDD
if ((UE_mac_inst[module_idP].mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_FDD_SF8) == MBSFN_FDD_SF8) {
msi_flag = 1;
if ((frameP % mcch_period == UE_mac_inst[module_idP].mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_Offset_r9) &&
((UE_mac_inst[module_idP].mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_FDD_SF8) == MBSFN_FDD_SF8) ) {
mcch_flag = 1;
mtch_flag = 1;
}
}
break;
case 9:
if (frame_FDD==0) {
if ((UE_mac_inst[module_idP].mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_TDD_SF9) == MBSFN_TDD_SF9) {