5g-nr-development-and-setup.md

+This page is dedicated to the 5G-NR development in OpenAirInterface
+
+# Building and usage
+Please see:  
+- https://gitlab.eurecom.fr/oai/openairinterface5g/blob/develop/doc/BUILD.md
+- https://gitlab.eurecom.fr/oai/openairinterface5g/blob/develop/doc/RUNMODEM.md
+
+# Development process
+Main branch for development is oai/develop. When a new feature for 5G-NR is developed, a feature branch is created starting from the latest oai/develop. When finished it is merged back to oai/develop.
+
+There is a dedicated mailing list for the project: openair5g-nr@lists.eurecom.fr. You may subscribe here: https://lists.eurecom.fr/sympa/subscribe/openair5g-nr. 
+
+We use trello to track the development process: https://trello.com/b/7kFj0kFp/oai-weekly-meetings. To get access to it, write an email to the mailing list (see above).
+
+Progress is also discussed in our developer meetings. See [OpenAirDevMeetings](https://gitlab.eurecom.fr/oai/openairinterface5g/wikis/OpenAirDevMeetings)for more details.
+
+# Hardware requirements
+
+## PC
+The processing requirements for 5G-NR are much higher than for 4G, so a high end PC or server is needed.  
+So far, we have been using:
+
+1. Intel Core i7 6900K (8 cores), 16GB DDR, 480GB SSD    
+Allows SW LDPC on 3 cores (1 segment per slot, 3 slots decoded in parallel, up to 30Mb/s)  
+or  
+LDPC on FPGA (up to 300Mb/s on 80MHz SISO).
+
+2. Intel Core i9 7980EX (18 cores) shall support future configurations incl. MIMO   
+Allows parallel LDPC SW decoder on 9 or 12 cores, up to 3 (tested) or 5 (ongoing) segments per slot or 140Mb/s  
+or  
+LDPC on FPGA (same as above)
+
+3. Intel(R) Xeon(R) Gold 6154 CPU @ 3.00GHz with 18 cores and 2x10Gbit Ethernet 
+
+## SDR
+
+Please also see the following presentation for more details on hardware:  
+https://www.openairinterface.org/docs/workshop/5_OAI_Workshop_20180620/KALTENBERGER_5G%20New%20Radio%20in%20OpenAirInterface.pdf
+
+### USRP N310
+This is the latest version of the USRP designed specifically for 5G-NR. It will support up to 100MHz bandwidth.  
+See https://www.ettus.com/product/details/USRP-N310 for details.
+
+### USRP X310
+This older platform will also work with 5G-NR, but only supports bandwidths up to 80MHz with 3/4 sampling.
+
+### USRP B210
+This platform can be used for bandwidths up to 40MHz using 3/4 sampling.
+
+
+### SYRTEM platform
+The SYRTEM platform is based on:  
+- the Xilinx EVALUATION KIT ZYNQ-7000 ZC706 (ex. supplier Digikey ref: 122-1904-ND, 2427€), and
+- the Analog Device Transceiver type ADRV9371 (ex. supplier : Digikey ADRV9371-W/PCBZ-ND ('WIDE TUNING RANGE 300MHZ-6HGZ' version)  1169€).
+
+Please see http://www.syrtem.com for more information.
+
+
+## LDPC offload
+As a high performance alternative to the software LDPC decoder included in this release, the decoder can also be offloaded to another FPGA board  (EVALUATION KIT ZYNQ-7000 ZC706).  
+The FPGA binary image is provided by Creonic (https://www.creonic.com), while the drivers are provided by Syrtem (http://www.syrtem.com/).  
+Please get in touch with us if you want to use them.
+
+
+## Operating system
+ - Ubuntu 16.04 or 17.10 with the lowlatency kernel option
+ - CentOS Linux release 7.4.1708 (Core)
+
+# NSA setup with COTS UE
+please see [gNB vs COTS UE Testing](home/gNB-COTS-UE-testing)
+
+# Further documents
+ - [OAI_Software_Architecture_for_Dual_Connectivity_in_E-UTRA_and_5G-NR_and_nFAPI_for_MAC-PHY_Interface.docx](/uploads/ba5368448d627743a28c770c29e8978e/OAI_Software_Architecture_for_Dual_Connectivity_in_E-UTRA_and_5G-NR_and_nFAPI_for_MAC-PHY_Interface.docx)
+ - [UE_FAPI-like_interface.docx](/uploads/f7386f3a64806fd6b2ac1fc3d0252fff/UE_FAPI-like_interface.docx)
+
+-- Florian Kaltenberger 24.7.2018
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