cmake_targets/autotests/test_case_list.xml

@@ -1104,7 +1104,8 @@
                                  (Test19: Mapping type A, 3 DMRS Symbols),
                                  (Test20: Mapping type B, 4 DMRS Symbols),
                                  (Test21: 4x4 MIMO, 1 Layer),
-                                 (Test22: 4x4 MIMO, 2 Layers)</desc>
+                                 (Test22: 4x4 MIMO, 2 Layers),
+                                 (Test23: 25 PRBs, 15 kHz SCS)</desc>
       <pre_compile_prog></pre_compile_prog>
       <compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</compile_prog>
       <compile_prog_args> --phy_simulators  -c </compile_prog_args>
@@ -1132,8 +1133,9 @@
                   -n100 -s2 -U 2 0 2
                   -n100 -s2 -U 2 1 3
                   -n10 -s20 -U 3 0 0 2 -gR -x1 -y4 -z4
-                  -n10 -s20 -U 3 0 0 2 -gR -x2 -y4 -z4</main_exec_args>
-      <tags>nr_dlsim.test1 nr_dlsim.test2 nr_dlsim.test3 nr_dlsim.test4 nr_dlsim.test5 nr_dlsim.test6 nr_dlsim.test7 nr_dlsim.test8 nr_dlsim.test9 nr_dlsim.test10 nr_dlsim.test11 nr_dlsim.test12 nr_dlsim.test13 nr_dlsim.test14 nr_dlsim.test15 nr_dlsim.test16 nr_dlsim.test17 nr_dlsim.test18 nr_dlsim.test19 nr_dlsim.test20 nr_dlsim.test21 nr_dlsim.test22</tags>
+                  -n10 -s20 -U 3 0 0 2 -gR -x2 -y4 -z4
+                  -n100 -m0 -e0 -R25 -b25 -i</main_exec_args>
+      <tags>nr_dlsim.test1 nr_dlsim.test2 nr_dlsim.test3 nr_dlsim.test4 nr_dlsim.test5 nr_dlsim.test6 nr_dlsim.test7 nr_dlsim.test8 nr_dlsim.test9 nr_dlsim.test10 nr_dlsim.test11 nr_dlsim.test12 nr_dlsim.test13 nr_dlsim.test14 nr_dlsim.test15 nr_dlsim.test16 nr_dlsim.test17 nr_dlsim.test18 nr_dlsim.test19 nr_dlsim.test20 nr_dlsim.test21 nr_dlsim.test22 nr_dlsim.test23</tags>
       <search_expr_true>PDSCH test OK</search_expr_true>
       <search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
       <nruns>3</nruns>
@@ -1306,9 +1308,10 @@
                                  (Test12: SC-FDMA, 216 PRBs),
                                  (Test13: SC-FDMA, 273 PRBs),
                                  (Test14: SC-FDMA, 3 DMRS),
-                                 (Test15: MCS 19 50 PRBs 2 RX_Antenna)
-                                 (Test16: MCS 9 106 PRBs MIMO 2 layers)
-                                 (Test17: MCS 9 106 PRBs MIMO 4 layers)</desc>
+                                 (Test15: MCS 19 50 PRBs 2 RX_Antenna),
+                                 (Test16: MCS 9 106 PRBs MIMO 2 layers),
+                                 (Test17: MCS 9 106 PRBs MIMO 4 layers),
+                                 (Test18: 25 PRBs, 15 kHz SCS)</desc>
       <pre_compile_prog></pre_compile_prog>
       <compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</compile_prog>
       <compile_prog_args> --phy_simulators  -c </compile_prog_args>
@@ -1331,9 +1334,9 @@
                       -n100 -s5 -Z -U 2 0 2
                       -n100 -m19 -s10 -S15 -z2
                       -n100 -m9 -r106 -s10 -W2 -y2 -z2
-                      -n100 -m9 -r106 -s20 -W4 -y4 -z4</main_exec_args>
-
-      <tags>nr_ulsim.test1 nr_ulsim.test2 nr_ulsim.test3 nr_ulsim.test4 nr_ulsim.test5 nr_ulsim.test6 nr_ulsim.test7 nr_ulsim.test8 nr_ulsim.test9 nr_ulsim.test10 nr_ulsim.test11 nr_ulsim.test12 nr_ulsim.test13 nr_ulsim.test14 nr_ulsim.test15 nr_ulsim.test16 nr_ulsim.test17</tags>
+                      -n100 -m9 -r106 -s20 -W4 -y4 -z4
+                      -n100 -u0 -m0 -R25 -r25 -i</main_exec_args>
+      <tags>nr_ulsim.test1 nr_ulsim.test2 nr_ulsim.test3 nr_ulsim.test4 nr_ulsim.test5 nr_ulsim.test6 nr_ulsim.test7 nr_ulsim.test8 nr_ulsim.test9 nr_ulsim.test10 nr_ulsim.test11 nr_ulsim.test12 nr_ulsim.test13 nr_ulsim.test14 nr_ulsim.test15 nr_ulsim.test16 nr_ulsim.test17 nr_ulsim.test18</tags>
       <search_expr_true>PUSCH test OK</search_expr_true>
       <search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
       <nruns>3</nruns>
@@ -1344,10 +1347,11 @@
       <desc>nr_prachsim Test cases. (Test1: 30kHz SCS, 106 PRBs, Prach format A2),
                                     (Test2: 30kHz SCS, 217 PRBs, Prach format A2),
                                     (Test3: 30kHz SCS, 273 PRBs, Prach format A2),
-				    (Test4: 30kHz SCS, 106 PRBs, Prach format 0),
+                                    (Test4: 30kHz SCS, 106 PRBs, Prach format 0),
                                     (Test5: 120kHz SCS, 32 PRBs, Prach format A2),
                                     (Test6: 120kHz SCS, 66 PRBs, Prach format A2),
-                                    (Test7: 120kHz SCS, 66 PRBs, High Speed Enabled)</desc>
+                                    (Test7: 120kHz SCS, 66 PRBs, High Speed Enabled),
+                                    (Test8: 15kHz SCS, 25 PRBs)</desc>
       <pre_compile_prog></pre_compile_prog>
       <compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</compile_prog>
       <compile_prog_args> --phy_simulators -c </compile_prog_args>
@@ -1357,11 +1361,12 @@
       <main_exec_args>-a -s -30 -n 100 -p 63 -R 106
                       -a -s -30 -n 100 -p 63 -R 217
                       -a -s -30 -n 100 -p 63 -R 273
-		      -a -s -30 -n 100 -p 63 -R 106 -c 4
-		      -a -s -30 -n 100 -p 32 -R 32 -m 3 -c52 
-		      -a -s -30 -n 100 -p 32 -R 66 -m 3 -c52
-          -a -s -30 -n 100 -R 66 -m 3 -c52 -H</main_exec_args>
-      <tags>nr_prachsim.test1 nr_prachsim.test2 nr_prachsim.test3 nr_prachsim.test4 nr_prachsim.test5 nr_prachsim.test6 nr_prachsim.test7</tags>
+                      -a -s -30 -n 100 -p 63 -R 106 -c 4
+                      -a -s -30 -n 100 -p 32 -R 32 -m 3 -c52
+                      -a -s -30 -n 100 -p 32 -R 66 -m 3 -c52
+                      -a -s -30 -n 100 -R 66 -m 3 -c52 -H
+                      -a -s -30 -n 100 -p 99 -R 25 -m 0</main_exec_args>
+      <tags>nr_prachsim.test1 nr_prachsim.test2 nr_prachsim.test3 nr_prachsim.test4 nr_prachsim.test5 nr_prachsim.test6 nr_prachsim.test7 nr_prachsim.test8</tags>
       <search_expr_true>PRACH test OK</search_expr_true>
       <search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
       <nruns>3</nruns>

common/utils/nr/nr_common.c

@@ -191,67 +191,6 @@ int PRBalloc_to_locationandbandwidth(int NPRB,int RBstart) {
   return(PRBalloc_to_locationandbandwidth0(NPRB,RBstart,275));
 }
 
-/// Target code rate tables indexed by Imcs
-/* TS 38.214 table 5.1.3.1-1 - MCS index table 1 for PDSCH */
-uint16_t nr_target_code_rate_table1[29] = {120, 157, 193, 251, 308, 379, 449, 526, 602, 679, 340, 378, 434, 490, 553, \
-                                            616, 658, 438, 466, 517, 567, 616, 666, 719, 772, 822, 873, 910, 948};
-
-/* TS 38.214 table 5.1.3.1-2 - MCS index table 2 for PDSCH */
-// Imcs values 20 and 26 have been multiplied by 2 to avoid the floating point
-uint16_t nr_target_code_rate_table2[28] = {120, 193, 308, 449, 602, 378, 434, 490, 553, 616, 658, 466, 517, 567, \
-                                            616, 666, 719, 772, 822, 873, 1365, 711, 754, 797, 841, 885, 1833, 948};
-
-/* TS 38.214 table 5.1.3.1-3 - MCS index table 3 for PDSCH */
-uint16_t nr_target_code_rate_table3[29] = {30, 40, 50, 64, 78, 99, 120, 157, 193, 251, 308, 379, 449, 526, 602, 340, \
-                                            378, 434, 490, 553, 616, 438, 466, 517, 567, 616, 666, 719, 772};
-
-uint16_t nr_tbs_table[93] = {24, 32, 40, 48, 56, 64, 72, 80, 88, 96, 104, 112, 120, 128, 136, 144, 152, 160, 168, 176, 184, 192, 208, 224, 240, 256, 272, 288, 304, 320, \
-                              336, 352, 368, 384, 408, 432, 456, 480, 504, 528, 552, 576, 608, 640, 672, 704, 736, 768, 808, 848, 888, 928, 984, 1032, 1064, 1128, 1160, 1192, 1224, 1256, \
-                              1288, 1320, 1352, 1416, 1480, 1544, 1608, 1672, 1736, 1800, 1864, 1928, 2024, 2088, 2152, 2216, 2280, 2408, 2472, 2536, 2600, 2664, 2728, 2792, 2856, 2976, \
-                              3104, 3240, 3368, 3496, 3624, 3752, 3824};
-
-uint8_t nr_get_Qm(uint8_t Imcs, uint8_t table_idx) {
-  switch(table_idx) {
-    case 1:
-      return (((Imcs<10)||(Imcs==29))?2:((Imcs<17)||(Imcs==30))?4:((Imcs<29)||(Imcs==31))?6:-1);
-    break;
-
-    case 2:
-      return (((Imcs<5)||(Imcs==28))?2:((Imcs<11)||(Imcs==29))?4:((Imcs<20)||(Imcs==30))?6:((Imcs<28)||(Imcs==31))?8:-1);
-    break;
-
-    case 3:
-      return (((Imcs<15)||(Imcs==29))?2:((Imcs<21)||(Imcs==30))?4:((Imcs<29)||(Imcs==31))?6:-1);
-    break;
-
-    default:
-      AssertFatal(0, "Invalid MCS table index %d (expected in range [1,3])\n", table_idx);
-      return(0);
-      break;
-  }
-}
-
-uint32_t nr_get_code_rate(uint8_t Imcs, uint8_t table_idx) {
-  switch(table_idx) {
-    case 1:
-      return (nr_target_code_rate_table1[Imcs]);
-    break;
-
-    case 2:
-      return (nr_target_code_rate_table2[Imcs]);
-    break;
-
-    case 3:
-      return (nr_target_code_rate_table3[Imcs]);
-    break;
-
-    default:
-      AssertFatal(0, "Invalid MCS table index %d (expected in range [1,3])\n", table_idx);
-      return(0);
-      break;
-  }
-}
-
 void get_coreset_rballoc(uint8_t *FreqDomainResource,int *n_rb,int *rb_offset) {
 
   uint8_t count=0, start=0, start_set=0;

common/utils/nr/nr_common.h

@@ -69,12 +69,6 @@ int NRRIV2BW(int locationAndBandwidth,int N_RB);
 int NRRIV2PRBOFFSET(int locationAndBandwidth,int N_RB);
 int PRBalloc_to_locationandbandwidth0(int NPRB,int RBstart,int BWPsize);
 int PRBalloc_to_locationandbandwidth(int NPRB,int RBstart);
-extern uint16_t nr_target_code_rate_table1[29];
-extern uint16_t nr_target_code_rate_table2[28];
-extern uint16_t nr_target_code_rate_table3[29];
-extern uint16_t nr_tbs_table[93];
-uint8_t nr_get_Qm(uint8_t Imcs, uint8_t table_idx);
-uint32_t nr_get_code_rate(uint8_t Imcs, uint8_t table_idx);
 int get_subband_size(int NPRB,int size);
 void SLIV2SL(int SLIV,int *S,int *L);
 int get_dmrs_port(int nl, uint16_t dmrs_ports);

common/utils/threadPool/thread-pool.h

@@ -80,7 +80,7 @@ static inline notifiedFIFO_elt_t *newNotifiedFIFO_elt(int size,
     notifiedFIFO_t *reponseFifo,
     void (*processingFunc)(void *)) {
   notifiedFIFO_elt_t *ret;
-  AssertFatal( NULL != (ret=(notifiedFIFO_elt_t *) malloc(sizeof(notifiedFIFO_elt_t)+size+32)), "");
+  AssertFatal( NULL != (ret=(notifiedFIFO_elt_t *) calloc(1, sizeof(notifiedFIFO_elt_t)+size+32)), "");
   ret->next=NULL;
   ret->key=key;
   ret->reponseFifo=reponseFifo;

executables/nr-ru.c

@@ -719,10 +719,17 @@ void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) {
 
       AssertFatal(txsymb>0,"illegal txsymb %d\n",txsymb);
 
-      if(slot%(fp->slots_per_subframe/2))
-        siglen = txsymb * (fp->ofdm_symbol_size + fp->nb_prefix_samples);
-      else
-        siglen = (fp->ofdm_symbol_size + fp->nb_prefix_samples0) + (txsymb - 1) * (fp->ofdm_symbol_size + fp->nb_prefix_samples);
+      if (fp->slots_per_subframe == 1) {
+        if (txsymb <= 7)
+          siglen = (fp->ofdm_symbol_size + fp->nb_prefix_samples0) + (txsymb - 1) * (fp->ofdm_symbol_size + fp->nb_prefix_samples);
+        else
+          siglen = 2 * (fp->ofdm_symbol_size + fp->nb_prefix_samples0) + (txsymb - 2) * (fp->ofdm_symbol_size + fp->nb_prefix_samples);
+      } else {
+        if(slot%(fp->slots_per_subframe/2))
+          siglen = txsymb * (fp->ofdm_symbol_size + fp->nb_prefix_samples);
+        else
+          siglen = (fp->ofdm_symbol_size + fp->nb_prefix_samples0) + (txsymb - 1) * (fp->ofdm_symbol_size + fp->nb_prefix_samples);
+      }
 
       //+ ru->end_of_burst_delay;
       flags = 3; // end of burst
@@ -1049,11 +1056,12 @@ void fill_rf_config(RU_t *ru, char *rf_config_file) {
     cfg->tx_gain[i] = ru->att_tx;
     cfg->rx_gain[i] = ru->max_rxgain-ru->att_rx;
     cfg->configFilename = rf_config_file;
-    LOG_I(PHY, "Channel %d: setting tx_gain offset %f, rx_gain offset %f, tx_freq %lu Hz, rx_freq %lu Hz\n",
+    LOG_I(PHY, "Channel %d: setting tx_gain offset %.0f, rx_gain offset %.0f, tx_freq %.0f Hz, rx_freq %.0f Hz, tune_offset %.0f Hz\n",
           i, cfg->tx_gain[i],
           cfg->rx_gain[i],
-          (unsigned long)cfg->tx_freq[i],
-          (unsigned long)cfg->rx_freq[i]);
+          cfg->tx_freq[i],
+          cfg->rx_freq[i],
+          cfg->tune_offset);
   }
 }
 
@@ -2051,6 +2059,8 @@ static void NRRCconfig_RU(void) {
         RC.ru[j]->openair0_cfg.time_source = internal;
       }
 
+      RC.ru[j]->openair0_cfg.tune_offset = get_softmodem_params()->tune_offset;
+
       if (strcmp(*(RUParamList.paramarray[j][RU_LOCAL_RF_IDX].strptr), "yes") == 0) {
         if ( !(config_isparamset(RUParamList.paramarray[j],RU_LOCAL_IF_NAME_IDX)) ) {
           RC.ru[j]->if_south                        = LOCAL_RF;

executables/nr-uesoftmodem.c

@@ -354,6 +354,7 @@ void init_openair0(void) {
     openair0_cfg[card].num_rb_dl = frame_parms->N_RB_DL;
     openair0_cfg[card].clock_source = get_softmodem_params()->clock_source;
     openair0_cfg[card].time_source = get_softmodem_params()->timing_source;
+    openair0_cfg[card].tune_offset = get_softmodem_params()->tune_offset;
     openair0_cfg[card].tx_num_channels = min(4, frame_parms->nb_antennas_tx);
     openair0_cfg[card].rx_num_channels = min(4, frame_parms->nb_antennas_rx);
 

executables/softmodem-common.h

@@ -60,6 +60,7 @@ extern "C"
 #define CONFIG_HLP_DMRSSYNC      "tells RU to insert DMRS in subframe 1 slot 0"
 #define CONFIG_HLP_CLK           "tells hardware to use a clock reference (0:internal, 1:external, 2:gpsdo)\n"
 #define CONFIG_HLP_TME           "tells hardware to use a time reference (0:internal, 1:external, 2:gpsdo)\n"
+#define CONFIG_HLP_TUNE_OFFSET   "LO tuning offset to use in Hz\n"
 #define CONFIG_HLP_USIM          "use XOR autentication algo in case of test usim mode\n"
 #define CONFIG_HLP_NOSNGLT       "Disables single-thread mode in lte-softmodem\n"
 #define CONFIG_HLP_DLF           "Set the downlink frequency for all component carriers\n"
@@ -118,6 +119,7 @@ extern "C"
 #define EMULATE_RF          softmodem_params.emulate_rf
 #define CLOCK_SOURCE        softmodem_params.clock_source
 #define TIMING_SOURCE       softmodem_params.timing_source
+#define TUNE_OFFSET         softmodem_params.tune_offset
 #define SEND_DMRSSYNC       softmodem_params.send_dmrs_sync
 #define USIM_TEST           softmodem_params.usim_test
 #define PRB_INTERPOLATION   softmodem_params.prb_interpolation
@@ -141,6 +143,7 @@ extern int usrp_tx_thread;
     {"usim-test",            CONFIG_HLP_USIM,         PARAMFLAG_BOOL, u8ptr:&USIM_TEST,                   defintval:0,           TYPE_UINT8,  0},                     \
     {"clock-source",         CONFIG_HLP_CLK,          0,              uptr:&CLOCK_SOURCE,                 defintval:0,           TYPE_UINT,   0},                     \
     {"time-source",          CONFIG_HLP_TME,          0,              uptr:&TIMING_SOURCE,                defintval:0,           TYPE_UINT,   0},                     \
+    {"tune-offset",          CONFIG_HLP_TUNE_OFFSET,  0,              dblptr:&TUNE_OFFSET,                defintval:0,           TYPE_DOUBLE, 0},                     \
     {"wait-for-sync",        NULL,                    PARAMFLAG_BOOL, iptr:&WAIT_FOR_SYNC,                defintval:0,           TYPE_INT,    0},                     \
     {"single-thread-enable", CONFIG_HLP_NOSNGLT,      PARAMFLAG_BOOL, iptr:&SINGLE_THREAD_FLAG,           defintval:0,           TYPE_INT,    0},                     \
     {"C" ,                   CONFIG_HLP_DLF,          0,              u64ptr:&(downlink_frequency[0][0]), defuintval:0,          TYPE_UINT64, 0},                     \
@@ -245,6 +248,7 @@ typedef struct {
   int            band;
   uint32_t       clock_source;
   uint32_t       timing_source;
+  double         tune_offset;
   int            hw_timing_advance;
   uint32_t       send_dmrs_sync;
   int            prb_interpolation;

nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h

@@ -434,6 +434,9 @@ typedef struct {
   uint8_t mcs;
   uint8_t ndi;
   uint8_t rv;
+  uint16_t targetCodeRate;
+  uint8_t qamModOrder;
+  uint32_t TBS;
   uint8_t tb2_mcs;
   uint8_t tb2_ndi;
   uint8_t tb2_rv;

openair1/PHY/CODING/coding_defs.h

@@ -469,18 +469,6 @@ int32_t nr_segmentation(unsigned char *input_buffer,
                      unsigned int *F,
                      uint8_t BG);
 
-/*!\fn uint32_t nr_compute_tbs
-\brief This function returns the TBS in bits as per 6.1.4.2 of TS 38.214
-*/
-uint32_t nr_compute_tbs(uint16_t Qm,
-                        uint16_t R,
-			uint16_t nb_rb,
-			uint16_t nb_symb_sch,
-			uint16_t nb_dmrs_prb,
-                        uint16_t nb_rb_oh,
-                        uint8_t tb_scaling,
-			uint8_t Nl);
-
 void nr_interleaving_ldpc(uint32_t E, uint8_t Qm, uint8_t *e,uint8_t *f);
 
 void nr_deinterleaving_ldpc(uint32_t E, uint8_t Qm, int16_t *e,int16_t *f);

openair1/PHY/INIT/nr_init.c

@@ -673,14 +673,18 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
   int N_RB_UL = cfg->carrier_config.ul_grid_size[cfg->ssb_config.scs_common.value].value;
   int n_buf = Prx*max_ul_mimo_layers;
 
+  int nb_re_pusch = N_RB_UL * NR_NB_SC_PER_RB;
+#ifdef __AVX2__
+  int nb_re_pusch2 = nb_re_pusch + (nb_re_pusch&7);
+#else
+  int nb_re_pusch2 = nb_re_pusch;
+#endif
+
   for (int ULSCH_id=0; ULSCH_id<gNB->number_of_nr_ulsch_max; ULSCH_id++) {
     pusch_vars[ULSCH_id] = (NR_gNB_PUSCH *)malloc16_clear( sizeof(NR_gNB_PUSCH) );
     pusch_vars[ULSCH_id]->rxdataF_ext           = (int32_t **)malloc16(Prx*sizeof(int32_t *) );
-    pusch_vars[ULSCH_id]->rxdataF_ext2          = (int32_t **)malloc16(Prx*sizeof(int32_t *) );
     pusch_vars[ULSCH_id]->ul_ch_estimates       = (int32_t **)malloc16(n_buf*sizeof(int32_t *) );
     pusch_vars[ULSCH_id]->ul_ch_estimates_ext   = (int32_t **)malloc16(n_buf*sizeof(int32_t *) );
-    pusch_vars[ULSCH_id]->ul_ch_ptrs_estimates     = (int32_t **)malloc16(n_buf*sizeof(int32_t *) );
-    pusch_vars[ULSCH_id]->ul_ch_ptrs_estimates_ext = (int32_t **)malloc16(n_buf*sizeof(int32_t *) );
     pusch_vars[ULSCH_id]->ptrs_phase_per_slot   = (int32_t **)malloc16(n_buf*sizeof(int32_t *) );
     pusch_vars[ULSCH_id]->ul_ch_estimates_time  = (int32_t **)malloc16(n_buf*sizeof(int32_t *) );
     pusch_vars[ULSCH_id]->rxdataF_comp          = (int32_t **)malloc16(n_buf*sizeof(int32_t *) );
@@ -688,32 +692,29 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
     pusch_vars[ULSCH_id]->ul_ch_magb0           = (int32_t **)malloc16(n_buf*sizeof(int32_t *) );
     pusch_vars[ULSCH_id]->ul_ch_mag             = (int32_t **)malloc16(n_buf*sizeof(int32_t *) );
     pusch_vars[ULSCH_id]->ul_ch_magb            = (int32_t **)malloc16(n_buf*sizeof(int32_t *) );
-    pusch_vars[ULSCH_id]->rho                   = (int32_t ***)malloc16_clear(Prx*sizeof(int32_t**) );
+    pusch_vars[ULSCH_id]->rho                   = (int32_t ***)malloc16(Prx*sizeof(int32_t **) );
     pusch_vars[ULSCH_id]->llr_layers            = (int16_t **)malloc16(max_ul_mimo_layers*sizeof(int32_t *) );
 
     for (i=0; i<Prx; i++) {
-      pusch_vars[ULSCH_id]->rxdataF_ext[i]           = (int32_t *)malloc16_clear( sizeof(int32_t)*N_RB_UL*12*fp->symbols_per_slot );
-      pusch_vars[ULSCH_id]->rxdataF_ext2[i]          = (int32_t *)malloc16_clear( sizeof(int32_t)*N_RB_UL*12*fp->symbols_per_slot );
+      pusch_vars[ULSCH_id]->rxdataF_ext[i]           = (int32_t *)malloc16_clear( sizeof(int32_t)*nb_re_pusch2*fp->symbols_per_slot );
       pusch_vars[ULSCH_id]->rho[i]                   = (int32_t **)malloc16_clear(NR_MAX_NB_LAYERS*NR_MAX_NB_LAYERS*sizeof(int32_t*));
 
       for (int j=0; j< max_ul_mimo_layers; j++) {
         for (int k=0; k<max_ul_mimo_layers; k++) {
-          pusch_vars[ULSCH_id]->rho[i][j*max_ul_mimo_layers+k]=(int32_t *)malloc16_clear( sizeof(int32_t) * fp->N_RB_UL*12*7*2 );
+          pusch_vars[ULSCH_id]->rho[i][j*max_ul_mimo_layers+k]=(int32_t *)malloc16_clear( sizeof(int32_t)*nb_re_pusch2*fp->symbols_per_slot );
         }
       }
     }
     for (i=0; i<n_buf; i++) {
-      pusch_vars[ULSCH_id]->ul_ch_estimates[i]       = (int32_t *)malloc16_clear( sizeof(int32_t)*fp->ofdm_symbol_size*2*fp->symbols_per_slot );
-      pusch_vars[ULSCH_id]->ul_ch_estimates_ext[i]   = (int32_t *)malloc16_clear( sizeof(int32_t)*N_RB_UL*12*fp->symbols_per_slot );
-      pusch_vars[ULSCH_id]->ul_ch_estimates_time[i]  = (int32_t *)malloc16_clear( 2*sizeof(int32_t)*fp->ofdm_symbol_size );
-      pusch_vars[ULSCH_id]->ul_ch_ptrs_estimates[i]       = (int32_t *)malloc16_clear( sizeof(int32_t)*fp->ofdm_symbol_size*2*fp->symbols_per_slot ); // max intensity in freq is 1 sc every 2 RBs
-      pusch_vars[ULSCH_id]->ul_ch_ptrs_estimates_ext[i]   = (int32_t *)malloc16_clear( sizeof(int32_t)*N_RB_UL*12*fp->symbols_per_slot );
+      pusch_vars[ULSCH_id]->ul_ch_estimates[i]       = (int32_t *)malloc16_clear( sizeof(int32_t)*fp->ofdm_symbol_size*fp->symbols_per_slot );
+      pusch_vars[ULSCH_id]->ul_ch_estimates_ext[i]   = (int32_t *)malloc16_clear( sizeof(int32_t)*nb_re_pusch2*fp->symbols_per_slot );
+      pusch_vars[ULSCH_id]->ul_ch_estimates_time[i]  = (int32_t *)malloc16_clear( sizeof(int32_t)*fp->ofdm_symbol_size );
       pusch_vars[ULSCH_id]->ptrs_phase_per_slot[i]   = (int32_t *)malloc16_clear( sizeof(int32_t)*fp->symbols_per_slot); // symbols per slot
-      pusch_vars[ULSCH_id]->rxdataF_comp[i]          = (int32_t *)malloc16_clear( sizeof(int32_t)*N_RB_UL*12*fp->symbols_per_slot );
-      pusch_vars[ULSCH_id]->ul_ch_mag0[i]            = (int32_t *)malloc16_clear( fp->symbols_per_slot*sizeof(int32_t)*N_RB_UL*12 );
-      pusch_vars[ULSCH_id]->ul_ch_magb0[i]           = (int32_t *)malloc16_clear( fp->symbols_per_slot*sizeof(int32_t)*N_RB_UL*12 );
-      pusch_vars[ULSCH_id]->ul_ch_mag[i]             = (int32_t *)malloc16_clear( fp->symbols_per_slot*sizeof(int32_t)*N_RB_UL*12 );
-      pusch_vars[ULSCH_id]->ul_ch_magb[i]            = (int32_t *)malloc16_clear( fp->symbols_per_slot*sizeof(int32_t)*N_RB_UL*12 );
+      pusch_vars[ULSCH_id]->rxdataF_comp[i]          = (int32_t *)malloc16_clear( sizeof(int32_t)*nb_re_pusch2*fp->symbols_per_slot );
+      pusch_vars[ULSCH_id]->ul_ch_mag0[i]            = (int32_t *)malloc16_clear( sizeof(int32_t)*nb_re_pusch2*fp->symbols_per_slot );
+      pusch_vars[ULSCH_id]->ul_ch_magb0[i]           = (int32_t *)malloc16_clear( sizeof(int32_t)*nb_re_pusch2*fp->symbols_per_slot );
+      pusch_vars[ULSCH_id]->ul_ch_mag[i]             = (int32_t *)malloc16_clear( sizeof(int32_t)*nb_re_pusch2*fp->symbols_per_slot );
+      pusch_vars[ULSCH_id]->ul_ch_magb[i]            = (int32_t *)malloc16_clear( sizeof(int32_t)*nb_re_pusch2*fp->symbols_per_slot );
     }
 
     for (i=0; i< max_ul_mimo_layers; i++) {
@@ -838,7 +839,6 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
       free_and_zero(pusch_vars[ULSCH_id]->llr_layers[i]);
     for (int i = 0; i < Prx; i++) {
       free_and_zero(pusch_vars[ULSCH_id]->rxdataF_ext[i]);
-      free_and_zero(pusch_vars[ULSCH_id]->rxdataF_ext2[i]);
       for (int j=0; j< max_ul_mimo_layers; j++) {
         for (int k=0; k<max_ul_mimo_layers; k++)
           free_and_zero(pusch_vars[ULSCH_id]->rho[i][j*max_ul_mimo_layers+k]);
@@ -849,8 +849,6 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
       free_and_zero(pusch_vars[ULSCH_id]->ul_ch_estimates[i]);
       free_and_zero(pusch_vars[ULSCH_id]->ul_ch_estimates_ext[i]);
       free_and_zero(pusch_vars[ULSCH_id]->ul_ch_estimates_time[i]);
-      free_and_zero(pusch_vars[ULSCH_id]->ul_ch_ptrs_estimates[i]);
-      free_and_zero(pusch_vars[ULSCH_id]->ul_ch_ptrs_estimates_ext[i]);
       free_and_zero(pusch_vars[ULSCH_id]->ptrs_phase_per_slot[i]);
       free_and_zero(pusch_vars[ULSCH_id]->rxdataF_comp[i]);
       free_and_zero(pusch_vars[ULSCH_id]->ul_ch_mag0[i]);
@@ -860,11 +858,8 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
     }
     free_and_zero(pusch_vars[ULSCH_id]->llr_layers);
     free_and_zero(pusch_vars[ULSCH_id]->rxdataF_ext);
-    free_and_zero(pusch_vars[ULSCH_id]->rxdataF_ext2);
     free_and_zero(pusch_vars[ULSCH_id]->ul_ch_estimates);
     free_and_zero(pusch_vars[ULSCH_id]->ul_ch_estimates_ext);
-    free_and_zero(pusch_vars[ULSCH_id]->ul_ch_ptrs_estimates);
-    free_and_zero(pusch_vars[ULSCH_id]->ul_ch_ptrs_estimates_ext);
     free_and_zero(pusch_vars[ULSCH_id]->ptrs_phase_per_slot);
     free_and_zero(pusch_vars[ULSCH_id]->ul_ch_estimates_time);
     free_and_zero(pusch_vars[ULSCH_id]->ul_valid_re_per_slot);
@@ -928,7 +923,12 @@ void nr_phy_config_request_sim(PHY_VARS_gNB *gNB,
   //gNB_config->subframe_config.dl_cyclic_prefix_type.value = (fp->Ncp == NORMAL) ? NFAPI_CP_NORMAL : NFAPI_CP_EXTENDED;
 
   gNB->mac_enabled   = 1;
-  if (mu==1) {
+  if (mu==0) {
+    fp->dl_CarrierFreq = 2600000000;//from_nrarfcn(gNB_config->nfapi_config.rf_bands.rf_band[0],gNB_config->nfapi_config.nrarfcn.value);
+    fp->ul_CarrierFreq = 2600000000;//fp->dl_CarrierFreq - (get_uldl_offset(gNB_config->nfapi_config.rf_bands.rf_band[0])*100000);
+    fp->nr_band = 38;
+    //  fp->threequarter_fs= 0;
+  } else if (mu==1) {
     fp->dl_CarrierFreq = 3600000000;//from_nrarfcn(gNB_config->nfapi_config.rf_bands.rf_band[0],gNB_config->nfapi_config.nrarfcn.value);
     fp->ul_CarrierFreq = 3600000000;//fp->dl_CarrierFreq - (get_uldl_offset(gNB_config->nfapi_config.rf_bands.rf_band[0])*100000);
     fp->nr_band = 78;

openair1/PHY/INIT/nr_init_ue.c

@@ -76,7 +76,6 @@ void phy_init_nr_ue_PDSCH(NR_UE_PDSCH *const pdsch,
   pdsch->dl_ch_magr0            = (int32_t **)malloc16_clear( NR_MAX_NB_LAYERS*fp->nb_antennas_rx*sizeof(int32_t *) );
   pdsch->ptrs_phase_per_slot    = (int32_t **)malloc16_clear( fp->nb_antennas_rx*sizeof(int32_t *) );
   pdsch->ptrs_re_per_slot       = (int32_t **)malloc16_clear( fp->nb_antennas_rx*sizeof(int32_t *) );
-  pdsch->dl_ch_ptrs_estimates_ext = (int32_t **)malloc16_clear( fp->nb_antennas_rx*sizeof(int32_t *) );
   // the allocated memory size is fixed:
   AssertFatal( fp->nb_antennas_rx <= 4, "nb_antennas_rx > 4" );//Extend the max number of UE Rx antennas to 4
 
@@ -86,7 +85,6 @@ void phy_init_nr_ue_PDSCH(NR_UE_PDSCH *const pdsch,
     pdsch->rxdataF_uespec_pilots[i]    = (int32_t *)malloc16_clear( sizeof(int32_t) * fp->N_RB_DL*12);
     pdsch->ptrs_phase_per_slot[i]      = (int32_t *)malloc16_clear( sizeof(int32_t) * 14 );
     pdsch->ptrs_re_per_slot[i]         = (int32_t *)malloc16_clear( sizeof(int32_t) * 14);
-    pdsch->dl_ch_ptrs_estimates_ext[i] = (int32_t *)malloc16_clear( sizeof(int32_t) * num);
     pdsch->rho[i]                      = (int32_t **)malloc16_clear( NR_MAX_NB_LAYERS*NR_MAX_NB_LAYERS*sizeof(int32_t *) );
 
     for (int j=0; j<NR_MAX_NB_LAYERS; j++) {
@@ -126,7 +124,6 @@ void phy_term_nr_ue__PDSCH(NR_UE_PDSCH* pdsch, const NR_DL_FRAME_PARMS *const fp
     free_and_zero(pdsch->rxdataF_uespec_pilots[i]);
     free_and_zero(pdsch->ptrs_phase_per_slot[i]);
     free_and_zero(pdsch->ptrs_re_per_slot[i]);
-    free_and_zero(pdsch->dl_ch_ptrs_estimates_ext[i]);
     free_and_zero(pdsch->rho[i]);
   }
   free_and_zero(pdsch->pmi_ext);
@@ -149,7 +146,6 @@ void phy_term_nr_ue__PDSCH(NR_UE_PDSCH* pdsch, const NR_DL_FRAME_PARMS *const fp
   free_and_zero(pdsch->dl_ch_magr0);
   free_and_zero(pdsch->ptrs_phase_per_slot);
   free_and_zero(pdsch->ptrs_re_per_slot);
-  free_and_zero(pdsch->dl_ch_ptrs_estimates_ext);
 }
 
 int init_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)

openair1/PHY/MODULATION/nr_modulation.c

@@ -665,8 +665,9 @@ void init_symbol_rotation(NR_DL_FRAME_PARMS *fp) {
 
 void init_timeshift_rotation(NR_DL_FRAME_PARMS *fp)
 {
+  const int sample_offset = fp->nb_prefix_samples / fp->ofdm_offset_divisor;
   for (int i = 0; i < fp->ofdm_symbol_size; i++) {
-    double poff = -i * 2.0 * M_PI * 144.0 / 2048.0 / fp->ofdm_offset_divisor;
+    double poff = -i * 2.0 * M_PI * sample_offset / fp->ofdm_symbol_size;
     double exp_re = cos(poff);
     double exp_im = sin(-poff);
     fp->timeshift_symbol_rotation[i*2] = (int16_t)round(exp_re * 32767);

openair1/PHY/MODULATION/slot_fep_nr.c

@@ -34,47 +34,6 @@
 #define LOG_I(A,B...) printf(A)
 #endif*/
 
-dft_size_idx_t get_dft_size_idx(uint16_t ofdm_symbol_size)
-{
-  switch (ofdm_symbol_size) {
-  case 128:
-    return DFT_128;
-
-  case 256:
-    return DFT_256;
-
-  case 512:
-    return DFT_512;
-
-  case 1024:
-    return DFT_1024;
-
-  case 1536:
-    return DFT_1536;
-
-  case 2048:
-    return DFT_2048;
-
-  case 3072:
-    return DFT_3072;
-
-  case 4096:
-    return DFT_4096;
-
-  case 6144:
-    return DFT_6144;
-
-  case 8192:
-    return DFT_8192;
-
-  default:
-    printf("unsupported ofdm symbol size \n");
-    assert(0);
-  }
-
-  return DFT_SIZE_IDXTABLESIZE;
-}
-
 int nr_slot_fep(PHY_VARS_NR_UE *ue,
                 UE_nr_rxtx_proc_t *proc,
                 unsigned char symbol,
@@ -96,7 +55,7 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
     nb_prefix_samples0 = frame_parms->nb_prefix_samples;
   }
 
-  dft_size_idx_t dftsize = get_dft_size_idx(frame_parms->ofdm_symbol_size);
+  dft_size_idx_t dftsize = get_dft(frame_parms->ofdm_symbol_size);
   // This is for misalignment issues
   int32_t tmp_dft_in[8192] __attribute__ ((aligned (32)));
 
@@ -195,7 +154,7 @@ int nr_slot_fep_init_sync(PHY_VARS_NR_UE *ue,
   }
   unsigned int frame_length_samples = frame_parms->samples_per_frame;
 
-  dft_size_idx_t dftsize = get_dft_size_idx(frame_parms->ofdm_symbol_size);
+  dft_size_idx_t dftsize = get_dft(frame_parms->ofdm_symbol_size);
   // This is for misalignment issues
   int32_t tmp_dft_in[8192] __attribute__ ((aligned (32)));
 
@@ -289,7 +248,7 @@ int nr_slot_fep_ul(NR_DL_FRAME_PARMS *frame_parms,
   unsigned int nb_prefix_samples  = frame_parms->nb_prefix_samples;
   unsigned int nb_prefix_samples0 = frame_parms->nb_prefix_samples0;
   
-  dft_size_idx_t dftsize = get_dft_size_idx(frame_parms->ofdm_symbol_size);
+  dft_size_idx_t dftsize = get_dft(frame_parms->ofdm_symbol_size);
   // This is for misalignment issues
   int32_t tmp_dft_in[8192] __attribute__ ((aligned (32)));
 

openair1/PHY/NR_ESTIMATION/nr_ul_channel_estimation.c

@@ -665,6 +665,10 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
       ch[0] = ch_0 / 4;
       ch[1] = ch_1 / 4;
 
+#if NO_INTERP
+      for (int i=0;i<12;i++) ((int32_t*)ul_ch)[i] = *(int32_t*)ch;
+      ul_ch+=24;
+#else
       multadd_real_vector_complex_scalar(filt8_avlip0,
                                          ch,
                                          ul_ch,
@@ -682,6 +686,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
                                          ul_ch,
                                          8);
       ul_ch -= 24;
+#endif
 
       for (pilot_cnt=4; pilot_cnt<4*(nb_rb_pusch-1); pilot_cnt += 4) {
 
@@ -716,6 +721,10 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
         ch[0] = ch_0 / 4;
         ch[1] = ch_1 / 4;
 
+#if NO_INTERP
+        for (int i=0;i<12;i++) ((int32_t*)ul_ch)[i] = *(int32_t*)ch;
+        ul_ch+=24;
+#else
         ul_ch[6] += (ch[0] * 1365)>>15; // 1/12*16384
         ul_ch[7] += (ch[1] * 1365)>>15; // 1/12*16384
 
@@ -737,6 +746,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
                                            ul_ch,
                                            8);
         ul_ch -= 16;
+#endif
       }
       // Last PRB
       ch_0 = ((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15;
@@ -770,6 +780,10 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
       ch[0] = ch_0 / 4;
       ch[1] = ch_1 / 4;
 
+#if NO_INTERP
+      for (int i=0;i<12;i++) ((int32_t*)ul_ch)[i] = *(int32_t*)ch;
+      ul_ch+=24;
+#else
       ul_ch[6] += (ch[0] * 1365)>>15; // 1/12*16384
       ul_ch[7] += (ch[1] * 1365)>>15; // 1/12*16384
 
@@ -784,6 +798,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
                                          ch,
                                          ul_ch,
                                          8);
+#endif
     }
 #ifdef DEBUG_PUSCH
     ul_ch = (int16_t *)&ul_ch_estimates[p*gNB->frame_parms.nb_antennas_rx+aarx][ch_offset];
@@ -890,7 +905,6 @@ void nr_pusch_ptrs_processing(PHY_VARS_gNB *gNB,
       /*------------------------------------------------------------------------------------------------------- */
       nr_ptrs_cpe_estimation(*K_ptrs,*ptrsReOffset,*dmrsConfigType,*nb_rb,
                              rel15_ul->rnti,
-                             (int16_t *)&gNB->pusch_vars[ulsch_id]->ul_ch_ptrs_estimates_ext[aarx][symbol*nb_re_pusch],
                              nr_tti_rx,
                              symbol,frame_parms->ofdm_symbol_size,
                              (int16_t*)&gNB->pusch_vars[ulsch_id]->rxdataF_comp[aarx][(symbol * nb_re_pusch)],

openair1/PHY/NR_REFSIG/dmrs_nr.c

@@ -295,74 +295,6 @@ uint16_t get_dmrs_freq_idx_ul(uint16_t n, uint8_t k_prime, uint8_t delta, uint8_
 
 #define CHECK_DMRS_PBCH_SEQUENCE
 
-void generate_dmrs_pbch(uint32_t dmrs_pbch_bitmap[DMRS_PBCH_I_SSB][DMRS_PBCH_N_HF][DMRS_BITMAP_SIZE], uint16_t Nid_cell)
-{
-  uint32_t cinit;
-  int i_ssb;
-  int n_hf;
-  int _i_ssb;
-
-#ifdef CHECK_DMRS_PBCH_SEQUENCE
-
-  uint32_t dmrs_bitmap[DMRS_PBCH_I_SSB][DMRS_PBCH_N_HF][DMRS_BITMAP_SIZE];
-  uint32_t *dmrs_sequence =  calloc(CELL_DMRS_LENGTH, sizeof(uint32_t));
-  if (dmrs_sequence == NULL) {
-    msg("Fatal error: memory allocation problem \n");
-  	assert(0);
-  }
-  else
-  {
-    printf("Check of demodulation reference signal of pbch sequence \n");
-  }
-
-#endif
-
-  /* for each slot number */
-  for (i_ssb = 0; i_ssb<DMRS_PBCH_I_SSB; i_ssb++) {
-
-    /* for each ofdm position */
-    for (n_hf=0; n_hf<DMRS_PBCH_N_HF; n_hf++) {
-
-      _i_ssb = i_ssb + 4*n_hf;
-
-      cinit = (((_i_ssb + 1)*((Nid_cell>>4) + 1))<<11) + ((_i_ssb + 1)<<6) + (Nid_cell%4);
-
-      pseudo_random_sequence_optimised(DMRS_BITMAP_SIZE, &(dmrs_pbch_bitmap[i_ssb][n_hf][0]), cinit);
-
-#ifdef CHECK_DMRS_PBCH_SEQUENCE
-
-      /* it allows checking generated with standard generation code */
-      pseudo_random_sequence(DMRS_BITMAP_SIZE*sizeof(uint32_t), dmrs_sequence, cinit);
-
-      int j = 0;
-      int k = 0;
-
-      /* format for getting bitmap from uint32_t */
-      for (int i=0; i<DMRS_BITMAP_SIZE; i++) {
-    	dmrs_bitmap[i_ssb][n_hf][i] = 0;
-    	/* convert to bitmap */
-      	for (; j < k + 32; j++) {
-          dmrs_bitmap[i_ssb][n_hf][i] |= (dmrs_sequence[j]<<j);
-      	}
-      	k = j;
-      }
-
-      for (int i=0; i<DMRS_BITMAP_SIZE; i++) {
-        if (dmrs_pbch_bitmap[i_ssb][n_hf][i] != dmrs_bitmap[i_ssb][n_hf][i]) {
-          printf("Error in gold sequence computation for ns %d l %d and index %i : 0x%x 0x%x \n", i_ssb, n_hf, i, dmrs_pbch_bitmap[i_ssb][n_hf][i], dmrs_bitmap[i_ssb][n_hf][i]);
-      	  assert(0);
-        }
-      }
-
-#endif
-
-    }
-  }
-
-#ifdef CHECK_DMRS_PBCH_SEQUENCE
-  free(dmrs_sequence);
-#endif
-}
 /* return the position of next dmrs symbol in a slot */
 int8_t get_next_dmrs_symbol_in_slot(uint16_t  ul_dmrs_symb_pos, uint8_t counter, uint8_t end_symbol)
 {

openair1/PHY/NR_REFSIG/dmrs_nr.h

@@ -53,7 +53,6 @@
 
 int pseudo_random_sequence(int M_PN, uint32_t *c, uint32_t cinit);
 void lte_gold_new(LTE_DL_FRAME_PARMS *frame_parms, uint32_t lte_gold_table[20][2][14], uint16_t Nid_cell);
-void generate_dmrs_pbch(uint32_t dmrs_pbch_bitmap[DMRS_PBCH_I_SSB][DMRS_PBCH_N_HF][DMRS_BITMAP_SIZE], uint16_t Nid_cell);
 uint16_t get_dmrs_freq_idx_ul(uint16_t n, uint8_t k_prime, uint8_t delta, uint8_t dmrs_type);
 
 uint8_t allowed_xlsch_re_in_dmrs_symbol(uint16_t k,

openair1/PHY/NR_REFSIG/pss_nr.h

@@ -120,8 +120,6 @@ EXTERN time_stats_t generic_time[TIME_LAST];
 
 /************** FUNCTION ******************************************/
 
-idft_size_idx_t get_idft(int ofdm_symbol_size);
-dft_size_idx_t get_dft(int ofdm_symbol_size);
 void init_context_synchro_nr(NR_DL_FRAME_PARMS *frame_parms_ue);
 void free_context_synchro_nr(void);
 void init_context_pss_nr(NR_DL_FRAME_PARMS *frame_parms_ue);

openair1/PHY/NR_REFSIG/ptrs_nr.c

@@ -230,7 +230,6 @@ int8_t get_next_estimate_in_slot(uint16_t  ptrsSymbPos,uint16_t  dmrsSymbPos, ui
  *                dmrsConfigType: DMRS configuration type
  *                nb_rb         : No. of resource blocks
  *                rnti          : RNTI
- *                ptrs_ch_p     : pointer to ptrs channel structure
  *                Ns            :
  *                symbol        : OFDM symbol
  *              ofdm_symbol_size: OFDM Symbol Size
@@ -249,7 +248,6 @@ void nr_ptrs_cpe_estimation(uint8_t K_ptrs,
                             uint8_t dmrsConfigType,
                             uint16_t nb_rb,
                             uint16_t rnti,
-                            int16_t *ptrs_ch_p,
                             unsigned char Ns,
                             unsigned char symbol,
                             uint16_t ofdm_symbol_size,
@@ -269,6 +267,7 @@ void nr_ptrs_cpe_estimation(uint8_t K_ptrs,
   }
   uint16_t              sc_per_symbol    = (nb_rb + K_ptrs - 1)/K_ptrs;
   c16_t      ptrs_p[(1 + sc_per_symbol/4)*4];
+  c16_t      ptrs_ch_p[(1 + sc_per_symbol/4)*4];
   c16_t      dmrs_comp_p[(1 + sc_per_symbol/4)*4];
   double                abs              = 0.0;
   double                real             = 0.0;
@@ -306,13 +305,13 @@ void nr_ptrs_cpe_estimation(uint8_t K_ptrs,
   *ptrs_sc = re_cnt;
 
   /*Multiple compensated data with conj of PTRS */
-  mult_cpx_vector((int16_t*)dmrs_comp_p, (int16_t*)ptrs_p, ptrs_ch_p,(1 + sc_per_symbol/4)*4,15); // 2^15 shifted
+  mult_cpx_vector((int16_t*)dmrs_comp_p, (int16_t*)ptrs_p, (int16_t*)ptrs_ch_p, (1 + sc_per_symbol/4)*4, 15); // 2^15 shifted
 
   /* loop over all ptrs sub carriers in a symbol */
   /* sum the error vector */
   for(int i = 0;i < sc_per_symbol; i++) {
-    real+= ptrs_ch_p[(2*i)];
-    imag+= ptrs_ch_p[(2*i)+1];
+    real += ptrs_ch_p[i].r;
+    imag += ptrs_ch_p[i].i;
   }
 #ifdef DEBUG_PTRS
   alpha = atan(imag/real);

openair1/PHY/NR_REFSIG/ptrs_nr.h

@@ -96,7 +96,6 @@ void nr_ptrs_cpe_estimation(uint8_t K_ptrs,
                             uint8_t dmrsConfigType,
                             uint16_t nb_rb,
                             uint16_t rnti,
-                            int16_t *ptrs_ch_p,
                             unsigned char Ns,
                             unsigned char symbol,
                             uint16_t ofdm_symbol_size,

openair1/PHY/NR_REFSIG/ss_pbch_nr.h

@@ -80,8 +80,6 @@
 /* see TS 38211 7.4.1.4 Demodulation reference signals for PBCH */
 #define  DMRS_PBCH_I_SSB              (8)         /* maximum index value for SSB/PBCH which can have alength of L=4 or L=8 */
 #define  DMRS_PBCH_N_HF               (2)         /* half frame indication - 0 for first part of frame and 1 for second part of frame */
-#define  DMRS_ALIGNMENT_32_BIT        (20)        /* it is just for ensuring a 32 bits alignment for storing dmrs pbch into a 32 bits map */
-#define  DMRS_BITMAP_SIZE             ((DMRS_PBCH_NUMBER-DMRS_ALIGNMENT_32_BIT)/32)   /* size is divided by 32 (to get bitmap on uint32) DMRS_PBCH_NUMBER should be a multiple of 32 */
 
 #endif /* SS_PBCH_NR_H */